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Commit 6a9110f9 authored by Tony Lindgren's avatar Tony Lindgren
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Merge commit '5390130f' into fixes-v5.7

parents 9f872f92 5390130f
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arch/arm/boot/dts/Makefile
View file @ 6a9110f9
......@@ -832,6 +832,7 @@ dtb-$(CONFIG_SOC_DRA7XX) += \
am57xx-beagle-x15.dtb \
am57xx-beagle-x15-revb1.dtb \
am57xx-beagle-x15-revc.dtb \
am5729-beagleboneai.dtb \
am57xx-cl-som-am57x.dtb \
am57xx-sbc-am57x.dtb \
am572x-idk.dtb \
......
arch/arm/boot/dts/am335x-guardian.dts
View file @ 6a9110f9
......@@ -105,6 +105,7 @@ pwm7: dmtimer-pwm {
ti,timers = <&timer7>;
pinctrl-names = "default";
pinctrl-0 = <&dmtimer7_pins>;
ti,clock-source = <0x01>;
};
vmmcsd_fixed: regulator-3v3 {
......
arch/arm/boot/dts/am3517-evm.dts
View file @ 6a9110f9
......@@ -156,6 +156,7 @@ pwm11: dmtimer-pwm@11 {
pinctrl-0 = <&pwm_pins>;
ti,timers = <&timer11>;
#pwm-cells = <3>;
ti,clock-source = <0x01>;
};
/* HS USB Host PHY on PORT 1 */
......
arch/arm/boot/dts/am5729-beagleboneai.dts 0 → 100644
View file @ 6a9110f9
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2014-2019 Texas Instruments Incorporated - http://www.ti.com/
*/
/dts-v1/;
#include "dra74x.dtsi"
#include "am57xx-commercial-grade.dtsi"
#include "dra74x-mmc-iodelay.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/dra.h>
/ {
model = "BeagleBoard.org BeagleBone AI";
compatible = "beagle,am5729-beagleboneai", "ti,am5728",
"ti,dra742", "ti,dra74", "ti,dra7";
aliases {
rtc0 = &tps659038_rtc;
rtc1 = &rtc;
display0 = &hdmi_conn;
};
chosen {
stdout-path = &uart1;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x40000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
ipu2_memory_region: ipu2-memory@95800000 {
compatible = "shared-dma-pool";
reg = <0x0 0x95800000 0x0 0x3800000>;
reusable;
status = "okay";
};
dsp1_memory_region: dsp1-memory@99000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x99000000 0x0 0x4000000>;
reusable;
status = "okay";
};
ipu1_memory_region: ipu1-memory@9d000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x9d000000 0x0 0x2000000>;
reusable;
status = "okay";
};
dsp2_memory_region: dsp2-memory@9f000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x9f000000 0x0 0x800000>;
reusable;
status = "okay";
};
};
vdd_adc: gpioregulator-vdd_adc {
compatible = "regulator-gpio";
regulator-name = "vdd_adc";
vin-supply = <&vdd_5v>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>;
states = <1800000 0
3300000 1>;
};
vdd_5v: fixedregulator-vdd_5v {
compatible = "regulator-fixed";
regulator-name = "vdd_5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
vtt_fixed: fixedregulator-vtt {
/* TPS51200 */
compatible = "regulator-fixed";
regulator-name = "vtt_fixed";
vin-supply = <&vdd_ddr>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
leds {
compatible = "gpio-leds";
led0 {
label = "beaglebone:green:usr0";
gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
led1 {
label = "beaglebone:green:usr1";
gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
led2 {
label = "beaglebone:green:usr2";
gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "cpu";
default-state = "off";
};
led3 {
label = "beaglebone:green:usr3";
gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc1";
default-state = "off";
};
led4 {
label = "beaglebone:green:usr4";
gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "netdev";
default-state = "off";
};
};
hdmi_conn: connector@0 {
compatible = "hdmi-connector";
label = "hdmi";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_encoder_out>;
};
};
};
hdmi_enc: encoder@0 {
/* "ti,tpd12s016" software compatible with "ti,tpd12s015"
* no need for individual driver
*/
compatible = "ti,tpd12s015";
gpios = <0>,
<0>,
<&gpio7 12 GPIO_ACTIVE_HIGH>;
ports {
#address-cells = <0x1>;
#size-cells = <0x0>;
port@0 {
reg = <0x0>;
hdmi_encoder_in: endpoint@0 {
remote-endpoint = <&hdmi_out>;
};
};
port@1 {
reg = <0x1>;
hdmi_encoder_out: endpoint@0 {
remote-endpoint = <&hdmi_connector_in>;
};
};
};
};
emmc_pwrseq: emmc_pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
};
brcmf_pwrseq: brcmf_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>, /* BT-REG-ON */
<&gpio3 18 GPIO_ACTIVE_LOW>; /* WL-REG-ON */
};
extcon_usb1: extcon_usb1 {
compatible = "linux,extcon-usb-gpio";
ti,enable-id-detection;
id-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
};
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
tps659038: tps659038@58 {
compatible = "ti,tps659038";
reg = <0x58>;
interrupt-parent = <&gpio6>;
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
#interrupt-cells = <2>;
interrupt-controller;
ti,system-power-controller;
ti,palmas-override-powerhold;
tps659038_pmic {
compatible = "ti,tps659038-pmic";
smps12-in-supply = <&vdd_5v>;
smps3-in-supply = <&vdd_5v>;
smps45-in-supply = <&vdd_5v>;
smps6-in-supply = <&vdd_5v>;
smps7-in-supply = <&vdd_5v>;
mps3-in-supply = <&vdd_5v>;
smps8-in-supply = <&vdd_5v>;
smps9-in-supply = <&vdd_5v>;
ldo1-in-supply = <&vdd_5v>;
ldo2-in-supply = <&vdd_5v>;
ldo3-in-supply = <&vdd_5v>;
ldo4-in-supply = <&vdd_5v>;
ldo9-in-supply = <&vdd_5v>;
ldoln-in-supply = <&vdd_5v>;
ldousb-in-supply = <&vdd_5v>;
ldortc-in-supply = <&vdd_5v>;
regulators {
vdd_mpu: smps12 {
/* VDD_MPU */
regulator-name = "smps12";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
};
vdd_ddr: smps3 {
/* VDD_DDR EMIF1 EMIF2 */
regulator-name = "smps3";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-boot-on;
};
vdd_dspeve: smps45 {
/* VDD_DSPEVE on AM572 */
regulator-name = "smps45";
regulator-min-microvolt = < 850000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
};
vdd_gpu: smps6 {
/* VDD_GPU */
regulator-name = "smps6";
regulator-min-microvolt = < 850000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
};
vdd_core: smps7 {
/* VDD_CORE */
regulator-name = "smps7";
regulator-min-microvolt = < 850000>; /*** 1.15V */
regulator-max-microvolt = <1150000>;
regulator-always-on;
regulator-boot-on;
};
vdd_iva: smps8 {
/* VDD_IVAHD */ /*** 1.06V */
regulator-name = "smps8";
};
vdd_3v3: smps9 {
/* VDD_3V3 */
regulator-name = "smps9";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
vdd_sd: ldo1 {
/* VDDSHV8 - VSDMMC */
regulator-name = "ldo1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
vdd_1v8: ldo2 {
/* VDDSH18V */
regulator-name = "ldo2";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
vdd_1v8_phy_ldo3: ldo3 {
/* R1.3a 572x V1_8PHY_LDO3: USB, SATA */
regulator-name = "ldo3";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
vdd_1v8_phy_ldo4: ldo4 {
/* R1.3a 572x V1_8PHY_LDO4: PCIE, HDMI*/
regulator-name = "ldo4";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
/* LDO5-8 unused */
vdd_rtc: ldo9 {
/* VDD_RTC */
regulator-name = "ldo9";
regulator-min-microvolt = < 840000>;
regulator-max-microvolt = <1160000>;
regulator-always-on;
regulator-boot-on;
};
vdd_1v8_pll: ldoln {
/* VDDA_1V8_PLL */
regulator-name = "ldoln";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
ldousb_reg: ldousb {
/* VDDA_3V_USB: VDDA_USBHS33 */
regulator-name = "ldousb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
ldortc_reg: ldortc {
/* VDDA_RTC */
regulator-name = "ldortc";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
regen1: regen1 {
/* VDD_3V3_ON */
regulator-name = "regen1";
regulator-boot-on;
regulator-always-on;
};
regen2: regen2 {
/* Needed for PMIC internal resource */
regulator-name = "regen2";
regulator-boot-on;
regulator-always-on;
};
};
};
tps659038_rtc: tps659038_rtc {
compatible = "ti,palmas-rtc";
interrupt-parent = <&tps659038>;
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
wakeup-source;
};
tps659038_pwr_button: tps659038_pwr_button {
compatible = "ti,palmas-pwrbutton";
interrupt-parent = <&tps659038>;
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
wakeup-source;
ti,palmas-long-press-seconds = <12>;
};
tps659038_gpio: tps659038_gpio {
compatible = "ti,palmas-gpio";
gpio-controller;
#gpio-cells = <2>;
};
};
/* STMPE811 touch screen controller */
stmpe811@41 {
compatible = "st,stmpe811";
reg = <0x41>;
interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio2>;
interrupt-controller;
id = <0>;
blocks = <0x5>;
irq-trigger = <0x1>;
st,mod-12b = <1>; /* 12-bit ADC */
st,ref-sel = <0>; /* internal ADC reference */
st,adc-freq = <1>; /* 3.25 MHz ADC clock speed */
st,sample-time = <4>; /* ADC converstion time: 80 clocks */
stmpe_adc {
compatible = "st,stmpe-adc";
st,norequest-mask = <0x00>; /* mask any channels to be used by touchscreen */
adc0: iio-device@0 {
#io-channel-cells = <1>;
iio-channels = <&adc0 4>, <&adc0 1>, <&adc0 2>, <&adc0 3>, <&adc0 4>, <&adc0 5>, <&adc0 6>;
iio-channel-names = "AIN0_P9_39", "AIN1_P9_40", "AIN2_P9_37", "AIN3_P9_38",
"AIN4_P9_33", "AIN5_P9_36", "AIN6_P9_35";
};
};
stmpe_touchscreen {
status = "disabled";
compatible = "st,stmpe-ts";
/* 8 sample average control */
st,ave-ctrl = <3>;
/* 7 length fractional part in z */
st,fraction-z = <7>;
/*
* 50 mA typical 80 mA max touchscreen drivers
* current limit value
*/
st,i-drive = <1>;
/* 1 ms panel driver settling time */
st,settling = <3>;
/* 5 ms touch detect interrupt delay */
st,touch-det-delay = <5>;
};
stmpe_gpio {
compatible = "st,stmpe-gpio";
};
stmpe_pwm {
compatible = "st,stmpe-pwm";
#pwm-cells = <2>;
};
};
};
&mcspi3 {
status = "okay";
ti,pindir-d0-out-d1-in;
sn65hvs882: sn65hvs882@0 {
compatible = "pisosr-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0>;
spi-max-frequency = <1000000>;
spi-cpol;
};
};
&cpu0 {
vdd-supply = <&vdd_mpu>;
voltage-tolerance = <1>;
};
&uart1 {
status = "okay";
};
&davinci_mdio {
reset-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
reset-delay-us = <2>;
phy0: ethernet-phy@1 {
reg = <4>;
eee-broken-100tx;
eee-broken-1000t;
};
};
&mac {
slaves = <1>;
status = "okay";
};
&cpsw_emac0 {
phy-handle = <&phy0>;
phy-mode = "rgmii";
};
&ocp {
pruss1_shmem: pruss_shmem@4b200000 {
status = "okay";
compatible = "ti,pruss-shmem";
reg = <0x4b200000 0x020000>;
};
pruss2_shmem: pruss_shmem@4b280000 {
status = "okay";
compatible = "ti,pruss-shmem";
reg = <0x4b280000 0x020000>;
};
};
&mmc1 {
status = "okay";
vmmc-supply = <&vdd_3v3>;
vqmmc-supply = <&vdd_sd>;
bus-width = <4>;
cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_default>;
};
&mmc2 {
status = "okay";
vmmc-supply = <&vdd_1v8>;
vqmmc-supply = <&vdd_1v8>;
bus-width = <8>;
ti,non-removable;
non-removable;
mmc-pwrseq = <&emmc_pwrseq>;
ti,needs-special-reset;
dmas = <&sdma_xbar 47>, <&sdma_xbar 48>;
dma-names = "tx", "rx";
};
&mmc4 {
/* DS: Default speed (DS) up to 25 MHz, including 1- and 4-bit modes (3.3 V signaling). */
/* HS: High speed up to 50 MHz (3.3 V signaling). */
/* SDR12: SDR up to 25 MHz (1.8 V signaling). */
/* SDR25: SDR up to 50 MHz (1.8 V signaling). */
/* SDR50: SDR up to 100 MHz (1.8 V signaling). */
/* SDR104: SDR up to 208 MHz (1.8 V signaling) */
/* DDR50: DDR up to 50 MHz (1.8 V signaling). */
status = "okay";
ti,needs-special-reset;
vmmc-supply = <&vdd_3v3>;
cap-power-off-card;
keep-power-in-suspend;
bus-width = <4>;
ti,non-removable;
non-removable;
no-1-8-v;
max-frequency = <24000000>;
#address-cells = <1>;
#size-cells = <0>;
mmc-pwrseq = <&brcmf_pwrseq>;
brcmf: wifi@1 {
status = "okay";
reg = <1>;
compatible = "brcm,bcm4329-fmac";
brcm,sd-head-align = <4>;
brcm,sd_head_align = <4>;
brcm,sd_sgentry_align = <512>;
interrupt-parent = <&gpio3>;
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "host-wake";
};
};
&usb2_phy1 {
phy-supply = <&ldousb_reg>;
};
&usb2_phy2 {
phy-supply = <&ldousb_reg>;
};
&usb1 {
status = "okay";
dr_mode = "otg";
};
&omap_dwc3_1 {
extcon = <&extcon_usb1>;
};
&usb2 {
status = "okay";
dr_mode = "host";
};
&dss {
status = "okay";
vdda_video-supply = <&vdd_1v8_pll>;
};
&hdmi {
status = "okay";
vdda-supply = <&vdd_1v8_phy_ldo4>;
port {
hdmi_out: endpoint {
remote-endpoint = <&hdmi_encoder_in>;
};
};
};
&bandgap {
status = "okay";
};
&mailbox1 {
status = "okay";
};
&mailbox2 {
status = "okay";
};
&mailbox3 {
status = "okay";
};
&mailbox4 {
status = "okay";
};
&mailbox5 {
status = "okay";
};
&mailbox6 {
status = "okay";
};
&mailbox7 {
status = "okay";
};
&mailbox8 {
status = "okay";
};
&mailbox9 {
status = "okay";
};
&mailbox10 {
status = "okay";
};
&mailbox11 {
status = "okay";
};
&mailbox12 {
status = "okay";
};
&mailbox13 {
status = "okay";
};
&cpu_alert0 {
temperature = <55000>; /* milliCelsius */
};
&cpu_crit {
temperature = <85000>; /* milliCelsius */
};
&gpu_crit {
temperature = <85000>; /* milliCelsius */
};
&core_crit {
temperature = <85000>; /* milliCelsius */
};
&dspeve_crit {
temperature = <85000>; /* milliCelsius */
};
&iva_crit {
temperature = <85000>; /* milliCelsius */
};
&sata {
status = "disabled";
};
&sata_phy {
status = "disabled";
};
/* bluetooth */
&uart6 {
status = "okay";
};
/* cape header stuff */
&i2c4 {
status = "okay";
clock-frequency = <100000>;
};
&cpu0_opp_table {
opp_slow-500000000 {
opp-shared;
};
};
arch/arm/boot/dts/am57xx-idk-common.dtsi
View file @ 6a9110f9
......@@ -35,6 +35,16 @@ v3_3d: fixedregulator-v3_3d {
regulator-boot-on;
};
v1_2d: fixedregulator-v1_2d {
compatible = "regulator-fixed";
regulator-name = "V1_2D";
vin-supply = <&vmain>;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
};
vtt_fixed: fixedregulator-vtt {
/* TPS51200 */
compatible = "regulator-fixed";
......@@ -139,6 +149,12 @@ tpd12s015_out: endpoint@0 {
};
};
};
src_clk_x1: src_clk_x1 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <20000000>;
};
};
&dra7_pmx_core {
......@@ -378,6 +394,32 @@ tpic2810: tpic2810@60 {
gpio-controller;
#gpio-cells = <2>;
};
dsi_bridge: tc358778@e {
compatible = "toshiba,tc358778", "toshiba,tc358768";
reg = <0xe>;
status = "disabled";
clocks = <&src_clk_x1>;
clock-names = "refclk";
vddc-supply = <&v1_2d>;
vddmipi-supply = <&v1_2d>;
vddio-supply = <&v3_3d>;
dsi_bridge_ports: ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
rgb_in: endpoint {
remote-endpoint = <&dpi_out>;
data-lines = <24>;
};
};
};
};
};
&mcspi3 {
......@@ -543,4 +585,20 @@ hdmi_out: endpoint {
&dss {
status = "okay";
vdda_video-supply = <&ldoln_reg>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dpi_out: endpoint {
remote-endpoint = <&rgb_in>;
data-lines = <24>;
};
};
};
};
arch/arm/boot/dts/dra7-l4.dtsi
View file @ 6a9110f9
......@@ -1163,8 +1163,8 @@ target-module@32000 { /* 0x48032000, ap 5 3e.0 */
timer2: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER2_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER2_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -1191,8 +1191,8 @@ target-module@34000 { /* 0x48034000, ap 7 46.0 */
timer3: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER3_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER3_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -1210,8 +1210,9 @@ target-module@36000 { /* 0x48036000, ap 9 4e.0 */
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
/* Domains (P, C): l4per_pwrdm, l4per_clkdm */
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 0>;
clock-names = "fck";
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 0>,
<&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x36000 0x1000>;
......@@ -1219,8 +1220,8 @@ target-module@36000 { /* 0x48036000, ap 9 4e.0 */
timer4: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -1246,8 +1247,8 @@ target-module@3e000 { /* 0x4803e000, ap 11 56.0 */
timer9: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER9_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER9_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -1853,8 +1854,8 @@ target-module@86000 { /* 0x48086000, ap 41 5e.0 */
timer10: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER10_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER10_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -1880,8 +1881,8 @@ target-module@88000 { /* 0x48088000, ap 43 66.0 */
timer11: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER11_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER11_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -3354,8 +3355,8 @@ target-module@20000 { /* 0x48820000, ap 5 08.0 */
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
/* Domains (P, C): ipu_pwrdm, ipu_clkdm */
clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 0>;
clock-names = "fck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 0>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x20000 0x1000>;
......@@ -3381,8 +3382,9 @@ target-module@22000 { /* 0x48822000, ap 7 24.0 */
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
/* Domains (P, C): ipu_pwrdm, ipu_clkdm */
clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 0>;
clock-names = "fck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 0>,
<&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x22000 0x1000>;
......@@ -3417,8 +3419,8 @@ target-module@24000 { /* 0x48824000, ap 9 26.0 */
timer7: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&ipu_clkctrl DRA7_IPU_TIMER7_CLKCTRL 24>;
clock-names = "fck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER7_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -3444,8 +3446,8 @@ target-module@26000 { /* 0x48826000, ap 11 0c.0 */
timer8: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&ipu_clkctrl DRA7_IPU_TIMER8_CLKCTRL 24>;
clock-names = "fck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER8_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -3471,8 +3473,8 @@ target-module@28000 { /* 0x48828000, ap 13 16.0 */
timer13: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER13_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER13_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
};
......
arch/arm/boot/dts/logicpd-torpedo-baseboard.dtsi
View file @ 6a9110f9
......@@ -65,6 +65,7 @@ pwm10: dmtimer-pwm {
pinctrl-0 = <&pwm_pins>;
ti,timers = <&timer10>;
#pwm-cells = <3>;
ti,clock-source = <0x01>;
};
};
......
arch/arm/boot/dts/omap3-gta04.dtsi
View file @ 6a9110f9
......@@ -150,6 +150,7 @@ pwm11: dmtimer-pwm {
compatible = "ti,omap-dmtimer-pwm";
ti,timers = <&timer11>;
#pwm-cells = <3>;
ti,clock-source = <0x01>;
};
hsusb2_phy: hsusb2_phy {
......
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