Commit 6bbc5476 authored by Hugh Blemings's avatar Hugh Blemings Committed by Josh Boyer

[POWERPC] 4xx: Base support for 440GX Taishan eval board

This patch adds base support for the AMCC Taishan 440GX evaluation
board.
Signed-off-by: default avatarHugh Blemings <hugh@blemings.org>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: default avatarJosh Boyer <jwboyer@linux.vnet.ibm.com>
parent 379865d6
...@@ -225,7 +225,8 @@ config PPC_EARLY_DEBUG_44x ...@@ -225,7 +225,8 @@ config PPC_EARLY_DEBUG_44x
depends on 44x depends on 44x
help help
Select this to enable early debugging for IBM 44x chips via the Select this to enable early debugging for IBM 44x chips via the
inbuilt serial port. inbuilt serial port. If you enable this, ensure you set
PPC_EARLY_DEBUG_44x_PHYSLOW below to suit your target board.
config PPC_EARLY_DEBUG_40x config PPC_EARLY_DEBUG_40x
bool "Early serial debugging for IBM/AMCC 40x CPUs" bool "Early serial debugging for IBM/AMCC 40x CPUs"
...@@ -250,6 +251,9 @@ config PPC_EARLY_DEBUG_44x_PHYSLOW ...@@ -250,6 +251,9 @@ config PPC_EARLY_DEBUG_44x_PHYSLOW
hex "Low 32 bits of early debug UART physical address" hex "Low 32 bits of early debug UART physical address"
depends on PPC_EARLY_DEBUG_44x depends on PPC_EARLY_DEBUG_44x
default "0x40000200" default "0x40000200"
help
You probably want 0x40000200 for ebony boards and
0x40000300 for taishan
config PPC_EARLY_DEBUG_44x_PHYSHIGH config PPC_EARLY_DEBUG_44x_PHYSHIGH
hex "EPRN of early debug UART physical address" hex "EPRN of early debug UART physical address"
......
...@@ -37,8 +37,10 @@ BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) -I$(srctree)/$(src)/libfdt ...@@ -37,8 +37,10 @@ BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) -I$(srctree)/$(src)/libfdt
$(obj)/4xx.o: BOOTCFLAGS += -mcpu=440 $(obj)/4xx.o: BOOTCFLAGS += -mcpu=440
$(obj)/ebony.o: BOOTCFLAGS += -mcpu=440 $(obj)/ebony.o: BOOTCFLAGS += -mcpu=440
$(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=440
$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405 $(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
zlib := inffast.c inflate.c inftrees.c zlib := inffast.c inflate.c inftrees.c
zlibheader := inffast.h inffixed.h inflate.h inftrees.h infutil.h zlibheader := inffast.h inffixed.h inflate.h inftrees.h infutil.h
zliblinuxheader := zlib.h zconf.h zutil.h zliblinuxheader := zlib.h zconf.h zutil.h
...@@ -58,7 +60,7 @@ src-plat := of.c cuboot-52xx.c cuboot-83xx.c cuboot-85xx.c holly.c \ ...@@ -58,7 +60,7 @@ src-plat := of.c cuboot-52xx.c cuboot-83xx.c cuboot-85xx.c holly.c \
cuboot-ebony.c treeboot-ebony.c prpmc2800.c \ cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \ ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \ cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \
fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c cuboot-taishan.c
src-boot := $(src-wlib) $(src-plat) empty.c src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot)) src-boot := $(addprefix $(obj)/, $(src-boot))
...@@ -199,6 +201,7 @@ image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony ...@@ -199,6 +201,7 @@ image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo
image-$(CONFIG_SEQUOIA) += cuImage.sequoia image-$(CONFIG_SEQUOIA) += cuImage.sequoia
image-$(CONFIG_WALNUT) += treeImage.walnut image-$(CONFIG_WALNUT) += treeImage.walnut
image-$(CONFIG_TAISHAN) += cuImage.taishan
endif endif
# For 32-bit powermacs, build the COFF and miboot images # For 32-bit powermacs, build the COFF and miboot images
......
/*
* Old U-boot compatibility for Taishan
*
* Author: Hugh Blemings <hugh@au.ibm.com>
*
* Copyright 2007 Hugh Blemings, IBM Corporation.
* Based on cuboot-ebony.c which is:
* Copyright 2007 David Gibson, IBM Corporation.
* Based on cuboot-83xx.c, which is:
* Copyright (c) 2007 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include "ops.h"
#include "stdio.h"
#include "cuboot.h"
#include "reg.h"
#include "dcr.h"
#include "4xx.h"
#define TARGET_44x
#include "ppcboot.h"
static bd_t bd;
BSS_STACK(4096);
static void taishan_fixups(void)
{
/* FIXME: sysclk should be derived by reading the FPGA
registers */
unsigned long sysclk = 33000000;
/* 440EP Clock logic is all but identical to 440GX
so we just use that code for now at least */
ibm440ep_fixup_clocks(sysclk, 6 * 1843200);
ibm4xx_fixup_memsize();
dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr);
ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
}
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7)
{
CUBOOT_INIT();
platform_ops.fixups = taishan_fixups;
fdt_init(_dtb_start);
serial_console_init();
}
/*
* Device Tree Source for IBM/AMCC Taishan
*
* Copyright 2007 IBM Corp.
* Hugh Blemings <hugh@au.ibm.com> based off code by
* Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without
* any warranty of any kind, whether express or implied.
*/
/ {
#address-cells = <2>;
#size-cells = <1>;
model = "amcc,taishan";
compatible = "amcc,taishan";
dcr-parent = <&/cpus/PowerPC,440GX@0>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,440GX@0 {
device_type = "cpu";
reg = <0>;
clock-frequency = <2FAF0800>; // 800MHz
timebase-frequency = <0>; // Filled in by zImage
i-cache-line-size = <32>;
d-cache-line-size = <32>;
i-cache-size = <8000>; /* 32 kB */
d-cache-size = <8000>; /* 32 kB */
dcr-controller;
dcr-access-method = "native";
};
};
memory {
device_type = "memory";
reg = <0 0 0>; // Filled in by zImage
};
UICB0: interrupt-controller-base {
compatible = "ibm,uic-440gx", "ibm,uic";
interrupt-controller;
cell-index = <3>;
dcr-reg = <200 009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
};
UIC0: interrupt-controller0 {
compatible = "ibm,uic-440gx", "ibm,uic";
interrupt-controller;
cell-index = <0>;
dcr-reg = <0c0 009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <01 4 00 4>; /* cascade - first non-critical */
interrupt-parent = <&UICB0>;
};
UIC1: interrupt-controller1 {
compatible = "ibm,uic-440gx", "ibm,uic";
interrupt-controller;
cell-index = <1>;
dcr-reg = <0d0 009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <03 4 02 4>; /* cascade */
interrupt-parent = <&UICB0>;
};
UIC2: interrupt-controller2 {
compatible = "ibm,uic-440gx", "ibm,uic";
interrupt-controller;
cell-index = <2>; /* was 1 */
dcr-reg = <210 009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <05 4 04 4>; /* cascade */
interrupt-parent = <&UICB0>;
};
CPC0: cpc {
compatible = "ibm,cpc-440gp";
dcr-reg = <0b0 003 0e0 010>;
// FIXME: anything else?
};
plb {
compatible = "ibm,plb-440gx", "ibm,plb4";
#address-cells = <2>;
#size-cells = <1>;
ranges;
clock-frequency = <9896800>; // 160MHz
SDRAM0: memory-controller {
compatible = "ibm,sdram-440gp";
dcr-reg = <010 2>;
// FIXME: anything else?
};
SRAM0: sram {
compatible = "ibm,sram-440gp";
dcr-reg = <020 8 00a 1>;
};
DMA0: dma {
// FIXME: ???
compatible = "ibm,dma-440gp";
dcr-reg = <100 027>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-440gx", "ibm,mcmal2";
dcr-reg = <180 62>;
num-tx-chans = <4>;
num-rx-chans = <4>;
interrupt-parent = <&MAL0>;
interrupts = <0 1 2 3 4>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
/*RXEOB*/ 1 &UIC0 b 4
/*SERR*/ 2 &UIC1 0 4
/*TXDE*/ 3 &UIC1 1 4
/*RXDE*/ 4 &UIC1 2 4>;
interrupt-map-mask = <ffffffff>;
};
POB0: opb {
compatible = "ibm,opb-440gx", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
/* Wish there was a nicer way of specifying a full 32-bit
range */
ranges = <00000000 1 00000000 80000000
80000000 1 80000000 80000000>;
dcr-reg = <090 00b>;
interrupt-parent = <&UIC1>;
interrupts = <7 4>;
clock-frequency = <4C4B400>; // 80MHz
EBC0: ebc {
compatible = "ibm,ebc-440gx", "ibm,ebc";
dcr-reg = <012 2>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <4C4B400>; // 80MHz
/* ranges property is supplied by zImage
* based on firmware's configuration of the
* EBC bridge */
interrupts = <5 4>;
interrupt-parent = <&UIC1>;
/* TODO: Add other EBC devices */
};
UART0: serial@40000200 {
device_type = "serial";
compatible = "ns16550";
reg = <40000200 8>;
virtual-reg = <e0000200>;
clock-frequency = <A8C000>;
current-speed = <1C200>; /* 115200 */
interrupt-parent = <&UIC0>;
interrupts = <0 4>;
};
UART1: serial@40000300 {
device_type = "serial";
compatible = "ns16550";
reg = <40000300 8>;
virtual-reg = <e0000300>;
clock-frequency = <A8C000>;
current-speed = <1C200>; /* 115200 */
interrupt-parent = <&UIC0>;
interrupts = <1 4>;
};
IIC0: i2c@40000400 {
/* FIXME */
device_type = "i2c";
compatible = "ibm,iic-440gp", "ibm,iic";
reg = <40000400 14>;
interrupt-parent = <&UIC0>;
interrupts = <2 4>;
};
IIC1: i2c@40000500 {
/* FIXME */
device_type = "i2c";
compatible = "ibm,iic-440gp", "ibm,iic";
reg = <40000500 14>;
interrupt-parent = <&UIC0>;
interrupts = <3 4>;
};
GPIO0: gpio@40000700 {
/* FIXME */
compatible = "ibm,gpio-440gp";
reg = <40000700 20>;
};
ZMII0: emac-zmii@40000780 {
device_type = "zgmii-interface";
compatible = "ibm,zmii-440gx", "ibm,zmii";
reg = <40000780 c>;
};
RGMII0: emac-rgmii@40000790 {
device_type = "rgmii-interface";
compatible = "ibm,rgmii";
reg = <40000790 8>;
};
EMAC0: ethernet@40000800 {
unused = <1>;
linux,network-index = <2>;
device_type = "network";
compatible = "ibm,emac-440gx", "ibm,emac4";
interrupt-parent = <&UIC1>;
interrupts = <1c 4 1d 4>;
reg = <40000800 70>;
local-mac-address = [000000000000]; // Filled in by zImage
mal-device = <&MAL0>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <5dc>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
phy-mode = "rmii";
phy-map = <00000001>;
zmii-device = <&ZMII0>;
zmii-channel = <0>;
};
EMAC1: ethernet@40000900 {
unused = <1>;
linux,network-index = <3>;
device_type = "network";
compatible = "ibm,emac-440gx", "ibm,emac4";
interrupt-parent = <&UIC1>;
interrupts = <1e 4 1f 4>;
reg = <40000900 70>;
local-mac-address = [000000000000]; // Filled in by zImage
mal-device = <&MAL0>;
mal-tx-channel = <1>;
mal-rx-channel = <1>;
cell-index = <1>;
max-frame-size = <5dc>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
phy-mode = "rmii";
phy-map = <00000001>;
zmii-device = <&ZMII0>;
zmii-channel = <1>;
};
EMAC2: ethernet@40000c00 {
linux,network-index = <0>;
device_type = "network";
compatible = "ibm,emac-440gx", "ibm,emac4";
interrupt-parent = <&UIC2>;
interrupts = <0 4 1 4>;
reg = <40000c00 70>;
local-mac-address = [000000000000]; // Filled in by zImage
mal-device = <&MAL0>;
mal-tx-channel = <2>;
mal-rx-channel = <2>;
cell-index = <2>;
max-frame-size = <5dc>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
phy-mode = "rgmii";
phy-map = <00000001>;
rgmii-device = <&RGMII0>;
rgmii-channel = <0>;
zmii-device = <&ZMII0>;
zmii-channel = <2>;
};
EMAC3: ethernet@40000e00 {
linux,network-index = <1>;
device_type = "network";
compatible = "ibm,emac-440gx", "ibm,emac4";
interrupt-parent = <&UIC2>;
interrupts = <2 4 3 4>;
reg = <40000e00 70>;
local-mac-address = [000000000000]; // Filled in by zImage
mal-device = <&MAL0>;
mal-tx-channel = <3>;
mal-rx-channel = <3>;
cell-index = <3>;
max-frame-size = <5dc>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
phy-mode = "rgmii";
phy-map = <00000003>;
rgmii-device = <&RGMII0>;
rgmii-channel = <1>;
zmii-device = <&ZMII0>;
zmii-channel = <3>;
};
GPT0: gpt@40000a00 {
/* FIXME */
reg = <40000a00 d4>;
interrupt-parent = <&UIC0>;
interrupts = <12 4 13 4 14 4 15 4 16 4>;
};
};
PCIX0: pci@20ec00000 {
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
primary;
large-inbound-windows;
enable-msi-hole;
reg = <2 0ec00000 8 /* Config space access */
0 0 0 /* no IACK cycles */
2 0ed00000 4 /* Special cycles */
2 0ec80000 100 /* Internal registers */
2 0ec80100 fc>; /* Internal messaging registers */
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
ranges = <02000000 0 80000000 00000003 80000000 0 80000000
01000000 0 00000000 00000002 08000000 0 00010000>;
/* Inbound 2GB range starting at 0 */
dma-ranges = <42000000 0 0 0 0 0 80000000>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 1 */
0800 0 0 1 &UIC0 17 8
0800 0 0 2 &UIC0 18 8
0800 0 0 3 &UIC0 19 8
0800 0 0 4 &UIC0 1a 8
/* IDSEL 2 */
1000 0 0 1 &UIC0 18 8
1000 0 0 2 &UIC0 19 8
1000 0 0 3 &UIC0 1a 8
1000 0 0 4 &UIC0 17 8
>;
};
};
chosen {
linux,stdout-path = "/plb/opb/serial@40000300";
};
};
This diff is collapsed.
...@@ -23,6 +23,16 @@ config SEQUOIA ...@@ -23,6 +23,16 @@ config SEQUOIA
help help
This option enables support for the AMCC PPC440EPX evaluation board. This option enables support for the AMCC PPC440EPX evaluation board.
config TAISHAN
bool "Taishan"
depends on 44x
default n
select 440GX
select PCI
help
This option enables support for the AMCC PPC440GX "Taishan"
evaluation board.
#config LUAN #config LUAN
# bool "Luan" # bool "Luan"
# depends on 44x # depends on 44x
...@@ -59,6 +69,10 @@ config 440GP ...@@ -59,6 +69,10 @@ config 440GP
config 440GX config 440GX
bool bool
select IBM_NEW_EMAC_EMAC4
select IBM_NEW_EMAC_RGMII
select IBM_NEW_EMAC_ZMII #test only
select IBM_NEW_EMAC_TAH #test only
config 440SP config 440SP
bool bool
......
obj-$(CONFIG_44x) := misc_44x.o obj-$(CONFIG_44x) := misc_44x.o
obj-$(CONFIG_EBONY) += ebony.o obj-$(CONFIG_EBONY) += ebony.o
obj-$(CONFIG_TAISHAN) += taishan.o
obj-$(CONFIG_BAMBOO) += bamboo.o obj-$(CONFIG_BAMBOO) += bamboo.o
obj-$(CONFIG_SEQUOIA) += sequoia.o obj-$(CONFIG_SEQUOIA) += sequoia.o
/*
* Taishan board specific routines based off ebony.c code
* original copyrights below
*
* Matt Porter <mporter@kernel.crashing.org>
* Copyright 2002-2005 MontaVista Software Inc.
*
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
* Copyright (c) 2003-2005 Zultys Technologies
*
* Rewritten and ported to the merged powerpc tree:
* Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
*
* Modified from ebony.c for taishan:
* Copyright 2007 Hugh Blemings <hugh@au.ibm.com>, IBM Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/init.h>
#include <linux/of_platform.h>
#include <asm/machdep.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/time.h>
#include <asm/uic.h>
#include <asm/pci-bridge.h>
#include "44x.h"
static struct of_device_id taishan_of_bus[] = {
{ .compatible = "ibm,plb4", },
{ .compatible = "ibm,opb", },
{ .compatible = "ibm,ebc", },
{},
};
static int __init taishan_device_probe(void)
{
if (!machine_is(taishan))
return 0;
of_platform_bus_probe(NULL, taishan_of_bus, NULL);
return 0;
}
device_initcall(taishan_device_probe);
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/
static int __init taishan_probe(void)
{
unsigned long root = of_get_flat_dt_root();
if (!of_flat_dt_is_compatible(root, "amcc,taishan"))
return 0;
return 1;
}
define_machine(taishan) {
.name = "Taishan",
.probe = taishan_probe,
.progress = udbg_progress,
.init_IRQ = uic_init_tree,
.get_irq = uic_get_irq,
.restart = ppc44x_reset_system,
.calibrate_decr = generic_calibrate_decr,
};
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