Commit 6d3d76f8 authored by Mugunthan V N's avatar Mugunthan V N Committed by David S. Miller

drivers: net: cpsw: fix cpsw clock gating issue across suspend/resume

Due to some hardware integration issue, CPSW sliver modules requires a
reset across suspend/resume cycle for a successful clock gating to
CPGMAC (CPSW and Davinci MDIO) in AM335x PG1.0.
This issue is fixed in PG2.x, though to support suspend/resume on PG1.0
this reset is required.
Signed-off-by: default avatarMugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 2bd470fc
...@@ -1976,6 +1976,8 @@ static int cpsw_suspend(struct device *dev) ...@@ -1976,6 +1976,8 @@ static int cpsw_suspend(struct device *dev)
if (netif_running(ndev)) if (netif_running(ndev))
cpsw_ndo_stop(ndev); cpsw_ndo_stop(ndev);
soft_reset("sliver 0", &priv->slaves[0].sliver->soft_reset);
soft_reset("sliver 1", &priv->slaves[1].sliver->soft_reset);
pm_runtime_put_sync(&pdev->dev); pm_runtime_put_sync(&pdev->dev);
return 0; return 0;
......
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