Commit 6db9c842 authored by Tom Rini's avatar Tom Rini

ppc32: Move request_irq() calls to arch_initcall() functions

request_irq() needs to be called a bit later than we were
doing before, causing crashes.
Signed-off-by: default avatarRandy Vinson <rvinson@mvista.com>
Signed-off-by: default avatarTom Rini <trini@kernel.crashing.org>
parent 2b1fe9c6
...@@ -371,6 +371,16 @@ static void __init chrp_find_openpic(void) ...@@ -371,6 +371,16 @@ static void __init chrp_find_openpic(void)
} }
} }
static int __init
chrp_request_cascade(void)
{
/* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
i8259_irq);
return 0;
}
arch_initcall(chrp_request_cascade);
void __init chrp_init_IRQ(void) void __init chrp_init_IRQ(void)
{ {
struct device_node *np; struct device_node *np;
...@@ -400,9 +410,6 @@ void __init chrp_init_IRQ(void) ...@@ -400,9 +410,6 @@ void __init chrp_init_IRQ(void)
OpenPIC_NumInitSenses = NR_IRQS - NUM_8259_INTERRUPTS; OpenPIC_NumInitSenses = NR_IRQS - NUM_8259_INTERRUPTS;
openpic_init(NUM_8259_INTERRUPTS); openpic_init(NUM_8259_INTERRUPTS);
/* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
i8259_irq);
for (i = 0; i < NUM_8259_INTERRUPTS; i++) for (i = 0; i < NUM_8259_INTERRUPTS; i++)
irq_desc[i].handler = &i8259_pic; irq_desc[i].handler = &i8259_pic;
......
...@@ -258,6 +258,17 @@ lopec_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data, ...@@ -258,6 +258,17 @@ lopec_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data,
} }
#endif /* BLK_DEV_IDE */ #endif /* BLK_DEV_IDE */
static int __init
lopec_request_cascade(void)
{
/* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
&i8259_irq);
return 0;
}
arch_initcall(lopec_request_cascade);
static void __init static void __init
lopec_init_IRQ(void) lopec_init_IRQ(void)
{ {
...@@ -271,10 +282,6 @@ lopec_init_IRQ(void) ...@@ -271,10 +282,6 @@ lopec_init_IRQ(void)
mpc10x_set_openpic(); mpc10x_set_openpic();
/* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
&i8259_irq);
/* Map i8259 interrupts */ /* Map i8259 interrupts */
for(i = 0; i < NUM_8259_INTERRUPTS; i++) for(i = 0; i < NUM_8259_INTERRUPTS; i++)
irq_desc[i].handler = &i8259_pic; irq_desc[i].handler = &i8259_pic;
......
...@@ -363,6 +363,15 @@ mcpn765_init2(void) ...@@ -363,6 +363,15 @@ mcpn765_init2(void)
return; return;
} }
static int __init
mcpn765_request_cascade(void)
{
openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
i8259_irq);
return 0;
}
arch_initcall(mcpn765_request_cascade);
/* /*
* Interrupt setup and service. * Interrupt setup and service.
* Have MPIC on HAWK and cascaded 8259s on VIA 82586 cascaded to MPIC. * Have MPIC on HAWK and cascaded 8259s on VIA 82586 cascaded to MPIC.
...@@ -376,8 +385,6 @@ mcpn765_init_IRQ(void) ...@@ -376,8 +385,6 @@ mcpn765_init_IRQ(void)
ppc_md.progress("init_irq: enter", 0); ppc_md.progress("init_irq: enter", 0);
openpic_init(NUM_8259_INTERRUPTS); openpic_init(NUM_8259_INTERRUPTS);
openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
i8259_irq);
for(i=0; i < NUM_8259_INTERRUPTS; i++) for(i=0; i < NUM_8259_INTERRUPTS; i++)
irq_desc[i].handler = &i8259_pic; irq_desc[i].handler = &i8259_pic;
......
...@@ -204,6 +204,17 @@ mvme5100_init2(void) ...@@ -204,6 +204,17 @@ mvme5100_init2(void)
return; return;
} }
static int __init
mvme5100_request_cascade(void)
{
#ifdef CONFIG_MVME5100_IPMC761_PRESENT
openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
&i8259_irq);
#endif
return 0;
}
arch_initcall(mvme5100_request_cascade);
/* /*
* Interrupt setup and service. * Interrupt setup and service.
* Have MPIC on HAWK and cascaded 8259s on Winbond cascaded to MPIC. * Have MPIC on HAWK and cascaded 8259s on Winbond cascaded to MPIC.
...@@ -221,14 +232,12 @@ mvme5100_init_IRQ(void) ...@@ -221,14 +232,12 @@ mvme5100_init_IRQ(void)
openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000); openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000);
#ifdef CONFIG_MVME5100_IPMC761_PRESENT #ifdef CONFIG_MVME5100_IPMC761_PRESENT
openpic_init(NUM_8259_INTERRUPTS); openpic_init(NUM_8259_INTERRUPTS);
openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
&i8259_irq);
/* Map i8259 interrupts. */ /* Map i8259 interrupts. */
for (i = 0; i < NUM_8259_INTERRUPTS; i++) for (i = 0; i < NUM_8259_INTERRUPTS; i++)
irq_desc[i].handler = &i8259_pic; irq_desc[i].handler = &i8259_pic;
i8259_init(NULL); i8259_init((long)NULL);
#else #else
openpic_init(0); openpic_init(0);
#endif #endif
......
...@@ -654,6 +654,16 @@ static unsigned int pplus_irq_canonicalize(u_int irq) ...@@ -654,6 +654,16 @@ static unsigned int pplus_irq_canonicalize(u_int irq)
return irq; return irq;
} }
static int __init
pplus_request_cascade(void)
{
if (OpenPIC_Addr != NULL)
openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
i8259_irq);
return 0;
}
arch_initcall(pplus_request_cascade);
static void __init pplus_init_IRQ(void) static void __init pplus_init_IRQ(void)
{ {
int i; int i;
...@@ -668,8 +678,6 @@ static void __init pplus_init_IRQ(void) ...@@ -668,8 +678,6 @@ static void __init pplus_init_IRQ(void)
openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000); openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000);
openpic_init(NUM_8259_INTERRUPTS); openpic_init(NUM_8259_INTERRUPTS);
openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
i8259_irq);
ppc_md.get_irq = openpic_get_irq; ppc_md.get_irq = openpic_get_irq;
} }
......
...@@ -958,6 +958,16 @@ prep_irq_canonicalize(u_int irq) ...@@ -958,6 +958,16 @@ prep_irq_canonicalize(u_int irq)
} }
} }
static int __init
prep_request_cascade(void)
{
if (OpenPIC_Addr != NULL)
/* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
return 0;
}
arch_initcall(prep_request_cascade);
static void __init static void __init
prep_init_IRQ(void) prep_init_IRQ(void)
{ {
...@@ -966,9 +976,6 @@ prep_init_IRQ(void) ...@@ -966,9 +976,6 @@ prep_init_IRQ(void)
if (OpenPIC_Addr != NULL) { if (OpenPIC_Addr != NULL) {
openpic_init(NUM_8259_INTERRUPTS); openpic_init(NUM_8259_INTERRUPTS);
/* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
i8259_irq);
} }
for ( i = 0 ; i < NUM_8259_INTERRUPTS ; i++ ) for ( i = 0 ; i < NUM_8259_INTERRUPTS ; i++ )
irq_desc[i].handler = &i8259_pic; irq_desc[i].handler = &i8259_pic;
......
...@@ -415,6 +415,15 @@ sandpoint_request_io(void) ...@@ -415,6 +415,15 @@ sandpoint_request_io(void)
arch_initcall(sandpoint_request_io); arch_initcall(sandpoint_request_io);
static int __init
sandpoint_request_cascade(void)
{
openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
i8259_irq);
return 0;
}
arch_initcall(sandpoint_request_cascade);
/* /*
* Interrupt setup and service. Interrrupts on the Sandpoint come * Interrupt setup and service. Interrrupts on the Sandpoint come
* from the four PCI slots plus the 8259 in the Winbond Super I/O (SIO). * from the four PCI slots plus the 8259 in the Winbond Super I/O (SIO).
...@@ -430,8 +439,6 @@ sandpoint_init_IRQ(void) ...@@ -430,8 +439,6 @@ sandpoint_init_IRQ(void)
OpenPIC_NumInitSenses = sizeof(sandpoint_openpic_initsenses); OpenPIC_NumInitSenses = sizeof(sandpoint_openpic_initsenses);
mpc10x_set_openpic(); mpc10x_set_openpic();
openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
i8259_irq);
/* /*
* openpic_init() has set up irq_desc[16-31] to be openpic * openpic_init() has set up irq_desc[16-31] to be openpic
......
...@@ -52,7 +52,8 @@ obj-$(CONFIG_MCPN765) += todc_time.o indirect_pci.o pci_auto.o \ ...@@ -52,7 +52,8 @@ obj-$(CONFIG_MCPN765) += todc_time.o indirect_pci.o pci_auto.o \
obj-$(CONFIG_MENF1) += todc_time.o i8259.o mpc10x_common.o \ obj-$(CONFIG_MENF1) += todc_time.o i8259.o mpc10x_common.o \
pci_auto.o indirect_pci.o pci_auto.o indirect_pci.o
obj-$(CONFIG_MVME5100) += open_pic.o todc_time.o indirect_pci.o \ obj-$(CONFIG_MVME5100) += open_pic.o todc_time.o indirect_pci.o \
i8259.o pci_auto.o hawk_common.o pci_auto.o hawk_common.o
obj-$(CONFIG_MVME5100_IPMC761_PRESENT) += i8259.o
obj-$(CONFIG_OCOTEA) += indirect_pci.o pci_auto.o todc_time.o obj-$(CONFIG_OCOTEA) += indirect_pci.o pci_auto.o todc_time.o
obj-$(CONFIG_PAL4) += cpc700_pic.o obj-$(CONFIG_PAL4) += cpc700_pic.o
obj-$(CONFIG_PCORE) += todc_time.o i8259.o pci_auto.o obj-$(CONFIG_PCORE) += todc_time.o i8259.o pci_auto.o
......
...@@ -151,6 +151,17 @@ static struct resource pic_edgectrl_iores = { ...@@ -151,6 +151,17 @@ static struct resource pic_edgectrl_iores = {
"8259 edge control", 0x4d0, 0x4d1, IORESOURCE_BUSY "8259 edge control", 0x4d0, 0x4d1, IORESOURCE_BUSY
}; };
static int __init
i8259_hook_cascade(void)
{
/* reserve our resources */
request_irq( i8259_pic_irq_offset + 2, no_action, SA_INTERRUPT,
"82c59 secondary cascade", NULL );
return 0;
}
arch_initcall(i8259_hook_cascade);
/* /*
* i8259_init() * i8259_init()
* intack_addr - PCI interrupt acknowledge (real) address which will return * intack_addr - PCI interrupt acknowledge (real) address which will return
...@@ -184,9 +195,6 @@ i8259_init(long intack_addr) ...@@ -184,9 +195,6 @@ i8259_init(long intack_addr)
spin_unlock_irqrestore(&i8259_lock, flags); spin_unlock_irqrestore(&i8259_lock, flags);
/* reserve our resources */
request_irq( i8259_pic_irq_offset + 2, no_action, SA_INTERRUPT,
"82c59 secondary cascade", NULL );
request_resource(&ioport_resource, &pic1_iores); request_resource(&ioport_resource, &pic1_iores);
request_resource(&ioport_resource, &pic2_iores); request_resource(&ioport_resource, &pic2_iores);
request_resource(&ioport_resource, &pic_edgectrl_iores); request_resource(&ioport_resource, &pic_edgectrl_iores);
......
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