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nexedi
linux
Commits
6dec3cf5
Commit
6dec3cf5
authored
Sep 29, 2005
by
Linus Torvalds
Browse files
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Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6
parents
82810a90
705747ab
Changes
5
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Showing
5 changed files
with
22 additions
and
10 deletions
+22
-10
arch/sparc64/kernel/cpu.c
arch/sparc64/kernel/cpu.c
+4
-0
arch/sparc64/kernel/unaligned.c
arch/sparc64/kernel/unaligned.c
+5
-5
arch/sparc64/kernel/us3_cpufreq.c
arch/sparc64/kernel/us3_cpufreq.c
+4
-1
include/asm-sparc64/head.h
include/asm-sparc64/head.h
+6
-3
include/asm-sparc64/pgtable.h
include/asm-sparc64/pgtable.h
+3
-1
No files found.
arch/sparc64/kernel/cpu.c
View file @
6dec3cf5
...
...
@@ -39,6 +39,8 @@ struct cpu_fp_info linux_sparc_fpu[] = {
{
0x3e
,
0x15
,
0
,
"UltraSparc III+ integrated FPU"
},
{
0x3e
,
0x16
,
0
,
"UltraSparc IIIi integrated FPU"
},
{
0x3e
,
0x18
,
0
,
"UltraSparc IV integrated FPU"
},
{
0x3e
,
0x19
,
0
,
"UltraSparc IV+ integrated FPU"
},
{
0x3e
,
0x22
,
0
,
"UltraSparc IIIi+ integrated FPU"
},
};
#define NSPARCFPU (sizeof(linux_sparc_fpu)/sizeof(struct cpu_fp_info))
...
...
@@ -53,6 +55,8 @@ struct cpu_iu_info linux_sparc_chips[] = {
{
0x3e
,
0x15
,
"TI UltraSparc III+ (Cheetah+)"
},
{
0x3e
,
0x16
,
"TI UltraSparc IIIi (Jalapeno)"
},
{
0x3e
,
0x18
,
"TI UltraSparc IV (Jaguar)"
},
{
0x3e
,
0x19
,
"TI UltraSparc IV+ (Panther)"
},
{
0x3e
,
0x22
,
"TI UltraSparc IIIi+ (Serrano)"
},
};
#define NSPARCCHIPS (sizeof(linux_sparc_chips)/sizeof(struct cpu_iu_info))
...
...
arch/sparc64/kernel/unaligned.c
View file @
6dec3cf5
...
...
@@ -294,7 +294,7 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn, u
kernel_mna_trap_fault
();
}
else
{
unsigned
long
addr
;
unsigned
long
addr
,
*
reg_addr
;
int
orig_asi
,
asi
;
addr
=
compute_effective_address
(
regs
,
insn
,
...
...
@@ -319,11 +319,11 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn, u
};
switch
(
dir
)
{
case
load
:
do_int_load
(
fetch_reg_addr
(((
insn
>>
25
)
&
0x1f
),
regs
),
size
,
(
unsigned
long
*
)
addr
,
reg_addr
=
fetch_reg_addr
(((
insn
>>
25
)
&
0x1f
),
regs
);
do_int_load
(
reg_addr
,
size
,
(
unsigned
long
*
)
addr
,
decode_signedness
(
insn
),
asi
);
if
(
unlikely
(
asi
!=
orig_asi
))
{
unsigned
long
val_in
=
*
(
unsigned
long
*
)
addr
;
unsigned
long
val_in
=
*
reg_
addr
;
switch
(
size
)
{
case
2
:
val_in
=
swab16
(
val_in
);
...
...
@@ -339,7 +339,7 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn, u
BUG
();
break
;
};
*
(
unsigned
long
*
)
addr
=
val_in
;
*
reg_
addr
=
val_in
;
}
break
;
...
...
arch/sparc64/kernel/us3_cpufreq.c
View file @
6dec3cf5
...
...
@@ -208,7 +208,10 @@ static int __init us3_freq_init(void)
impl
=
((
ver
>>
32
)
&
0xffff
);
if
(
manuf
==
CHEETAH_MANUF
&&
(
impl
==
CHEETAH_IMPL
||
impl
==
CHEETAH_PLUS_IMPL
))
{
(
impl
==
CHEETAH_IMPL
||
impl
==
CHEETAH_PLUS_IMPL
||
impl
==
JAGUAR_IMPL
||
impl
==
PANTHER_IMPL
))
{
struct
cpufreq_driver
*
driver
;
ret
=
-
ENOMEM
;
...
...
include/asm-sparc64/head.h
View file @
6dec3cf5
...
...
@@ -12,9 +12,12 @@
#define __JALAPENO_ID 0x003e0016
#define CHEETAH_MANUF 0x003e
#define CHEETAH_IMPL 0x0014
#define CHEETAH_PLUS_IMPL 0x0015
#define JALAPENO_IMPL 0x0016
#define CHEETAH_IMPL 0x0014
/* Ultra-III */
#define CHEETAH_PLUS_IMPL 0x0015
/* Ultra-III+ */
#define JALAPENO_IMPL 0x0016
/* Ultra-IIIi */
#define JAGUAR_IMPL 0x0018
/* Ultra-IV */
#define PANTHER_IMPL 0x0019
/* Ultra-IV+ */
#define SERRANO_IMPL 0x0022
/* Ultra-IIIi+ */
#define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label) \
rdpr %ver, %tmp1; \
...
...
include/asm-sparc64/pgtable.h
View file @
6dec3cf5
...
...
@@ -98,7 +98,9 @@
#define _PAGE_NFO _AC(0x1000000000000000,UL)
/* No Fault Only */
#define _PAGE_IE _AC(0x0800000000000000,UL)
/* Invert Endianness */
#define _PAGE_SOFT2 _AC(0x07FC000000000000,UL)
/* Software bits, set 2 */
#define _PAGE_RES1 _AC(0x0003000000000000,UL)
/* Reserved */
#define _PAGE_RES1 _AC(0x0002000000000000,UL)
/* Reserved */
#define _PAGE_SZ32MB _AC(0x0001000000000000,UL)
/* (Panther) 32MB page */
#define _PAGE_SZ256MB _AC(0x2001000000000000,UL)
/* (Panther) 256MB page */
#define _PAGE_SN _AC(0x0000800000000000,UL)
/* (Cheetah) Snoop */
#define _PAGE_RES2 _AC(0x0000780000000000,UL)
/* Reserved */
#define _PAGE_PADDR_SF _AC(0x000001FFFFFFE000,UL)
/* (Spitfire) paddr[40:13]*/
...
...
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