Merge bk://kernel.bkbits.net/davem/sparc-2.6

into ppc970.osdl.org:/home/torvalds/v2.6/linux

arch/arm/mm/alignment.c

@@ -133,6 +133,18 @@ union offset_union {
 #define TYPE_LDST	2
 #define TYPE_DONE	3
 
+#ifdef __ARMEB__
+#define BE		1
+#define FIRST_BYTE_16	"mov	%1, %1, ror #8\n"
+#define FIRST_BYTE_32	"mov	%1, %1, ror #24\n"
+#define NEXT_BYTE	"ror #24"
+#else
+#define BE		0
+#define FIRST_BYTE_16
+#define FIRST_BYTE_32
+#define NEXT_BYTE	"lsr #8"
+#endif
+
 #define __get8_unaligned_check(ins,val,addr,err)	\
 	__asm__(					\
 	"1:	"ins"	%1, [%2], #1\n"			\
@@ -152,9 +164,10 @@ union offset_union {
 #define __get16_unaligned_check(ins,val,addr)			\
 	do {							\
 		unsigned int err = 0, v, a = addr;		\
-		__get8_unaligned_check(ins,val,a,err);		\
 		__get8_unaligned_check(ins,v,a,err);		\
-		val |= v << 8;					\
+		val =  v << ((BE) ? 8 : 0);			\
+		__get8_unaligned_check(ins,v,a,err);		\
+		val |= v << ((BE) ? 0 : 8);			\
 		if (err)					\
 			goto fault;				\
 	} while (0)
@@ -168,13 +181,14 @@ union offset_union {
 #define __get32_unaligned_check(ins,val,addr)			\
 	do {							\
 		unsigned int err = 0, v, a = addr;		\
-		__get8_unaligned_check(ins,val,a,err);		\
 		__get8_unaligned_check(ins,v,a,err);		\
-		val |= v << 8;					\
+		val =  v << ((BE) ? 24 :  0);			\
+		__get8_unaligned_check(ins,v,a,err);		\
+		val |= v << ((BE) ? 16 :  8);			\
 		__get8_unaligned_check(ins,v,a,err);		\
-		val |= v << 16;					\
+		val |= v << ((BE) ?  8 : 16);			\
 		__get8_unaligned_check(ins,v,a,err);		\
-		val |= v << 24;					\
+		val |= v << ((BE) ?  0 : 24);			\
 		if (err)					\
 			goto fault;				\
 	} while (0)
@@ -188,9 +202,9 @@ union offset_union {
 #define __put16_unaligned_check(ins,val,addr)			\
 	do {							\
 		unsigned int err = 0, v = val, a = addr;	\
-		__asm__(					\
+		__asm__( FIRST_BYTE_16				\
 		"1:	"ins"	%1, [%2], #1\n"			\
-		"	mov	%1, %1, lsr #8\n"		\
+		"	mov	%1, %1, "NEXT_BYTE"\n"		\
 		"2:	"ins"	%1, [%2]\n"			\
 		"3:\n"						\
 		"	.section .fixup,\"ax\"\n"		\
@@ -218,13 +232,13 @@ union offset_union {
 #define __put32_unaligned_check(ins,val,addr)			\
 	do {							\
 		unsigned int err = 0, v = val, a = addr;	\
-		__asm__(					\
+		__asm__( FIRST_BYTE_32				\
 		"1:	"ins"	%1, [%2], #1\n"			\
-		"	mov	%1, %1, lsr #8\n"		\
+		"	mov	%1, %1, "NEXT_BYTE"\n"		\
 		"2:	"ins"	%1, [%2], #1\n"			\
-		"	mov	%1, %1, lsr #8\n"		\
+		"	mov	%1, %1, "NEXT_BYTE"\n"		\
 		"3:	"ins"	%1, [%2], #1\n"			\
-		"	mov	%1, %1, lsr #8\n"		\
+		"	mov	%1, %1, "NEXT_BYTE"\n"		\
 		"4:	"ins"	%1, [%2]\n"			\
 		"5:\n"						\
 		"	.section .fixup,\"ax\"\n"		\

include/asm-arm/arch-s3c2410/regs-clock.h

@@ -15,6 +15,7 @@
  *    19-06-2003  Ben Dooks      Created file
  *    12-03-2004  Ben Dooks      Updated include protection
  *    29-Sep-2004 Ben Dooks	 Fixed usage for assembly inclusion
+ *    10-Feb-2005 Ben Dooks	 Fixed CAMDIVN address (Guillaume Gourat)
  */
 
 #ifndef __ASM_ARM_REGS_CLOCK
@@ -77,17 +78,17 @@
 static inline unsigned int
 s3c2410_get_pll(int pllval, int baseclk)
 {
-  int mdiv, pdiv, sdiv;
+	int mdiv, pdiv, sdiv;
 
-  mdiv = pllval >> S3C2410_PLLCON_MDIVSHIFT;
-  pdiv = pllval >> S3C2410_PLLCON_PDIVSHIFT;
-  sdiv = pllval >> S3C2410_PLLCON_SDIVSHIFT;
+	mdiv = pllval >> S3C2410_PLLCON_MDIVSHIFT;
+	pdiv = pllval >> S3C2410_PLLCON_PDIVSHIFT;
+	sdiv = pllval >> S3C2410_PLLCON_SDIVSHIFT;
 
-  mdiv &= S3C2410_PLLCON_MDIVMASK;
-  pdiv &= S3C2410_PLLCON_PDIVMASK;
-  sdiv &= S3C2410_PLLCON_SDIVMASK;
+	mdiv &= S3C2410_PLLCON_MDIVMASK;
+	pdiv &= S3C2410_PLLCON_PDIVMASK;
+	sdiv &= S3C2410_PLLCON_SDIVMASK;
 
-  return (baseclk * (mdiv + 8)) / ((pdiv + 2) << sdiv);
+	return (baseclk * (mdiv + 8)) / ((pdiv + 2) << sdiv);
 }
 
 #endif /* __ASSEMBLY__ */
@@ -95,7 +96,7 @@ s3c2410_get_pll(int pllval, int baseclk)
 #ifdef CONFIG_CPU_S3C2440
 
 /* extra registers */
-#define S3C2440_CAMDIVN	    S3C2410_CLKREG(0x14)
+#define S3C2440_CAMDIVN	    S3C2410_CLKREG(0x18)
 
 #define S3C2440_CLKCON_CAMERA        (1<<19)
 #define S3C2440_CLKCON_AC97          (1<<20)

include/asm-arm/arch-s3c2410/regs-gpioj.h

@@ -11,6 +11,7 @@
  *
  *  Changelog:
  *    11-Aug-2004     BJD     Created file
+ *    10-Feb-2005     BJD     Fix GPJ12 definition (Guillaume Gourat)
 */
 
 
@@ -94,7 +95,7 @@
 #define S3C2440_GPJ12           S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 12)
 #define S3C2440_GPJ12_INP       (0x00 << 24)
 #define S3C2440_GPJ12_OUTP      (0x01 << 24)
-#define S3C2440_GPJ12_CAMCLKOUT (0x02 << 24)
+#define S3C2440_GPJ12_CAMRESET  (0x02 << 24)
 
 #endif	/* __ASM_ARCH_REGS_GPIOJ_H */