Commit 75966255 authored by Aaron Liu's avatar Aaron Liu Committed by Alex Deucher

drm/amdgpu: update IH_CHICKEN in oss 4.0 IP header for VG/RV series

In Renoir's emulator, those chicken bits need to be programmed.
Signed-off-by: default avatarAaron Liu <aaron.liu@amd.com>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ea1fc5e1
...@@ -1109,7 +1109,11 @@ ...@@ -1109,7 +1109,11 @@
#define IH_CID_REMAP_DATA__CLIENT_ID_REMAP_MASK 0x00FF0000L #define IH_CID_REMAP_DATA__CLIENT_ID_REMAP_MASK 0x00FF0000L
//IH_CHICKEN //IH_CHICKEN
#define IH_CHICKEN__ACTIVE_FCN_ID_PROT_ENABLE__SHIFT 0x0 #define IH_CHICKEN__ACTIVE_FCN_ID_PROT_ENABLE__SHIFT 0x0
#define IH_CHICKEN__MC_SPACE_FBPA_ENABLE__SHIFT 0x3
#define IH_CHICKEN__MC_SPACE_GPA_ENABLE__SHIFT 0x4
#define IH_CHICKEN__ACTIVE_FCN_ID_PROT_ENABLE_MASK 0x00000001L #define IH_CHICKEN__ACTIVE_FCN_ID_PROT_ENABLE_MASK 0x00000001L
#define IH_CHICKEN__MC_SPACE_FBPA_ENABLE_MASK 0x00000008L
#define IH_CHICKEN__MC_SPACE_GPA_ENABLE_MASK 0x00000010L
//IH_MMHUB_CNTL //IH_MMHUB_CNTL
#define IH_MMHUB_CNTL__UNITID__SHIFT 0x0 #define IH_MMHUB_CNTL__UNITID__SHIFT 0x0
#define IH_MMHUB_CNTL__IV_TLVL__SHIFT 0x8 #define IH_MMHUB_CNTL__IV_TLVL__SHIFT 0x8
......
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