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nexedi
linux
Commits
7b4808bb
Commit
7b4808bb
authored
Nov 15, 2010
by
Ben Skeggs
Browse files
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Plain Diff
drm/nouveau: remove dummy page use from PCI(E)GART, use PTE present instead
Signed-off-by:
Ben Skeggs
<
bskeggs@redhat.com
>
parent
9fea1bcb
Changes
2
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2 changed files
with
3 additions
and
37 deletions
+3
-37
drivers/gpu/drm/nouveau/nouveau_drv.h
drivers/gpu/drm/nouveau/nouveau_drv.h
+0
-2
drivers/gpu/drm/nouveau/nouveau_sgdma.c
drivers/gpu/drm/nouveau/nouveau_sgdma.c
+3
-35
No files found.
drivers/gpu/drm/nouveau/nouveau_drv.h
View file @
7b4808bb
...
@@ -672,8 +672,6 @@ struct drm_nouveau_private {
...
@@ -672,8 +672,6 @@ struct drm_nouveau_private {
uint64_t
aper_free
;
uint64_t
aper_free
;
struct
nouveau_gpuobj
*
sg_ctxdma
;
struct
nouveau_gpuobj
*
sg_ctxdma
;
struct
page
*
sg_dummy_page
;
dma_addr_t
sg_dummy_bus
;
}
gart_info
;
}
gart_info
;
/* nv10-nv40 tiling regions */
/* nv10-nv40 tiling regions */
...
...
drivers/gpu/drm/nouveau/nouveau_sgdma.c
View file @
7b4808bb
...
@@ -144,19 +144,15 @@ nouveau_sgdma_unbind(struct ttm_backend *be)
...
@@ -144,19 +144,15 @@ nouveau_sgdma_unbind(struct ttm_backend *be)
pte
=
nvbe
->
pte_start
;
pte
=
nvbe
->
pte_start
;
for
(
i
=
0
;
i
<
nvbe
->
nr_pages
;
i
++
)
{
for
(
i
=
0
;
i
<
nvbe
->
nr_pages
;
i
++
)
{
dma_addr_t
dma_offset
=
dev_priv
->
gart_info
.
sg_dummy_bus
;
for
(
j
=
0
;
j
<
PAGE_SIZE
/
NV_CTXDMA_PAGE_SIZE
;
j
++
)
{
for
(
j
=
0
;
j
<
PAGE_SIZE
/
NV_CTXDMA_PAGE_SIZE
;
j
++
)
{
if
(
dev_priv
->
card_type
<
NV_50
)
{
if
(
dev_priv
->
card_type
<
NV_50
)
{
nv_wo32
(
gpuobj
,
(
pte
*
4
)
+
0
,
dma_offset
|
3
);
nv_wo32
(
gpuobj
,
(
pte
*
4
)
+
0
,
0x00000000
);
pte
+=
1
;
pte
+=
1
;
}
else
{
}
else
{
nv_wo32
(
gpuobj
,
(
pte
*
4
)
+
0
,
0x00000000
);
nv_wo32
(
gpuobj
,
(
pte
*
4
)
+
0
,
0x00000000
);
nv_wo32
(
gpuobj
,
(
pte
*
4
)
+
4
,
0x00000000
);
nv_wo32
(
gpuobj
,
(
pte
*
4
)
+
4
,
0x00000000
);
pte
+=
2
;
pte
+=
2
;
}
}
dma_offset
+=
NV_CTXDMA_PAGE_SIZE
;
}
}
}
}
dev_priv
->
engine
.
instmem
.
flush
(
nvbe
->
dev
);
dev_priv
->
engine
.
instmem
.
flush
(
nvbe
->
dev
);
...
@@ -218,7 +214,6 @@ int
...
@@ -218,7 +214,6 @@ int
nouveau_sgdma_init
(
struct
drm_device
*
dev
)
nouveau_sgdma_init
(
struct
drm_device
*
dev
)
{
{
struct
drm_nouveau_private
*
dev_priv
=
dev
->
dev_private
;
struct
drm_nouveau_private
*
dev_priv
=
dev
->
dev_private
;
struct
pci_dev
*
pdev
=
dev
->
pdev
;
struct
nouveau_gpuobj
*
gpuobj
=
NULL
;
struct
nouveau_gpuobj
*
gpuobj
=
NULL
;
uint32_t
aper_size
,
obj_size
;
uint32_t
aper_size
,
obj_size
;
int
i
,
ret
;
int
i
,
ret
;
...
@@ -245,22 +240,6 @@ nouveau_sgdma_init(struct drm_device *dev)
...
@@ -245,22 +240,6 @@ nouveau_sgdma_init(struct drm_device *dev)
return
ret
;
return
ret
;
}
}
dev_priv
->
gart_info
.
sg_dummy_page
=
alloc_page
(
GFP_KERNEL
|
__GFP_DMA32
|
__GFP_ZERO
);
if
(
!
dev_priv
->
gart_info
.
sg_dummy_page
)
{
nouveau_gpuobj_ref
(
NULL
,
&
gpuobj
);
return
-
ENOMEM
;
}
set_bit
(
PG_locked
,
&
dev_priv
->
gart_info
.
sg_dummy_page
->
flags
);
dev_priv
->
gart_info
.
sg_dummy_bus
=
pci_map_page
(
pdev
,
dev_priv
->
gart_info
.
sg_dummy_page
,
0
,
PAGE_SIZE
,
PCI_DMA_BIDIRECTIONAL
);
if
(
pci_dma_mapping_error
(
pdev
,
dev_priv
->
gart_info
.
sg_dummy_bus
))
{
nouveau_gpuobj_ref
(
NULL
,
&
gpuobj
);
return
-
EFAULT
;
}
if
(
dev_priv
->
card_type
<
NV_50
)
{
if
(
dev_priv
->
card_type
<
NV_50
)
{
/* special case, allocated from global instmem heap so
/* special case, allocated from global instmem heap so
* cinst is invalid, we use it on all channels though so
* cinst is invalid, we use it on all channels though so
...
@@ -277,10 +256,8 @@ nouveau_sgdma_init(struct drm_device *dev)
...
@@ -277,10 +256,8 @@ nouveau_sgdma_init(struct drm_device *dev)
(
NV_DMA_ACCESS_RW
<<
14
)
|
(
NV_DMA_ACCESS_RW
<<
14
)
|
(
NV_DMA_TARGET_PCI
<<
16
));
(
NV_DMA_TARGET_PCI
<<
16
));
nv_wo32
(
gpuobj
,
4
,
aper_size
-
1
);
nv_wo32
(
gpuobj
,
4
,
aper_size
-
1
);
for
(
i
=
2
;
i
<
2
+
(
aper_size
>>
12
);
i
++
)
{
for
(
i
=
2
;
i
<
2
+
(
aper_size
>>
12
);
i
++
)
nv_wo32
(
gpuobj
,
i
*
4
,
nv_wo32
(
gpuobj
,
i
*
4
,
0x00000000
);
dev_priv
->
gart_info
.
sg_dummy_bus
|
3
);
}
}
else
{
}
else
{
for
(
i
=
0
;
i
<
obj_size
;
i
+=
8
)
{
for
(
i
=
0
;
i
<
obj_size
;
i
+=
8
)
{
nv_wo32
(
gpuobj
,
i
+
0
,
0x00000000
);
nv_wo32
(
gpuobj
,
i
+
0
,
0x00000000
);
...
@@ -301,15 +278,6 @@ nouveau_sgdma_takedown(struct drm_device *dev)
...
@@ -301,15 +278,6 @@ nouveau_sgdma_takedown(struct drm_device *dev)
{
{
struct
drm_nouveau_private
*
dev_priv
=
dev
->
dev_private
;
struct
drm_nouveau_private
*
dev_priv
=
dev
->
dev_private
;
if
(
dev_priv
->
gart_info
.
sg_dummy_page
)
{
pci_unmap_page
(
dev
->
pdev
,
dev_priv
->
gart_info
.
sg_dummy_bus
,
NV_CTXDMA_PAGE_SIZE
,
PCI_DMA_BIDIRECTIONAL
);
unlock_page
(
dev_priv
->
gart_info
.
sg_dummy_page
);
__free_page
(
dev_priv
->
gart_info
.
sg_dummy_page
);
dev_priv
->
gart_info
.
sg_dummy_page
=
NULL
;
dev_priv
->
gart_info
.
sg_dummy_bus
=
0
;
}
nouveau_gpuobj_ref
(
NULL
,
&
dev_priv
->
gart_info
.
sg_ctxdma
);
nouveau_gpuobj_ref
(
NULL
,
&
dev_priv
->
gart_info
.
sg_ctxdma
);
}
}
...
...
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