Commit 7c8f03d5 authored by Heiko Stuebner's avatar Heiko Stuebner Committed by Stephen Boyd

clk: rockchip: add missing include guards

Review for the rk3368 turned up that the clock header was missing include
guards. This is also true for the already existing clock binding headers,
so add them.
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent d8567e39
......@@ -13,6 +13,9 @@
* GNU General Public License for more details.
*/
#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3066A_H
#define _DT_BINDINGS_CLK_ROCKCHIP_RK3066A_H
#include <dt-bindings/clock/rk3188-cru-common.h>
/* soft-reset indices */
......@@ -33,3 +36,5 @@
#define SRST_HDMI 96
#define SRST_HDMI_APB 97
#define SRST_CIF1 111
#endif
......@@ -13,6 +13,9 @@
* GNU General Public License for more details.
*/
#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3188_COMMON_H
#define _DT_BINDINGS_CLK_ROCKCHIP_RK3188_COMMON_H
/* core clocks from */
#define PLL_APLL 1
#define PLL_DPLL 2
......@@ -248,3 +251,5 @@
#define SRST_PTM1_ATB 141
#define SRST_CTM 142
#define SRST_TS 143
#endif
......@@ -13,6 +13,9 @@
* GNU General Public License for more details.
*/
#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H
#define _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H
#include <dt-bindings/clock/rk3188-cru-common.h>
/* soft-reset indices */
......@@ -49,3 +52,5 @@
#define SRST_GPU_BRIDGE 121
#define SRST_CTI3 123
#define SRST_CTI3_APB 124
#endif
......@@ -13,6 +13,9 @@
* GNU General Public License for more details.
*/
#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3288_H
#define _DT_BINDINGS_CLK_ROCKCHIP_RK3288_H
/* core clocks */
#define PLL_APLL 1
#define PLL_DPLL 2
......@@ -376,3 +379,5 @@
#define SRST_TSP_CLKIN0 189
#define SRST_TSP_CLKIN1 190
#define SRST_TSP_27M 191
#endif
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