[PATCH] Altix update: misc changes

From: Pat Gefre <pfg@sgi.com>

arch/ia64/sn/io/sn2/pcibr/pcibr_dvr.c
    extern for pcibr_rrb_alloc_more()

include/asm-ia64/sn/pci/pcibr_private.h
    more unsigned to unsigned int

arch/ia64/sn/io/sn2/pcibr/pcibr_dvr.c

@@ -53,6 +53,8 @@ extern char *pci_space[];
 
 extern void		 do_pcibr_rrb_free_all(pcibr_soft_t, pciio_slot_t);
 extern void              do_pcibr_rrb_autoalloc(pcibr_soft_t, int, int, int);
+extern void		 pcibr_rrb_alloc_more(pcibr_soft_t pcibr_soft, int slot,
+							int vchan, int more_rrbs);
 
 extern int  		 pcibr_wrb_flush(vertex_hdl_t);
 extern int               pcibr_rrb_alloc(vertex_hdl_t, int *, int *);

include/asm-ia64/sn/pci/pcibr_private.h

@@ -33,7 +33,7 @@ typedef struct pcibr_intr_list_s *pcibr_intr_list_t;
 typedef struct pcibr_intr_wrap_s *pcibr_intr_wrap_t;
 typedef struct pcibr_intr_cbuf_s *pcibr_intr_cbuf_t;
 
-typedef volatile unsigned *cfg_p;
+typedef volatile unsigned int *cfg_p;
 typedef volatile bridgereg_t *reg_p;
 
 /*
@@ -273,7 +273,7 @@ struct pcibr_intr_s {
 #define bi_mustruncpu	bi_pi.pi_mustruncpu /* Where we must run. */
 #define bi_irq		bi_pi.pi_irq	/* IRQ assigned. */
 #define bi_cpu		bi_pi.pi_cpu	/* cpu assigned. */
-    unsigned                bi_ibits;	/* which Bridge interrupt bit(s) */
+    unsigned int                bi_ibits;	/* which Bridge interrupt bit(s) */
     pcibr_soft_t            bi_soft;	/* shortcut to soft info */
     struct pcibr_intr_cbuf_s bi_ibuf;	/* circular buffer of wrap ptrs */
     unsigned		bi_last_intr;	/* For Shub lb lost intr. bug */
@@ -461,7 +461,7 @@ struct pcibr_soft_s {
     /* bs_dma_flags are the forced dma flags used on all DMAs. Used for
      * working around ASIC rev issues and protocol specific requirements
      */
-    unsigned                bs_dma_flags;	/* forced DMA flags */
+    unsigned int            bs_dma_flags;	/* forced DMA flags */
 
     nasid_t		    bs_nasid;		/* nasid this bus is on */
     moduleid_t		    bs_moduleid;	/* io brick moduleid */
@@ -710,8 +710,8 @@ struct pcibr_soft_s {
 struct pcibr_hints_s {
     /* ph_host_slot is actually +1 so "0" means "no host" */
     pciio_slot_t            ph_host_slot[8];	/* REQ/GNT/INT in use by ... */
-    unsigned                ph_rrb_fixed;	/* do not change RRB allocations */
-    unsigned                ph_hands_off;	/* prevent further pcibr operations */
+    unsigned int            ph_rrb_fixed;	/* do not change RRB allocations */
+    unsigned int            ph_hands_off;	/* prevent further pcibr operations */
     rrb_alloc_funct_t       rrb_alloc_funct;	/* do dynamic rrb allocation */
     pcibr_intr_bits_f	   *ph_intr_bits;	/* map PCI INT[ABCD] to Bridge Int(n) */
 };