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Commit 7e3f36c3 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt
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Merge commit 'jwb/next' into next

parents 1caca371 ff349103
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Showing with 117 additions and 109 deletions
arch/powerpc/boot/dts/canyonlands.dts
View file @ 7e3f36c3
......@@ -270,7 +270,7 @@ UART2: serial@ef600500 {
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>; /* Filled in by U-Boot */
interrupt-parent = <&UIC1>;
interrupts = <0x1d 0x4>;
interrupts = <28 0x4>;
};
UART3: serial@ef600600 {
......@@ -281,7 +281,7 @@ UART3: serial@ef600600 {
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>; /* Filled in by U-Boot */
interrupt-parent = <&UIC1>;
interrupts = <0x1e 0x4>;
interrupts = <29 0x4>;
};
IIC0: i2c@ef600700 {
......
arch/powerpc/boot/dts/glacier.dts
View file @ 7e3f36c3
......@@ -259,7 +259,7 @@ UART2: serial@ef600500 {
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>; /* Filled in by U-Boot */
interrupt-parent = <&UIC1>;
interrupts = <0x1d 0x4>;
interrupts = <28 0x4>;
};
UART3: serial@ef600600 {
......@@ -270,7 +270,7 @@ UART3: serial@ef600600 {
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>; /* Filled in by U-Boot */
interrupt-parent = <&UIC1>;
interrupts = <0x1e 0x4>;
interrupts = <29 0x4>;
};
IIC0: i2c@ef600700 {
......
arch/powerpc/kernel/cputable.c
View file @ 7e3f36c3
......@@ -1364,10 +1364,10 @@ static struct cpu_spec __initdata cpu_specs[] = {
.machine_check = machine_check_4xx,
.platform = "ppc405",
},
{ /* 405EX */
.pvr_mask = 0xffff0004,
.pvr_value = 0x12910004,
.cpu_name = "405EX",
{ /* 405EX Rev. A/B with Security */
.pvr_mask = 0xffff000f,
.pvr_value = 0x12910007,
.cpu_name = "405EX Rev. A/B",
.cpu_features = CPU_FTRS_40X,
.cpu_user_features = PPC_FEATURE_32 |
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
......@@ -1377,10 +1377,114 @@ static struct cpu_spec __initdata cpu_specs[] = {
.machine_check = machine_check_4xx,
.platform = "ppc405",
},
{ /* 405EXr */
.pvr_mask = 0xffff0004,
{ /* 405EX Rev. C without Security */
.pvr_mask = 0xffff000f,
.pvr_value = 0x1291000d,
.cpu_name = "405EX Rev. C",
.cpu_features = CPU_FTRS_40X,
.cpu_user_features = PPC_FEATURE_32 |
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.mmu_features = MMU_FTR_TYPE_40x,
.icache_bsize = 32,
.dcache_bsize = 32,
.machine_check = machine_check_4xx,
.platform = "ppc405",
},
{ /* 405EX Rev. C with Security */
.pvr_mask = 0xffff000f,
.pvr_value = 0x1291000f,
.cpu_name = "405EX Rev. C",
.cpu_features = CPU_FTRS_40X,
.cpu_user_features = PPC_FEATURE_32 |
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.mmu_features = MMU_FTR_TYPE_40x,
.icache_bsize = 32,
.dcache_bsize = 32,
.machine_check = machine_check_4xx,
.platform = "ppc405",
},
{ /* 405EX Rev. D without Security */
.pvr_mask = 0xffff000f,
.pvr_value = 0x12910003,
.cpu_name = "405EX Rev. D",
.cpu_features = CPU_FTRS_40X,
.cpu_user_features = PPC_FEATURE_32 |
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.mmu_features = MMU_FTR_TYPE_40x,
.icache_bsize = 32,
.dcache_bsize = 32,
.machine_check = machine_check_4xx,
.platform = "ppc405",
},
{ /* 405EX Rev. D with Security */
.pvr_mask = 0xffff000f,
.pvr_value = 0x12910005,
.cpu_name = "405EX Rev. D",
.cpu_features = CPU_FTRS_40X,
.cpu_user_features = PPC_FEATURE_32 |
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.mmu_features = MMU_FTR_TYPE_40x,
.icache_bsize = 32,
.dcache_bsize = 32,
.machine_check = machine_check_4xx,
.platform = "ppc405",
},
{ /* 405EXr Rev. A/B without Security */
.pvr_mask = 0xffff000f,
.pvr_value = 0x12910001,
.cpu_name = "405EXr Rev. A/B",
.cpu_features = CPU_FTRS_40X,
.cpu_user_features = PPC_FEATURE_32 |
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.mmu_features = MMU_FTR_TYPE_40x,
.icache_bsize = 32,
.dcache_bsize = 32,
.machine_check = machine_check_4xx,
.platform = "ppc405",
},
{ /* 405EXr Rev. C without Security */
.pvr_mask = 0xffff000f,
.pvr_value = 0x12910009,
.cpu_name = "405EXr Rev. C",
.cpu_features = CPU_FTRS_40X,
.cpu_user_features = PPC_FEATURE_32 |
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.mmu_features = MMU_FTR_TYPE_40x,
.icache_bsize = 32,
.dcache_bsize = 32,
.machine_check = machine_check_4xx,
.platform = "ppc405",
},
{ /* 405EXr Rev. C with Security */
.pvr_mask = 0xffff000f,
.pvr_value = 0x1291000b,
.cpu_name = "405EXr Rev. C",
.cpu_features = CPU_FTRS_40X,
.cpu_user_features = PPC_FEATURE_32 |
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.mmu_features = MMU_FTR_TYPE_40x,
.icache_bsize = 32,
.dcache_bsize = 32,
.machine_check = machine_check_4xx,
.platform = "ppc405",
},
{ /* 405EXr Rev. D without Security */
.pvr_mask = 0xffff000f,
.pvr_value = 0x12910000,
.cpu_name = "405EXr",
.cpu_name = "405EXr Rev. D",
.cpu_features = CPU_FTRS_40X,
.cpu_user_features = PPC_FEATURE_32 |
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.mmu_features = MMU_FTR_TYPE_40x,
.icache_bsize = 32,
.dcache_bsize = 32,
.machine_check = machine_check_4xx,
.platform = "ppc405",
},
{ /* 405EXr Rev. D with Security */
.pvr_mask = 0xffff000f,
.pvr_value = 0x12910002,
.cpu_name = "405EXr Rev. D",
.cpu_features = CPU_FTRS_40X,
.cpu_user_features = PPC_FEATURE_32 |
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
......
arch/powerpc/platforms/40x/Kconfig
View file @ 7e3f36c3
......@@ -71,22 +71,6 @@ config MAKALU
help
This option enables support for the AMCC PPC405EX board.
#config REDWOOD_5
# bool "Redwood-5"
# depends on 40x
# default n
# select STB03xxx
# help
# This option enables support for the IBM STB04 evaluation board.
#config REDWOOD_6
# bool "Redwood-6"
# depends on 40x
# default n
# select STB03xxx
# help
# This option enables support for the IBM STBx25xx evaluation board.
#config SYCAMORE
# bool "Sycamore"
# depends on 40x
......
drivers/mtd/maps/Kconfig
View file @ 7e3f36c3
......@@ -321,7 +321,7 @@ config MTD_CFI_FLAGADM
config MTD_REDWOOD
tristate "CFI Flash devices mapped on IBM Redwood"
depends on MTD_CFI && ( REDWOOD_4 || REDWOOD_5 || REDWOOD_6 )
depends on MTD_CFI
help
This enables access routines for the flash chips on the IBM
Redwood board. If you have one of these boards and would like to
......
drivers/mtd/maps/redwood.c
View file @ 7e3f36c3
......@@ -22,8 +22,6 @@
#include <asm/io.h>
#if !defined (CONFIG_REDWOOD_6)
#define WINDOW_ADDR 0xffc00000
#define WINDOW_SIZE 0x00400000
......@@ -69,47 +67,6 @@ static struct mtd_partition redwood_flash_partitions[] = {
}
};
#else /* CONFIG_REDWOOD_6 */
/* FIXME: the window is bigger - armin */
#define WINDOW_ADDR 0xff800000
#define WINDOW_SIZE 0x00800000
#define RW_PART0_OF 0
#define RW_PART0_SZ 0x400000 /* 4 MiB data */
#define RW_PART1_OF RW_PART0_OF + RW_PART0_SZ
#define RW_PART1_SZ 0x10000 /* 64K VPD */
#define RW_PART2_OF RW_PART1_OF + RW_PART1_SZ
#define RW_PART2_SZ 0x400000 - (0x10000 + 0x20000)
#define RW_PART3_OF RW_PART2_OF + RW_PART2_SZ
#define RW_PART3_SZ 0x20000
static struct mtd_partition redwood_flash_partitions[] = {
{
.name = "Redwood filesystem",
.offset = RW_PART0_OF,
.size = RW_PART0_SZ
},
{
.name = "Redwood OpenBIOS Vital Product Data",
.offset = RW_PART1_OF,
.size = RW_PART1_SZ,
.mask_flags = MTD_WRITEABLE /* force read-only */
},
{
.name = "Redwood kernel",
.offset = RW_PART2_OF,
.size = RW_PART2_SZ
},
{
.name = "Redwood OpenBIOS",
.offset = RW_PART3_OF,
.size = RW_PART3_SZ,
.mask_flags = MTD_WRITEABLE /* force read-only */
}
};
#endif /* CONFIG_REDWOOD_6 */
struct map_info redwood_flash_map = {
.name = "IBM Redwood",
.size = WINDOW_SIZE,
......
drivers/net/Kconfig
View file @ 7e3f36c3
......@@ -913,7 +913,7 @@ config SMC91X
tristate "SMC 91C9x/91C1xxx support"
select CRC32
select MII
depends on ARM || REDWOOD_5 || REDWOOD_6 || M32R || SUPERH || \
depends on ARM || M32R || SUPERH || \
MIPS || BLACKFIN || MN10300 || COLDFIRE
help
This is a driver for SMC's 91x series of Ethernet chipsets,
......
drivers/net/smc91x.h
View file @ 7e3f36c3
......@@ -83,43 +83,6 @@ static inline void SMC_outw(u16 val, void __iomem *ioaddr, int reg)
}
}
#elif defined(CONFIG_REDWOOD_5) || defined(CONFIG_REDWOOD_6)
/* We can only do 16-bit reads and writes in the static memory space. */
#define SMC_CAN_USE_8BIT 0
#define SMC_CAN_USE_16BIT 1
#define SMC_CAN_USE_32BIT 0
#define SMC_NOWAIT 1
#define SMC_IO_SHIFT 0
#define SMC_inw(a, r) in_be16((volatile u16 *)((a) + (r)))
#define SMC_outw(v, a, r) out_be16((volatile u16 *)((a) + (r)), v)
#define SMC_insw(a, r, p, l) \
do { \
unsigned long __port = (a) + (r); \
u16 *__p = (u16 *)(p); \
int __l = (l); \
insw(__port, __p, __l); \
while (__l > 0) { \
*__p = swab16(*__p); \
__p++; \
__l--; \
} \
} while (0)
#define SMC_outsw(a, r, p, l) \
do { \
unsigned long __port = (a) + (r); \
u16 *__p = (u16 *)(p); \
int __l = (l); \
while (__l > 0) { \
/* Believe it or not, the swab isn't needed. */ \
outw( /* swab16 */ (*__p++), __port); \
__l--; \
} \
} while (0)
#define SMC_IRQ_FLAGS (0)
#elif defined(CONFIG_SA1100_PLEB)
/* We can only do 16-bit reads and writes in the static memory space. */
#define SMC_CAN_USE_8BIT 1
......
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