Commit 802f42a8 authored by Ido Shamay's avatar Ido Shamay Committed by David S. Miller

net/mlx4: Add RSS support for fragmented IP datagrams

Enable RSS support for fragmented IP packets, when device supports it.
Until now, fragmented IP packets were directed only to the default_qpn.
Since IP fragments (datagram) have no upper protocols (L3 IP packets),
hash is performed on 3-tuple - dst MAC, source IP and dest IP. The HW
makes sure that this holds for the 1st fragment too, so all fragments
go to the same QP.
Signed-off-by: default avatarIdo Shamay <idos@mellanox.com>
Signed-off-by: default avatarOr Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 9f0d34bc
...@@ -105,6 +105,7 @@ static void dump_dev_cap_flags(struct mlx4_dev *dev, u64 flags) ...@@ -105,6 +105,7 @@ static void dump_dev_cap_flags(struct mlx4_dev *dev, u64 flags)
[41] = "Unicast VEP steering support", [41] = "Unicast VEP steering support",
[42] = "Multicast VEP steering support", [42] = "Multicast VEP steering support",
[48] = "Counters support", [48] = "Counters support",
[52] = "RSS IP fragments support",
[53] = "Port ETS Scheduler support", [53] = "Port ETS Scheduler support",
[55] = "Port link type sensing support", [55] = "Port link type sensing support",
[59] = "Port management change event support", [59] = "Port management change event support",
...@@ -1138,6 +1139,9 @@ int mlx4_QUERY_DEV_CAP_wrapper(struct mlx4_dev *dev, int slave, ...@@ -1138,6 +1139,9 @@ int mlx4_QUERY_DEV_CAP_wrapper(struct mlx4_dev *dev, int slave,
} }
for (; slave_port < dev->caps.num_ports; ++slave_port) for (; slave_port < dev->caps.num_ports; ++slave_port)
flags &= ~(MLX4_DEV_CAP_FLAG_WOL_PORT1 << slave_port); flags &= ~(MLX4_DEV_CAP_FLAG_WOL_PORT1 << slave_port);
/* Not exposing RSS IP fragments to guests */
flags &= ~MLX4_DEV_CAP_FLAG_RSS_IP_FRAG;
MLX4_PUT(outbox->buf, flags, QUERY_DEV_CAP_EXT_FLAGS_OFFSET); MLX4_PUT(outbox->buf, flags, QUERY_DEV_CAP_EXT_FLAGS_OFFSET);
MLX4_GET(field, outbox->buf, QUERY_DEV_CAP_VL_PORT_OFFSET); MLX4_GET(field, outbox->buf, QUERY_DEV_CAP_VL_PORT_OFFSET);
...@@ -1701,6 +1705,10 @@ int mlx4_INIT_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param) ...@@ -1701,6 +1705,10 @@ int mlx4_INIT_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param)
if (dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS) if (dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)
*(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1 << 4); *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1 << 4);
/* Enable RSS spread to fragmented IP packets when supported */
if (dev->caps.flags & MLX4_DEV_CAP_FLAG_RSS_IP_FRAG)
*(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1 << 13);
/* CX3 is capable of extending CQEs/EQEs from 32 to 64 bytes */ /* CX3 is capable of extending CQEs/EQEs from 32 to 64 bytes */
if (dev->caps.flags & MLX4_DEV_CAP_FLAG_64B_EQE) { if (dev->caps.flags & MLX4_DEV_CAP_FLAG_64B_EQE) {
*(inbox + INIT_HCA_EQE_CQE_OFFSETS / 4) |= cpu_to_be32(1 << 29); *(inbox + INIT_HCA_EQE_CQE_OFFSETS / 4) |= cpu_to_be32(1 << 29);
...@@ -1889,6 +1897,10 @@ int mlx4_QUERY_HCA(struct mlx4_dev *dev, ...@@ -1889,6 +1897,10 @@ int mlx4_QUERY_HCA(struct mlx4_dev *dev,
else else
param->steering_mode = MLX4_STEERING_MODE_A0; param->steering_mode = MLX4_STEERING_MODE_A0;
} }
if (dword_field & (1 << 13))
param->rss_ip_frags = 1;
/* steering attributes */ /* steering attributes */
if (param->steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) { if (param->steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) {
MLX4_GET(param->mc_base, outbox, INIT_HCA_FS_BASE_OFFSET); MLX4_GET(param->mc_base, outbox, INIT_HCA_FS_BASE_OFFSET);
......
...@@ -203,6 +203,7 @@ struct mlx4_init_hca_param { ...@@ -203,6 +203,7 @@ struct mlx4_init_hca_param {
u64 dev_cap_enabled; u64 dev_cap_enabled;
u16 cqe_size; /* For use only when CQE stride feature enabled */ u16 cqe_size; /* For use only when CQE stride feature enabled */
u16 eqe_size; /* For use only when EQE stride feature enabled */ u16 eqe_size; /* For use only when EQE stride feature enabled */
u8 rss_ip_frags;
}; };
struct mlx4_init_ib_param { struct mlx4_init_ib_param {
......
...@@ -885,6 +885,8 @@ static int mlx4_slave_cap(struct mlx4_dev *dev) ...@@ -885,6 +885,8 @@ static int mlx4_slave_cap(struct mlx4_dev *dev)
mlx4_warn(dev, "Timestamping is not supported in slave mode\n"); mlx4_warn(dev, "Timestamping is not supported in slave mode\n");
slave_adjust_steering_mode(dev, &dev_cap, &hca_param); slave_adjust_steering_mode(dev, &dev_cap, &hca_param);
mlx4_dbg(dev, "RSS support for IP fragments is %s\n",
hca_param.rss_ip_frags ? "on" : "off");
if (func_cap.extra_flags & MLX4_QUERY_FUNC_FLAGS_BF_RES_QP && if (func_cap.extra_flags & MLX4_QUERY_FUNC_FLAGS_BF_RES_QP &&
dev->caps.bf_reg_size) dev->caps.bf_reg_size)
......
...@@ -174,6 +174,7 @@ enum { ...@@ -174,6 +174,7 @@ enum {
MLX4_DEV_CAP_FLAG_VEP_UC_STEER = 1LL << 41, MLX4_DEV_CAP_FLAG_VEP_UC_STEER = 1LL << 41,
MLX4_DEV_CAP_FLAG_VEP_MC_STEER = 1LL << 42, MLX4_DEV_CAP_FLAG_VEP_MC_STEER = 1LL << 42,
MLX4_DEV_CAP_FLAG_COUNTERS = 1LL << 48, MLX4_DEV_CAP_FLAG_COUNTERS = 1LL << 48,
MLX4_DEV_CAP_FLAG_RSS_IP_FRAG = 1LL << 52,
MLX4_DEV_CAP_FLAG_SET_ETH_SCHED = 1LL << 53, MLX4_DEV_CAP_FLAG_SET_ETH_SCHED = 1LL << 53,
MLX4_DEV_CAP_FLAG_SENSE_SUPPORT = 1LL << 55, MLX4_DEV_CAP_FLAG_SENSE_SUPPORT = 1LL << 55,
MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV = 1LL << 59, MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV = 1LL << 59,
......
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