Commit 815bc580 authored by David S. Miller's avatar David S. Miller

Merge branch 'r8169-hw-programming-typo-fixes'

Chunhao Lin says:

====================
Fix some typos in setting hardware parameter

The typos are in setting RTL8168DP, RTL8168EP and RTL8168H hardware parameters.
This series of patch fix these typos.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 98f40b3e 1016a4a1
...@@ -3894,7 +3894,7 @@ static void rtl8168h_1_hw_phy_config(struct rtl8169_private *tp) ...@@ -3894,7 +3894,7 @@ static void rtl8168h_1_hw_phy_config(struct rtl8169_private *tp)
/* disable phy pfm mode */ /* disable phy pfm mode */
rtl_writephy(tp, 0x1f, 0x0a44); rtl_writephy(tp, 0x1f, 0x0a44);
rtl_w0w1_phy(tp, 0x14, 0x0000, 0x0080); rtl_w0w1_phy(tp, 0x11, 0x0000, 0x0080);
rtl_writephy(tp, 0x1f, 0x0000); rtl_writephy(tp, 0x1f, 0x0000);
/* Check ALDPS bit, disable it if enabled */ /* Check ALDPS bit, disable it if enabled */
...@@ -3967,7 +3967,7 @@ static void rtl8168h_2_hw_phy_config(struct rtl8169_private *tp) ...@@ -3967,7 +3967,7 @@ static void rtl8168h_2_hw_phy_config(struct rtl8169_private *tp)
/* disable phy pfm mode */ /* disable phy pfm mode */
rtl_writephy(tp, 0x1f, 0x0a44); rtl_writephy(tp, 0x1f, 0x0a44);
rtl_w0w1_phy(tp, 0x14, 0x0000, 0x0080); rtl_w0w1_phy(tp, 0x11, 0x0000, 0x0080);
rtl_writephy(tp, 0x1f, 0x0000); rtl_writephy(tp, 0x1f, 0x0000);
/* Check ALDPS bit, disable it if enabled */ /* Check ALDPS bit, disable it if enabled */
...@@ -5818,11 +5818,10 @@ static void rtl_hw_start_8168d_4(struct rtl8169_private *tp) ...@@ -5818,11 +5818,10 @@ static void rtl_hw_start_8168d_4(struct rtl8169_private *tp)
void __iomem *ioaddr = tp->mmio_addr; void __iomem *ioaddr = tp->mmio_addr;
struct pci_dev *pdev = tp->pci_dev; struct pci_dev *pdev = tp->pci_dev;
static const struct ephy_info e_info_8168d_4[] = { static const struct ephy_info e_info_8168d_4[] = {
{ 0x0b, ~0, 0x48 }, { 0x0b, 0x0000, 0x0048 },
{ 0x19, 0x20, 0x50 }, { 0x19, 0x0020, 0x0050 },
{ 0x0c, ~0, 0x20 } { 0x0c, 0x0100, 0x0020 }
}; };
int i;
rtl_csi_access_enable_1(tp); rtl_csi_access_enable_1(tp);
...@@ -5830,13 +5829,7 @@ static void rtl_hw_start_8168d_4(struct rtl8169_private *tp) ...@@ -5830,13 +5829,7 @@ static void rtl_hw_start_8168d_4(struct rtl8169_private *tp)
RTL_W8(MaxTxPacketSize, TxPacketMax); RTL_W8(MaxTxPacketSize, TxPacketMax);
for (i = 0; i < ARRAY_SIZE(e_info_8168d_4); i++) { rtl_ephy_init(tp, e_info_8168d_4, ARRAY_SIZE(e_info_8168d_4));
const struct ephy_info *e = e_info_8168d_4 + i;
u16 w;
w = rtl_ephy_read(tp, e->offset);
rtl_ephy_write(tp, 0x03, (w & e->mask) | e->bits);
}
rtl_enable_clock_request(pdev); rtl_enable_clock_request(pdev);
} }
...@@ -6127,7 +6120,7 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp) ...@@ -6127,7 +6120,7 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp)
RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07); RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);
RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN); RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN);
RTL_W8(DLLPR, RTL_R8(MISC_1) & ~PFM_D3COLD_EN); RTL_W8(MISC_1, RTL_R8(MISC_1) & ~PFM_D3COLD_EN);
RTL_W8(DLLPR, RTL_R8(DLLPR) & ~TX_10M_PS_EN); RTL_W8(DLLPR, RTL_R8(DLLPR) & ~TX_10M_PS_EN);
...@@ -6252,7 +6245,7 @@ static void rtl_hw_start_8168ep_2(struct rtl8169_private *tp) ...@@ -6252,7 +6245,7 @@ static void rtl_hw_start_8168ep_2(struct rtl8169_private *tp)
rtl_hw_start_8168ep(tp); rtl_hw_start_8168ep(tp);
RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN); RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN);
RTL_W8(DLLPR, RTL_R8(MISC_1) & ~PFM_D3COLD_EN); RTL_W8(MISC_1, RTL_R8(MISC_1) & ~PFM_D3COLD_EN);
} }
static void rtl_hw_start_8168ep_3(struct rtl8169_private *tp) static void rtl_hw_start_8168ep_3(struct rtl8169_private *tp)
...@@ -6274,7 +6267,7 @@ static void rtl_hw_start_8168ep_3(struct rtl8169_private *tp) ...@@ -6274,7 +6267,7 @@ static void rtl_hw_start_8168ep_3(struct rtl8169_private *tp)
rtl_hw_start_8168ep(tp); rtl_hw_start_8168ep(tp);
RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN); RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN);
RTL_W8(DLLPR, RTL_R8(MISC_1) & ~PFM_D3COLD_EN); RTL_W8(MISC_1, RTL_R8(MISC_1) & ~PFM_D3COLD_EN);
data = r8168_mac_ocp_read(tp, 0xd3e2); data = r8168_mac_ocp_read(tp, 0xd3e2);
data &= 0xf000; data &= 0xf000;
......
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