Commit 83d18bdf authored by Jean-Philippe Brucker's avatar Jean-Philippe Brucker Committed by Joerg Roedel

iommu/amd: Use pci_prg_resp_pasid_required()

Commit e5567f5f ("PCI/ATS: Add pci_prg_resp_pasid_required()
interface.") added a common interface to check the PASID bit in the PRI
capability. Use it in the AMD driver.
Signed-off-by: default avatarJean-Philippe Brucker <jean-philippe.brucker@arm.com>
Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 15ade5d2
...@@ -2122,23 +2122,6 @@ static int pdev_iommuv2_enable(struct pci_dev *pdev) ...@@ -2122,23 +2122,6 @@ static int pdev_iommuv2_enable(struct pci_dev *pdev)
return ret; return ret;
} }
/* FIXME: Move this to PCI code */
#define PCI_PRI_TLP_OFF (1 << 15)
static bool pci_pri_tlp_required(struct pci_dev *pdev)
{
u16 status;
int pos;
pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
if (!pos)
return false;
pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
return (status & PCI_PRI_TLP_OFF) ? true : false;
}
/* /*
* If a device is not yet associated with a domain, this function makes the * If a device is not yet associated with a domain, this function makes the
* device visible in the domain * device visible in the domain
...@@ -2167,7 +2150,7 @@ static int attach_device(struct device *dev, ...@@ -2167,7 +2150,7 @@ static int attach_device(struct device *dev,
dev_data->ats.enabled = true; dev_data->ats.enabled = true;
dev_data->ats.qdep = pci_ats_queue_depth(pdev); dev_data->ats.qdep = pci_ats_queue_depth(pdev);
dev_data->pri_tlp = pci_pri_tlp_required(pdev); dev_data->pri_tlp = pci_prg_resp_pasid_required(pdev);
} }
} else if (amd_iommu_iotlb_sup && } else if (amd_iommu_iotlb_sup &&
pci_enable_ats(pdev, PAGE_SHIFT) == 0) { pci_enable_ats(pdev, PAGE_SHIFT) == 0) {
......
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