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Commit 847aed39 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'omap-for-v5.1/dt-cpsw-phy' of... 

Merge tag 'omap-for-v5.1/dt-cpsw-phy' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

Device tree changes to make CPSW Ethernet use proper phy driver

We now have a proper PHY driver with drivers/phy/ti/phy-gmii-sel.c to
configure the CPSW PHY. These changes update all CPSW users to use the
new driver that already got merged during v5.0 merge window.

* tag 'omap-for-v5.1/dt-cpsw-phy' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  dt-bindings: net: ti: deprecate cpsw-phy-sel bindings
  ARM: dts: am335x: switch to use phy-gmii-sel
  ARM: dts: am4372: switch to use phy-gmii-sel
  ARM: dts: dm814x: switch to use phy-gmii-sel
  ARM: dts: dra7: switch to use phy-gmii-sel
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 94224c25 bae2bf97
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Showing with 36 additions and 75 deletions
Documentation/devicetree/bindings/net/cpsw-phy-sel.txt
View file @ 847aed39
TI CPSW Phy mode Selection Device Tree Bindings
TI CPSW Phy mode Selection Device Tree Bindings (DEPRECATED)
-----------------------------------------------
Required properties:
......
arch/arm/boot/dts/am335x-baltos-ir2110.dts
View file @ 847aed39
......@@ -72,7 +72,3 @@ &cpsw_emac1 {
dual_emac_res_vlan = <2>;
phy-handle = <&phy1>;
};
&phy_sel {
rmii-clock-ext = <1>;
};
arch/arm/boot/dts/am335x-baltos-ir3220.dts
View file @ 847aed39
......@@ -114,7 +114,3 @@ &cpsw_emac1 {
dual_emac_res_vlan = <2>;
phy-handle = <&phy1>;
};
&phy_sel {
rmii-clock-ext = <1>;
};
arch/arm/boot/dts/am335x-baltos-ir5221.dts
View file @ 847aed39
......@@ -133,10 +133,6 @@ &cpsw_emac1 {
phy-handle = <&phy1>;
};
&phy_sel {
rmii-clock-ext = <1>;
};
&dcan1 {
pinctrl-names = "default";
pinctrl-0 = <&dcan1_pins>;
......
arch/arm/boot/dts/am335x-chiliboard.dts
View file @ 847aed39
......@@ -155,10 +155,6 @@ &cpsw_emac0 {
phy-mode = "rmii";
};
&phy_sel {
rmii-clock-ext;
};
/* USB */
&usb {
status = "okay";
......
arch/arm/boot/dts/am335x-icev2.dts
View file @ 847aed39
......@@ -484,10 +484,6 @@ &mac {
dual_emac;
};
&phy_sel {
rmii-clock-ext;
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
......
arch/arm/boot/dts/am335x-igep0033.dtsi
View file @ 847aed39
......@@ -123,10 +123,6 @@ &cpsw_emac1 {
phy-mode = "rmii";
};
&phy_sel {
rmii-clock-ext;
};
&elm {
status = "okay";
};
......
arch/arm/boot/dts/am335x-lxm.dts
View file @ 847aed39
......@@ -328,10 +328,6 @@ &cpsw_emac1 {
dual_emac_res_vlan = <3>;
};
&phy_sel {
rmii-clock-ext;
};
&mac {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
......
arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi
View file @ 847aed39
......@@ -159,11 +159,6 @@ &cpsw_emac1 {
status = "okay";
};
&phy_sel {
reg= <0x44e10650 0xf5>;
rmii-clock-ext;
};
&sham {
status = "okay";
};
......
arch/arm/boot/dts/am335x-moxa-uc-8100-me-t.dts
View file @ 847aed39
......@@ -446,11 +446,6 @@ &cpsw_emac1 {
dual_emac_res_vlan = <2>;
};
&phy_sel {
reg= <0x44e10650 0xf5>;
rmii-clock-ext;
};
&sham {
status = "okay";
};
......
arch/arm/boot/dts/am335x-phycore-som.dtsi
View file @ 847aed39
......@@ -100,10 +100,6 @@ &mac {
status = "okay";
};
&phy_sel {
rmii-clock-ext;
};
/* I2C Busses */
&am33xx_pinmux {
i2c0_pins: pinmux_i2c0 {
......
arch/arm/boot/dts/am33xx-l4.dtsi
View file @ 847aed39
......@@ -279,12 +279,6 @@ scm: scm@0 {
#pinctrl-cells = <1>;
ranges = <0 0 0x2000>;
phy_sel: cpsw-phy-sel@650 {
compatible = "ti,am3352-cpsw-phy-sel";
reg= <0x650 0x4>;
reg-names = "gmii-sel";
};
am33xx_pinmux: pinmux@800 {
compatible = "pinctrl-single";
reg = <0x800 0x238>;
......@@ -300,6 +294,12 @@ scm_conf: scm_conf@0 {
#size-cells = <1>;
ranges = <0 0 0x800>;
phy_gmii_sel: phy-gmii-sel {
compatible = "ti,am3352-phy-gmii-sel";
reg = <0x650 0x4>;
#phy-cells = <2>;
};
scm_clocks: clocks {
#address-cells = <1>;
#size-cells = <0>;
......@@ -715,7 +715,6 @@ mac: ethernet@0 {
interrupts = <40 41 42 43>;
ranges = <0 0 0x8000>;
syscon = <&scm_conf>;
cpsw-phy-sel = <&phy_sel>;
status = "disabled";
davinci_mdio: mdio@1000 {
......@@ -731,11 +730,13 @@ davinci_mdio: mdio@1000 {
cpsw_emac0: slave@200 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
phys = <&phy_gmii_sel 1 1>;
};
cpsw_emac1: slave@300 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
phys = <&phy_gmii_sel 2 1>;
};
};
};
......
arch/arm/boot/dts/am437x-l4.dtsi
View file @ 847aed39
......@@ -280,12 +280,6 @@ scm: scm@0 {
#size-cells = <1>;
ranges = <0 0 0x4000>;
phy_sel: cpsw-phy-sel@650 {
compatible = "ti,am43xx-cpsw-phy-sel";
reg= <0x650 0x4>;
reg-names = "gmii-sel";
};
am43xx_pinmux: pinmux@800 {
compatible = "ti,am437-padconf",
"pinctrl-single";
......@@ -300,11 +294,17 @@ am43xx_pinmux: pinmux@800 {
};
scm_conf: scm_conf@0 {
compatible = "syscon";
compatible = "syscon", "simple-bus";
reg = <0x0 0x800>;
#address-cells = <1>;
#size-cells = <1>;
phy_gmii_sel: phy-gmii-sel {
compatible = "ti,am43xx-phy-gmii-sel";
reg = <0x650 0x4>;
#phy-cells = <2>;
};
scm_clocks: clocks {
#address-cells = <1>;
#size-cells = <0>;
......@@ -555,7 +555,6 @@ GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
cpts_clock_shift = <29>;
ranges = <0 0 0x8000>;
syscon = <&scm_conf>;
cpsw-phy-sel = <&phy_sel>;
davinci_mdio: mdio@1000 {
compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio";
......@@ -572,11 +571,13 @@ davinci_mdio: mdio@1000 {
cpsw_emac0: slave@200 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
phys = <&phy_gmii_sel 1 0>;
};
cpsw_emac1: slave@300 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
phys = <&phy_gmii_sel 2 0>;
};
};
};
......
arch/arm/boot/dts/am43x-epos-evm.dts
View file @ 847aed39
......@@ -584,10 +584,7 @@ ethphy0: ethernet-phy@16 {
&cpsw_emac0 {
phy-handle = <&ethphy0>;
phy-mode = "rmii";
};
&phy_sel {
rmii-clock-ext;
phys = <&phy_gmii_sel 1 1>;
};
&i2c0 {
......
arch/arm/boot/dts/dm814x.dtsi
View file @ 847aed39
......@@ -405,6 +405,12 @@ scm_conf: scm_conf@0 {
#size-cells = <1>;
ranges = <0 0 0x800>;
phy_gmii_sel: phy-gmii-sel {
compatible = "ti,dm814-phy-gmii-sel";
reg = <0x650 0x4>;
#phy-cells = <1>;
};
scm_clocks: clocks {
#address-cells = <1>;
#size-cells = <0>;
......@@ -611,17 +617,14 @@ davinci_mdio: mdio@4a100800 {
cpsw_emac0: slave@4a100200 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
phys = <&phy_gmii_sel 1>;
};
cpsw_emac1: slave@4a100300 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
};
phy_sel: cpsw-phy-sel@48140650 {
compatible = "ti,am3352-cpsw-phy-sel";
reg= <0x48140650 0x4>;
reg-names = "gmii-sel";
phys = <&phy_gmii_sel 2>;
};
};
......
arch/arm/boot/dts/dra7-l4.dtsi
View file @ 847aed39
......@@ -77,18 +77,18 @@ pbias_mmc_reg: pbias_mmc_omap5 {
};
};
phy_gmii_sel: phy-gmii-sel {
compatible = "ti,dra7xx-phy-gmii-sel";
reg = <0x554 0x4>;
#phy-cells = <1>;
};
scm_conf_clocks: clocks {
#address-cells = <1>;
#size-cells = <0>;
};
};
phy_sel: cpsw-phy-sel@554 {
compatible = "ti,dra7xx-cpsw-phy-sel";
reg= <0x554 0x4>;
reg-names = "gmii-sel";
};
dra7_pmx_core: pinmux@1400 {
compatible = "ti,dra7-padconf",
"pinctrl-single";
......@@ -3099,7 +3099,6 @@ mac: ethernet@0 {
<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
ranges = <0 0 0x4000>;
syscon = <&scm_conf>;
cpsw-phy-sel = <&phy_sel>;
status = "disabled";
davinci_mdio: mdio@1000 {
......@@ -3114,11 +3113,13 @@ davinci_mdio: mdio@1000 {
cpsw_emac0: slave@200 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
phys = <&phy_gmii_sel 1>;
};
cpsw_emac1: slave@300 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
phys = <&phy_gmii_sel 2>;
};
};
};
......
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