Commit 884fb7d0 authored by Boris BREZILLON's avatar Boris BREZILLON Committed by Nicolas Ferre

ARM: at91/dt: move at91sam9261 SoC to the new main clock model

Signed-off-by: default avatarBoris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: default avatarJean-Jacques HIBLOT <jjhiblot@traphandler.com>
Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
parent 58a5c3d8
...@@ -45,6 +45,18 @@ memory { ...@@ -45,6 +45,18 @@ memory {
reg = <0x20000000 0x08000000>; reg = <0x20000000 0x08000000>;
}; };
main_xtal: main_xtal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
slow_xtal: slow_xtal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
ahb { ahb {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <1>; #address-cells = <1>;
...@@ -524,17 +536,24 @@ pmc: pmc@fffffc00 { ...@@ -524,17 +536,24 @@ pmc: pmc@fffffc00 {
#size-cells = <0>; #size-cells = <0>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
clk32k: slck { slow_rc_osc: slow_rc_osc {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>; #clock-cells = <0>;
clock-frequency = <32768>; clock-frequency = <32768>;
clock-accuracy = <50000000>;
};
clk32k: slck {
compatible = "atmel,at91sam9260-clk-slow";
#clock-cells = <0>;
clocks = <&slow_rc_osc &slow_xtal>;
}; };
main: mainck { main: mainck {
compatible = "atmel,at91rm9200-clk-main"; compatible = "atmel,at91rm9200-clk-main";
#clock-cells = <0>; #clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MOSCS>; interrupts-extended = <&pmc AT91_PMC_MOSCS>;
clocks = <&clk32k>; clocks = <&main_xtal>;
}; };
plla: pllack { plla: pllack {
......
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