Commit 8a4816ca authored by Prashant Sreedharan's avatar Prashant Sreedharan Committed by David S. Miller

tg3: Add Macronix NVRAM support

This patch adds the support for Macronix NVRAM
Signed-off-by: default avatarPrashant Sreedharan <prashant.sreedharan@broadcom.com>
Signed-off-by: default avatarSatish Baddipadige <satish.baddipadige@broadcom.com>
Reviewed-by: default avatarMichael Chan <michael.chan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 9ef9633a
...@@ -3227,7 +3227,7 @@ static int tg3_nvram_read_using_eeprom(struct tg3 *tp, ...@@ -3227,7 +3227,7 @@ static int tg3_nvram_read_using_eeprom(struct tg3 *tp,
return 0; return 0;
} }
#define NVRAM_CMD_TIMEOUT 5000 #define NVRAM_CMD_TIMEOUT 10000
static int tg3_nvram_exec_cmd(struct tg3 *tp, u32 nvram_cmd) static int tg3_nvram_exec_cmd(struct tg3 *tp, u32 nvram_cmd)
{ {
...@@ -14789,7 +14789,7 @@ static void tg3_get_5717_nvram_info(struct tg3 *tp) ...@@ -14789,7 +14789,7 @@ static void tg3_get_5717_nvram_info(struct tg3 *tp)
static void tg3_get_5720_nvram_info(struct tg3 *tp) static void tg3_get_5720_nvram_info(struct tg3 *tp)
{ {
u32 nvcfg1, nvmpinstrp; u32 nvcfg1, nvmpinstrp, nv_status;
nvcfg1 = tr32(NVRAM_CFG1); nvcfg1 = tr32(NVRAM_CFG1);
nvmpinstrp = nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK; nvmpinstrp = nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK;
...@@ -14801,6 +14801,23 @@ static void tg3_get_5720_nvram_info(struct tg3 *tp) ...@@ -14801,6 +14801,23 @@ static void tg3_get_5720_nvram_info(struct tg3 *tp)
} }
switch (nvmpinstrp) { switch (nvmpinstrp) {
case FLASH_5762_MX25L_100:
case FLASH_5762_MX25L_200:
case FLASH_5762_MX25L_400:
case FLASH_5762_MX25L_800:
case FLASH_5762_MX25L_160_320:
tp->nvram_pagesize = 4096;
tp->nvram_jedecnum = JEDEC_MACRONIX;
tg3_flag_set(tp, NVRAM_BUFFERED);
tg3_flag_set(tp, NO_NVRAM_ADDR_TRANS);
tg3_flag_set(tp, FLASH);
nv_status = tr32(NVRAM_AUTOSENSE_STATUS);
tp->nvram_size =
(1 << (nv_status >> AUTOSENSE_DEVID &
AUTOSENSE_DEVID_MASK)
<< AUTOSENSE_SIZE_IN_MB);
return;
case FLASH_5762_EEPROM_HD: case FLASH_5762_EEPROM_HD:
nvmpinstrp = FLASH_5720_EEPROM_HD; nvmpinstrp = FLASH_5720_EEPROM_HD;
break; break;
......
...@@ -1863,7 +1863,7 @@ ...@@ -1863,7 +1863,7 @@
#define NVRAM_STAT 0x00007004 #define NVRAM_STAT 0x00007004
#define NVRAM_WRDATA 0x00007008 #define NVRAM_WRDATA 0x00007008
#define NVRAM_ADDR 0x0000700c #define NVRAM_ADDR 0x0000700c
#define NVRAM_ADDR_MSK 0x00ffffff #define NVRAM_ADDR_MSK 0x07ffffff
#define NVRAM_RDDATA 0x00007010 #define NVRAM_RDDATA 0x00007010
#define NVRAM_CFG1 0x00007014 #define NVRAM_CFG1 0x00007014
#define NVRAM_CFG1_FLASHIF_ENAB 0x00000001 #define NVRAM_CFG1_FLASHIF_ENAB 0x00000001
...@@ -1945,6 +1945,11 @@ ...@@ -1945,6 +1945,11 @@
#define FLASH_5720_EEPROM_LD 0x00000003 #define FLASH_5720_EEPROM_LD 0x00000003
#define FLASH_5762_EEPROM_HD 0x02000001 #define FLASH_5762_EEPROM_HD 0x02000001
#define FLASH_5762_EEPROM_LD 0x02000003 #define FLASH_5762_EEPROM_LD 0x02000003
#define FLASH_5762_MX25L_100 0x00800000
#define FLASH_5762_MX25L_200 0x00800002
#define FLASH_5762_MX25L_400 0x00800001
#define FLASH_5762_MX25L_800 0x00800003
#define FLASH_5762_MX25L_160_320 0x03800002
#define FLASH_5720VENDOR_M_ATMEL_DB011D 0x01000000 #define FLASH_5720VENDOR_M_ATMEL_DB011D 0x01000000
#define FLASH_5720VENDOR_M_ATMEL_DB021D 0x01000002 #define FLASH_5720VENDOR_M_ATMEL_DB021D 0x01000002
#define FLASH_5720VENDOR_M_ATMEL_DB041D 0x01000001 #define FLASH_5720VENDOR_M_ATMEL_DB041D 0x01000001
...@@ -2009,7 +2014,11 @@ ...@@ -2009,7 +2014,11 @@
/* 0x702c unused */ /* 0x702c unused */
#define NVRAM_ADDR_LOCKOUT 0x00007030 #define NVRAM_ADDR_LOCKOUT 0x00007030
/* 0x7034 --> 0x7500 unused */ #define NVRAM_AUTOSENSE_STATUS 0x00007038
#define AUTOSENSE_DEVID 0x00000010
#define AUTOSENSE_DEVID_MASK 0x00000007
#define AUTOSENSE_SIZE_IN_MB 17
/* 0x703c --> 0x7500 unused */
#define OTP_MODE 0x00007500 #define OTP_MODE 0x00007500
#define OTP_MODE_OTP_THRU_GRC 0x00000001 #define OTP_MODE_OTP_THRU_GRC 0x00000001
...@@ -3378,6 +3387,7 @@ struct tg3 { ...@@ -3378,6 +3387,7 @@ struct tg3 {
#define JEDEC_ST 0x20 #define JEDEC_ST 0x20
#define JEDEC_SAIFUN 0x4f #define JEDEC_SAIFUN 0x4f
#define JEDEC_SST 0xbf #define JEDEC_SST 0xbf
#define JEDEC_MACRONIX 0xc2
#define ATMEL_AT24C02_CHIP_SIZE TG3_NVRAM_SIZE_2KB #define ATMEL_AT24C02_CHIP_SIZE TG3_NVRAM_SIZE_2KB
#define ATMEL_AT24C02_PAGE_SIZE (8) #define ATMEL_AT24C02_PAGE_SIZE (8)
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment