Commit 8aa04ad3 authored by Adit Ranadive's avatar Adit Ranadive Committed by Jason Gunthorpe

RDMA/vmw_pvrdma: Support upto 64-bit PFNs

Update the driver to use the new device capability to report 64-bit UAR
PFNs.
Reviewed-by: default avatarJorgen Hansen <jhansen@vmware.com>
Signed-off-by: default avatarAdit Ranadive <aditr@vmware.com>
Reviewed-by: default avatarVishnu Dasa <vdasa@vmware.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@mellanox.com>
parent 55c293c3
...@@ -57,7 +57,8 @@ ...@@ -57,7 +57,8 @@
#define PVRDMA_ROCEV1_VERSION 17 #define PVRDMA_ROCEV1_VERSION 17
#define PVRDMA_ROCEV2_VERSION 18 #define PVRDMA_ROCEV2_VERSION 18
#define PVRDMA_VERSION PVRDMA_ROCEV2_VERSION #define PVRDMA_PPN64_VERSION 19
#define PVRDMA_VERSION PVRDMA_PPN64_VERSION
#define PVRDMA_BOARD_ID 1 #define PVRDMA_BOARD_ID 1
#define PVRDMA_REV_ID 1 #define PVRDMA_REV_ID 1
...@@ -279,8 +280,10 @@ struct pvrdma_device_shared_region { ...@@ -279,8 +280,10 @@ struct pvrdma_device_shared_region {
/* W: Async ring page info. */ /* W: Async ring page info. */
struct pvrdma_ring_page_info cq_ring_pages; struct pvrdma_ring_page_info cq_ring_pages;
/* W: CQ ring page info. */ /* W: CQ ring page info. */
u32 uar_pfn; /* W: UAR pageframe. */ union {
u32 pad2; /* Pad to 8-byte align. */ u32 uar_pfn; /* W: UAR pageframe. */
u64 uar_pfn64; /* W: 64-bit UAR page frame. */
};
struct pvrdma_device_caps caps; /* R: Device capabilities. */ struct pvrdma_device_caps caps; /* R: Device capabilities. */
}; };
...@@ -411,8 +414,10 @@ struct pvrdma_cmd_query_pkey_resp { ...@@ -411,8 +414,10 @@ struct pvrdma_cmd_query_pkey_resp {
struct pvrdma_cmd_create_uc { struct pvrdma_cmd_create_uc {
struct pvrdma_cmd_hdr hdr; struct pvrdma_cmd_hdr hdr;
u32 pfn; /* UAR page frame number */ union {
u8 reserved[4]; u32 pfn; /* UAR page frame number */
u64 pfn64; /* 64-bit UAR page frame number */
};
}; };
struct pvrdma_cmd_create_uc_resp { struct pvrdma_cmd_create_uc_resp {
......
...@@ -905,7 +905,11 @@ static int pvrdma_pci_probe(struct pci_dev *pdev, ...@@ -905,7 +905,11 @@ static int pvrdma_pci_probe(struct pci_dev *pdev,
PVRDMA_GOS_BITS_64; PVRDMA_GOS_BITS_64;
dev->dsr->gos_info.gos_type = PVRDMA_GOS_TYPE_LINUX; dev->dsr->gos_info.gos_type = PVRDMA_GOS_TYPE_LINUX;
dev->dsr->gos_info.gos_ver = 1; dev->dsr->gos_info.gos_ver = 1;
dev->dsr->uar_pfn = dev->driver_uar.pfn;
if (dev->dsr_version < PVRDMA_PPN64_VERSION)
dev->dsr->uar_pfn = dev->driver_uar.pfn;
else
dev->dsr->uar_pfn64 = dev->driver_uar.pfn;
/* Command slot. */ /* Command slot. */
dev->cmd_slot = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, dev->cmd_slot = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,
......
...@@ -340,7 +340,12 @@ struct ib_ucontext *pvrdma_alloc_ucontext(struct ib_device *ibdev, ...@@ -340,7 +340,12 @@ struct ib_ucontext *pvrdma_alloc_ucontext(struct ib_device *ibdev,
/* get ctx_handle from host */ /* get ctx_handle from host */
memset(cmd, 0, sizeof(*cmd)); memset(cmd, 0, sizeof(*cmd));
cmd->pfn = context->uar.pfn;
if (vdev->dsr_version < PVRDMA_PPN64_VERSION)
cmd->pfn = context->uar.pfn;
else
cmd->pfn64 = context->uar.pfn;
cmd->hdr.cmd = PVRDMA_CMD_CREATE_UC; cmd->hdr.cmd = PVRDMA_CMD_CREATE_UC;
ret = pvrdma_cmd_post(vdev, &req, &rsp, PVRDMA_CMD_CREATE_UC_RESP); ret = pvrdma_cmd_post(vdev, &req, &rsp, PVRDMA_CMD_CREATE_UC_RESP);
if (ret < 0) { if (ret < 0) {
......
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