Commit 8add7885 authored by Jeff Garzik's avatar Jeff Garzik

[libata] minor fixes

* sata_mv: remove pci_intx(), now that the same function is in PCI core
* sata_sis: fix variable initialization bug, trim trailing whitespace
parent 03981f24
...@@ -699,22 +699,6 @@ static int mv_host_init(struct ata_probe_ent *probe_ent) ...@@ -699,22 +699,6 @@ static int mv_host_init(struct ata_probe_ent *probe_ent)
return rc; return rc;
} }
/* move to PCI layer, integrate w/ MSI stuff */
static void pci_intx(struct pci_dev *pdev, int enable)
{
u16 pci_command, new;
pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
if (enable)
new = pci_command & ~PCI_COMMAND_INTX_DISABLE;
else
new = pci_command | PCI_COMMAND_INTX_DISABLE;
if (new != pci_command)
pci_write_config_word(pdev, PCI_COMMAND, pci_command);
}
static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{ {
static int printed_version = 0; static int printed_version = 0;
......
...@@ -55,7 +55,7 @@ enum { ...@@ -55,7 +55,7 @@ enum {
SIS180_SATA1_OFS = 0x10, /* offset from sata0->sata1 phy regs */ SIS180_SATA1_OFS = 0x10, /* offset from sata0->sata1 phy regs */
SIS182_SATA1_OFS = 0x20, /* offset from sata0->sata1 phy regs */ SIS182_SATA1_OFS = 0x20, /* offset from sata0->sata1 phy regs */
SIS_PMR = 0x90, /* port mapping register */ SIS_PMR = 0x90, /* port mapping register */
SIS_PMR_COMBINED = 0x30, SIS_PMR_COMBINED = 0x30,
/* random bits */ /* random bits */
SIS_FLAG_CFGSCR = (1 << 30), /* host flag: SCRs via PCI cfg */ SIS_FLAG_CFGSCR = (1 << 30), /* host flag: SCRs via PCI cfg */
...@@ -147,11 +147,13 @@ static unsigned int get_scr_cfg_addr(unsigned int port_no, unsigned int sc_reg, ...@@ -147,11 +147,13 @@ static unsigned int get_scr_cfg_addr(unsigned int port_no, unsigned int sc_reg,
{ {
unsigned int addr = SIS_SCR_BASE + (4 * sc_reg); unsigned int addr = SIS_SCR_BASE + (4 * sc_reg);
if (port_no) if (port_no) {
if (device == 0x182) if (device == 0x182)
addr += SIS182_SATA1_OFS; addr += SIS182_SATA1_OFS;
else else
addr += SIS180_SATA1_OFS; addr += SIS180_SATA1_OFS;
}
return addr; return addr;
} }
...@@ -166,10 +168,10 @@ static u32 sis_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg) ...@@ -166,10 +168,10 @@ static u32 sis_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg)
return 0xffffffff; return 0xffffffff;
pci_read_config_byte(pdev, SIS_PMR, &pmr); pci_read_config_byte(pdev, SIS_PMR, &pmr);
pci_read_config_dword(pdev, cfg_addr, &val); pci_read_config_dword(pdev, cfg_addr, &val);
if ((pdev->device == 0x182) || (pmr & SIS_PMR_COMBINED)) if ((pdev->device == 0x182) || (pmr & SIS_PMR_COMBINED))
pci_read_config_dword(pdev, cfg_addr+0x10, &val2); pci_read_config_dword(pdev, cfg_addr+0x10, &val2);
return val|val2; return val|val2;
...@@ -185,7 +187,7 @@ static void sis_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val) ...@@ -185,7 +187,7 @@ static void sis_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val)
return; return;
pci_read_config_byte(pdev, SIS_PMR, &pmr); pci_read_config_byte(pdev, SIS_PMR, &pmr);
pci_write_config_dword(pdev, cfg_addr, val); pci_write_config_dword(pdev, cfg_addr, val);
if ((pdev->device == 0x182) || (pmr & SIS_PMR_COMBINED)) if ((pdev->device == 0x182) || (pmr & SIS_PMR_COMBINED))
...@@ -195,7 +197,7 @@ static void sis_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val) ...@@ -195,7 +197,7 @@ static void sis_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val)
static u32 sis_scr_read (struct ata_port *ap, unsigned int sc_reg) static u32 sis_scr_read (struct ata_port *ap, unsigned int sc_reg)
{ {
struct pci_dev *pdev = to_pci_dev(ap->host_set->dev); struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
u32 val,val2; u32 val, val2 = 0;
u8 pmr; u8 pmr;
if (sc_reg > SCR_CONTROL) if (sc_reg > SCR_CONTROL)
...@@ -209,9 +211,9 @@ static u32 sis_scr_read (struct ata_port *ap, unsigned int sc_reg) ...@@ -209,9 +211,9 @@ static u32 sis_scr_read (struct ata_port *ap, unsigned int sc_reg)
val = inl(ap->ioaddr.scr_addr + (sc_reg * 4)); val = inl(ap->ioaddr.scr_addr + (sc_reg * 4));
if ((pdev->device == 0x182) || (pmr & SIS_PMR_COMBINED)) if ((pdev->device == 0x182) || (pmr & SIS_PMR_COMBINED))
val2 = inl(ap->ioaddr.scr_addr + (sc_reg * 4)+0x10); val2 = inl(ap->ioaddr.scr_addr + (sc_reg * 4) + 0x10);
return val|val2; return val | val2;
} }
static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
...@@ -223,7 +225,7 @@ static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) ...@@ -223,7 +225,7 @@ static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
return; return;
pci_read_config_byte(pdev, SIS_PMR, &pmr); pci_read_config_byte(pdev, SIS_PMR, &pmr);
if (ap->flags & SIS_FLAG_CFGSCR) if (ap->flags & SIS_FLAG_CFGSCR)
sis_scr_cfg_write(ap, sc_reg, val); sis_scr_cfg_write(ap, sc_reg, val);
else { else {
......
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