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Commit 8be5814c authored by Linus Torvalds's avatar Linus Torvalds
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Merge branch 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6 

* 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
  sh: clkfwk: Fix up checkpatch warnings.
  sh: make some needlessly global sh7724 clocks static
  sh: add clk_round_parent() to optimize parent clock rate
  sh: Simplify phys_addr_mask()/PTE_PHYS_MASK for 29/32-bit.
  sh: nommu: Support building without an uncached mapping.
  sh: nommu: use 32-bit phys mode.
  sh: mach-se: Fix up SE7206 no ioport build.
  sh: intc: Update for single IRQ reservation helper.
  sh: clkfwk: Fix up rate rounding error handling.
  sh: mach-se: Rip out superfluous 7751 PIO routines.
  sh: mach-se: Rip out superfluous 770x PIO routines.
  sh: mach-edosk7705: Kill off machtype, consolidate board def.
  sh: mach-edosk7705: update for this century, kill off PIO trapping.
  sh: mach-se: Rip out superfluous 7206 PIO routines.
  sh: mach-systemh: Kill off dead board.
  sh: mach-snapgear: Kill off machtype, consolidate board def.
  sh: mach-snapgear: Rip out superfluous PIO routines.
  sh: mach-microdev: SuperIO-relative ioport mapping.
parents d017bf6b 21e14266
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arch/sh/Kconfig
View file @ 8be5814c
......@@ -193,6 +193,7 @@ config CPU_SH2
config CPU_SH2A
bool
select CPU_SH2
select UNCACHED_MAPPING
config CPU_SH3
bool
......
arch/sh/Makefile
View file @ 8be5814c
......@@ -133,10 +133,7 @@ machdir-$(CONFIG_SOLUTION_ENGINE) += mach-se
machdir-$(CONFIG_SH_HP6XX) += mach-hp6xx
machdir-$(CONFIG_SH_DREAMCAST) += mach-dreamcast
machdir-$(CONFIG_SH_SH03) += mach-sh03
machdir-$(CONFIG_SH_SECUREEDGE5410) += mach-snapgear
machdir-$(CONFIG_SH_RTS7751R2D) += mach-r2d
machdir-$(CONFIG_SH_7751_SYSTEMH) += mach-systemh
machdir-$(CONFIG_SH_EDOSK7705) += mach-edosk7705
machdir-$(CONFIG_SH_HIGHLANDER) += mach-highlander
machdir-$(CONFIG_SH_MIGOR) += mach-migor
machdir-$(CONFIG_SH_AP325RXA) += mach-ap325rxa
......
arch/sh/boards/Kconfig
View file @ 8be5814c
......@@ -81,13 +81,6 @@ config SH_7343_SOLUTION_ENGINE
Select 7343 SolutionEngine if configuring for a Hitachi
SH7343 (SH-Mobile 3AS) evaluation board.
config SH_7751_SYSTEMH
bool "SystemH7751R"
depends on CPU_SUBTYPE_SH7751R
help
Select SystemH if you are configuring for a Renesas SystemH
7751R evaluation board.
config SH_HP6XX
bool "HP6XX"
select SYS_SUPPORTS_APM_EMULATION
......
arch/sh/boards/Makefile
View file @ 8be5814c
......@@ -2,10 +2,12 @@
# Specific board support, not covered by a mach group.
#
obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o
obj-$(CONFIG_SH_SECUREEDGE5410) += board-secureedge5410.o
obj-$(CONFIG_SH_SH2007) += board-sh2007.o
obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o
obj-$(CONFIG_SH_URQUELL) += board-urquell.o
obj-$(CONFIG_SH_SHMIN) += board-shmin.o
obj-$(CONFIG_SH_EDOSK7705) += board-edosk7705.o
obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o
obj-$(CONFIG_SH_ESPT) += board-espt.o
obj-$(CONFIG_SH_POLARIS) += board-polaris.o
......
arch/sh/boards/mach-edosk7705/setup.c → arch/sh/boards/board-edosk7705.c
View file @ 8be5814c
......@@ -10,27 +10,69 @@
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/smc91x.h>
#include <asm/machvec.h>
#include <mach/edosk7705.h>
#include <asm/sizes.h>
#define SMC_IOBASE 0xA2000000
#define SMC_IO_OFFSET 0x300
#define SMC_IOADDR (SMC_IOBASE + SMC_IO_OFFSET)
#define ETHERNET_IRQ 0x09
static void __init sh_edosk7705_init_irq(void)
{
/* This is the Ethernet interrupt */
make_imask_irq(0x09);
make_imask_irq(ETHERNET_IRQ);
}
/* eth initialization functions */
static struct smc91x_platdata smc91x_info = {
.flags = SMC91X_USE_16BIT | SMC91X_IO_SHIFT_1 | IORESOURCE_IRQ_LOWLEVEL,
};
static struct resource smc91x_res[] = {
[0] = {
.start = SMC_IOADDR,
.end = SMC_IOADDR + SZ_32 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = ETHERNET_IRQ,
.end = ETHERNET_IRQ,
.flags = IORESOURCE_IRQ ,
}
};
static struct platform_device smc91x_dev = {
.name = "smc91x",
.id = -1,
.num_resources = ARRAY_SIZE(smc91x_res),
.resource = smc91x_res,
.dev = {
.platform_data = &smc91x_info,
},
};
/* platform init code */
static struct platform_device *edosk7705_devices[] __initdata = {
&smc91x_dev,
};
static int __init init_edosk7705_devices(void)
{
return platform_add_devices(edosk7705_devices,
ARRAY_SIZE(edosk7705_devices));
}
__initcall(init_edosk7705_devices);
/*
* The Machine Vector
*/
static struct sh_machine_vector mv_edosk7705 __initmv = {
.mv_name = "EDOSK7705",
.mv_nr_irqs = 80,
.mv_inb = sh_edosk7705_inb,
.mv_outb = sh_edosk7705_outb,
.mv_insb = sh_edosk7705_insb,
.mv_outsb = sh_edosk7705_outsb,
.mv_init_irq = sh_edosk7705_init_irq,
};
arch/sh/boards/mach-snapgear/setup.c → arch/sh/boards/board-secureedge5410.c
View file @ 8be5814c
/*
* linux/arch/sh/boards/snapgear/setup.c
*
* Copyright (C) 2002 David McCullough <davidm@snapgear.com>
* Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org>
*
......@@ -19,18 +17,19 @@
#include <linux/module.h>
#include <linux/sched.h>
#include <asm/machvec.h>
#include <mach/snapgear.h>
#include <mach/secureedge5410.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <cpu/timer.h>
unsigned short secureedge5410_ioport;
/*
* EraseConfig handling functions
*/
static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id)
{
(void)__raw_readb(0xb8000000); /* dummy read */
ctrl_delay(); /* dummy read */
printk("SnapGear: erase switch interrupt!\n");
......@@ -39,21 +38,22 @@ static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id)
static int __init eraseconfig_init(void)
{
unsigned int irq = evt2irq(0x240);
printk("SnapGear: EraseConfig init\n");
/* Setup "EraseConfig" switch on external IRQ 0 */
if (request_irq(IRL0_IRQ, eraseconfig_interrupt, IRQF_DISABLED,
if (request_irq(irq, eraseconfig_interrupt, IRQF_DISABLED,
"Erase Config", NULL))
printk("SnapGear: failed to register IRQ%d for Reset witch\n",
IRL0_IRQ);
irq);
else
printk("SnapGear: registered EraseConfig switch on IRQ%d\n",
IRL0_IRQ);
return(0);
irq);
return 0;
}
module_init(eraseconfig_init);
/****************************************************************************/
/*
* Initialize IRQ setting
*
......@@ -62,7 +62,6 @@ module_init(eraseconfig_init);
* IRL2 = eth1
* IRL3 = crypto
*/
static void __init init_snapgear_IRQ(void)
{
printk("Setup SnapGear IRQ/IPR ...\n");
......@@ -76,20 +75,5 @@ static void __init init_snapgear_IRQ(void)
static struct sh_machine_vector mv_snapgear __initmv = {
.mv_name = "SnapGear SecureEdge5410",
.mv_nr_irqs = 72,
.mv_inb = snapgear_inb,
.mv_inw = snapgear_inw,
.mv_inl = snapgear_inl,
.mv_outb = snapgear_outb,
.mv_outw = snapgear_outw,
.mv_outl = snapgear_outl,
.mv_inb_p = snapgear_inb_p,
.mv_inw_p = snapgear_inw,
.mv_inl_p = snapgear_inl,
.mv_outb_p = snapgear_outb_p,
.mv_outw_p = snapgear_outw,
.mv_outl_p = snapgear_outl,
.mv_init_irq = init_snapgear_IRQ,
};
arch/sh/boards/mach-edosk7705/Makefile deleted 100644 → 0
View file @ d017bf6b
#
# Makefile for the EDOSK7705 specific parts of the kernel
#
obj-y := setup.o io.o
arch/sh/boards/mach-edosk7705/io.c deleted 100644 → 0
View file @ d017bf6b
/*
* arch/sh/boards/renesas/edosk7705/io.c
*
* Copyright (C) 2001 Ian da Silva, Jeremy Siegel
* Based largely on io_se.c.
*
* I/O routines for Hitachi EDOSK7705 board.
*
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/io.h>
#include <mach/edosk7705.h>
#include <asm/addrspace.h>
#define SMC_IOADDR 0xA2000000
/* Map the Ethernet addresses as if it is at 0x300 - 0x320 */
static unsigned long sh_edosk7705_isa_port2addr(unsigned long port)
{
/*
* SMC91C96 registers are 4 byte aligned rather than the
* usual 2 byte!
*/
if (port >= 0x300 && port < 0x320)
return SMC_IOADDR + ((port - 0x300) * 2);
maybebadio(port);
return port;
}
/* Trying to read / write bytes on odd-byte boundaries to the Ethernet
* registers causes problems. So we bit-shift the value and read / write
* in 2 byte chunks. Setting the low byte to 0 does not cause problems
* now as odd byte writes are only made on the bit mask / interrupt
* register. This may not be the case in future Mar-2003 SJD
*/
unsigned char sh_edosk7705_inb(unsigned long port)
{
if (port >= 0x300 && port < 0x320 && port & 0x01)
return __raw_readw(port - 1) >> 8;
return __raw_readb(sh_edosk7705_isa_port2addr(port));
}
void sh_edosk7705_outb(unsigned char value, unsigned long port)
{
if (port >= 0x300 && port < 0x320 && port & 0x01) {
__raw_writew(((unsigned short)value << 8), port - 1);
return;
}
__raw_writeb(value, sh_edosk7705_isa_port2addr(port));
}
void sh_edosk7705_insb(unsigned long port, void *addr, unsigned long count)
{
unsigned char *p = addr;
while (count--)
*p++ = sh_edosk7705_inb(port);
}
void sh_edosk7705_outsb(unsigned long port, const void *addr, unsigned long count)
{
unsigned char *p = (unsigned char *)addr;
while (count--)
sh_edosk7705_outb(*p++, port);
}
arch/sh/boards/mach-microdev/io.c
View file @ 8be5814c
......@@ -54,7 +54,7 @@
/*
* map I/O ports to memory-mapped addresses
*/
static unsigned long microdev_isa_port2addr(unsigned long offset)
void __iomem *microdev_ioport_map(unsigned long offset, unsigned int len)
{
unsigned long result;
......@@ -72,16 +72,6 @@ static unsigned long microdev_isa_port2addr(unsigned long offset)
* Configuration Registers
*/
result = IO_SUPERIO_PHYS + (offset << 1);
#if 0
} else if (offset == KBD_DATA_REG || offset == KBD_CNTL_REG ||
offset == KBD_STATUS_REG) {
/*
* SMSC FDC37C93xAPM SuperIO chip
*
* PS/2 Keyboard + Mouse (ports 0x60 and 0x64).
*/
result = IO_SUPERIO_PHYS + (offset << 1);
#endif
} else if (((offset >= IO_IDE1_BASE) &&
(offset < IO_IDE1_BASE + IO_IDE_EXTENT)) ||
(offset == IO_IDE1_MISC)) {
......@@ -131,237 +121,5 @@ static unsigned long microdev_isa_port2addr(unsigned long offset)
result = PVR;
}
return result;
}
#define PORT2ADDR(x) (microdev_isa_port2addr(x))
static inline void delay(void)
{
#if defined(CONFIG_PCI)
/* System board present, just make a dummy SRAM access. (CS0 will be
mapped to PCI memory, probably good to avoid it.) */
__raw_readw(0xa6800000);
#else
/* CS0 will be mapped to flash, ROM etc so safe to access it. */
__raw_readw(0xa0000000);
#endif
}
unsigned char microdev_inb(unsigned long port)
{
#ifdef CONFIG_PCI
if (port >= PCIBIOS_MIN_IO)
return microdev_pci_inb(port);
#endif
return *(volatile unsigned char*)PORT2ADDR(port);
}
unsigned short microdev_inw(unsigned long port)
{
#ifdef CONFIG_PCI
if (port >= PCIBIOS_MIN_IO)
return microdev_pci_inw(port);
#endif
return *(volatile unsigned short*)PORT2ADDR(port);
}
unsigned int microdev_inl(unsigned long port)
{
#ifdef CONFIG_PCI
if (port >= PCIBIOS_MIN_IO)
return microdev_pci_inl(port);
#endif
return *(volatile unsigned int*)PORT2ADDR(port);
}
void microdev_outw(unsigned short b, unsigned long port)
{
#ifdef CONFIG_PCI
if (port >= PCIBIOS_MIN_IO) {
microdev_pci_outw(b, port);
return;
}
#endif
*(volatile unsigned short*)PORT2ADDR(port) = b;
}
void microdev_outb(unsigned char b, unsigned long port)
{
#ifdef CONFIG_PCI
if (port >= PCIBIOS_MIN_IO) {
microdev_pci_outb(b, port);
return;
}
#endif
/*
* There is a board feature with the current SH4-202 MicroDev in
* that the 2 byte enables (nBE0 and nBE1) are tied together (and
* to the Chip Select Line (Ethernet_CS)). Due to this connectivity,
* it is not possible to safely perform 8-bit writes to the
* Ethernet registers, as 16-bits will be consumed from the Data
* lines (corrupting the other byte). Hence, this function is
* written to implement 16-bit read/modify/write for all byte-wide
* accesses.
*
* Note: there is no problem with byte READS (even or odd).
*
* Sean McGoogan - 16th June 2003.
*/
if ((port >= IO_LAN91C111_BASE) &&
(port < IO_LAN91C111_BASE + IO_LAN91C111_EXTENT)) {
/*
* Then are trying to perform a byte-write to the
* LAN91C111. This needs special care.
*/
if (port % 2 == 1) { /* is the port odd ? */
/* unset bit-0, i.e. make even */
const unsigned long evenPort = port-1;
unsigned short word;
/*
* do a 16-bit read/write to write to 'port',
* preserving even byte.
*
* Even addresses are bits 0-7
* Odd addresses are bits 8-15
*/
word = microdev_inw(evenPort);
word = (word & 0xffu) | (b << 8);
microdev_outw(word, evenPort);
} else {
/* else, we are trying to do an even byte write */
unsigned short word;
/*
* do a 16-bit read/write to write to 'port',
* preserving odd byte.
*
* Even addresses are bits 0-7
* Odd addresses are bits 8-15
*/
word = microdev_inw(port);
word = (word & 0xff00u) | (b);
microdev_outw(word, port);
}
} else {
*(volatile unsigned char*)PORT2ADDR(port) = b;
}
}
void microdev_outl(unsigned int b, unsigned long port)
{
#ifdef CONFIG_PCI
if (port >= PCIBIOS_MIN_IO) {
microdev_pci_outl(b, port);
return;
}
#endif
*(volatile unsigned int*)PORT2ADDR(port) = b;
}
unsigned char microdev_inb_p(unsigned long port)
{
unsigned char v = microdev_inb(port);
delay();
return v;
}
unsigned short microdev_inw_p(unsigned long port)
{
unsigned short v = microdev_inw(port);
delay();
return v;
}
unsigned int microdev_inl_p(unsigned long port)
{
unsigned int v = microdev_inl(port);
delay();
return v;
}
void microdev_outb_p(unsigned char b, unsigned long port)
{
microdev_outb(b, port);
delay();
}
void microdev_outw_p(unsigned short b, unsigned long port)
{
microdev_outw(b, port);
delay();
}
void microdev_outl_p(unsigned int b, unsigned long port)
{
microdev_outl(b, port);
delay();
}
void microdev_insb(unsigned long port, void *buffer, unsigned long count)
{
volatile unsigned char *port_addr;
unsigned char *buf = buffer;
port_addr = (volatile unsigned char *)PORT2ADDR(port);
while (count--)
*buf++ = *port_addr;
}
void microdev_insw(unsigned long port, void *buffer, unsigned long count)
{
volatile unsigned short *port_addr;
unsigned short *buf = buffer;
port_addr = (volatile unsigned short *)PORT2ADDR(port);
while (count--)
*buf++ = *port_addr;
}
void microdev_insl(unsigned long port, void *buffer, unsigned long count)
{
volatile unsigned long *port_addr;
unsigned int *buf = buffer;
port_addr = (volatile unsigned long *)PORT2ADDR(port);
while (count--)
*buf++ = *port_addr;
}
void microdev_outsb(unsigned long port, const void *buffer, unsigned long count)
{
volatile unsigned char *port_addr;
const unsigned char *buf = buffer;
port_addr = (volatile unsigned char *)PORT2ADDR(port);
while (count--)
*port_addr = *buf++;
}
void microdev_outsw(unsigned long port, const void *buffer, unsigned long count)
{
volatile unsigned short *port_addr;
const unsigned short *buf = buffer;
port_addr = (volatile unsigned short *)PORT2ADDR(port);
while (count--)
*port_addr = *buf++;
}
void microdev_outsl(unsigned long port, const void *buffer, unsigned long count)
{
volatile unsigned long *port_addr;
const unsigned int *buf = buffer;
port_addr = (volatile unsigned long *)PORT2ADDR(port);
while (count--)
*port_addr = *buf++;
return (void __iomem *)result;
}
arch/sh/boards/mach-microdev/setup.c
View file @ 8be5814c
......@@ -195,27 +195,6 @@ device_initcall(microdev_devices_setup);
static struct sh_machine_vector mv_sh4202_microdev __initmv = {
.mv_name = "SH4-202 MicroDev",
.mv_nr_irqs = 72,
.mv_inb = microdev_inb,
.mv_inw = microdev_inw,
.mv_inl = microdev_inl,
.mv_outb = microdev_outb,
.mv_outw = microdev_outw,
.mv_outl = microdev_outl,
.mv_inb_p = microdev_inb_p,
.mv_inw_p = microdev_inw_p,
.mv_inl_p = microdev_inl_p,
.mv_outb_p = microdev_outb_p,
.mv_outw_p = microdev_outw_p,
.mv_outl_p = microdev_outl_p,
.mv_insb = microdev_insb,
.mv_insw = microdev_insw,
.mv_insl = microdev_insl,
.mv_outsb = microdev_outsb,
.mv_outsw = microdev_outsw,
.mv_outsl = microdev_outsl,
.mv_ioport_map = microdev_ioport_map,
.mv_init_irq = init_microdev_irq,
};
arch/sh/boards/mach-se/7206/Makefile
View file @ 8be5814c
......@@ -2,4 +2,4 @@
# Makefile for the 7206 SolutionEngine specific parts of the kernel
#
obj-y := setup.o io.o irq.o
obj-y := setup.o irq.o
arch/sh/boards/mach-se/7206/io.c deleted 100644 → 0
View file @ d017bf6b
/* $Id: io.c,v 1.5 2004/02/22 23:08:43 kkojima Exp $
*
* linux/arch/sh/boards/se/7206/io.c
*
* Copyright (C) 2006 Yoshinori Sato
*
* I/O routine for Hitachi 7206 SolutionEngine.
*
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <asm/io.h>
#include <mach-se/mach/se7206.h>
static inline void delay(void)
{
__raw_readw(0x20000000); /* P2 ROM Area */
}
/* MS7750 requires special versions of in*, out* routines, since
PC-like io ports are located at upper half byte of 16-bit word which
can be accessed only with 16-bit wide. */
static inline volatile __u16 *
port2adr(unsigned int port)
{
if (port >= 0x2000 && port < 0x2020)
return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
else if (port >= 0x300 && port < 0x310)
return (volatile __u16 *) (PA_SMSC + (port - 0x300));
return (volatile __u16 *)port;
}
unsigned char se7206_inb(unsigned long port)
{
return (*port2adr(port)) & 0xff;
}
unsigned char se7206_inb_p(unsigned long port)
{
unsigned long v;
v = (*port2adr(port)) & 0xff;
delay();
return v;
}
unsigned short se7206_inw(unsigned long port)
{
return *port2adr(port);
}
void se7206_outb(unsigned char value, unsigned long port)
{
*(port2adr(port)) = value;
}
void se7206_outb_p(unsigned char value, unsigned long port)
{
*(port2adr(port)) = value;
delay();
}
void se7206_outw(unsigned short value, unsigned long port)
{
*port2adr(port) = value;
}
void se7206_insb(unsigned long port, void *addr, unsigned long count)
{
volatile __u16 *p = port2adr(port);
__u8 *ap = addr;
while (count--)
*ap++ = *p;
}
void se7206_insw(unsigned long port, void *addr, unsigned long count)
{
volatile __u16 *p = port2adr(port);
__u16 *ap = addr;
while (count--)
*ap++ = *p;
}
void se7206_outsb(unsigned long port, const void *addr, unsigned long count)
{
volatile __u16 *p = port2adr(port);
const __u8 *ap = addr;
while (count--)
*p = *ap++;
}
void se7206_outsw(unsigned long port, const void *addr, unsigned long count)
{
volatile __u16 *p = port2adr(port);
const __u16 *ap = addr;
while (count--)
*p = *ap++;
}
arch/sh/boards/mach-se/7206/irq.c
View file @ 8be5814c
......@@ -139,11 +139,13 @@ void __init init_se7206_IRQ(void)
make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */
make_se7206_irq(IRQ1_IRQ); /* ATA */
make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */
__raw_writew(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */
__raw_writew(__raw_readw(INTC_ICR1) | 0x000b, INTC_ICR); /* ICR1 */
/* FPGA System register setup*/
__raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */
__raw_writew(0x0000,INTSTS1); /* Clear INTSTS1 */
/* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */
__raw_writew(0x0001,INTSEL);
}
arch/sh/boards/mach-se/7206/setup.c
View file @ 8be5814c
......@@ -86,20 +86,5 @@ __initcall(se7206_devices_setup);
static struct sh_machine_vector mv_se __initmv = {
.mv_name = "SolutionEngine",
.mv_nr_irqs = 256,
.mv_inb = se7206_inb,
.mv_inw = se7206_inw,
.mv_outb = se7206_outb,
.mv_outw = se7206_outw,
.mv_inb_p = se7206_inb_p,
.mv_inw_p = se7206_inw,
.mv_outb_p = se7206_outb_p,
.mv_outw_p = se7206_outw,
.mv_insb = se7206_insb,
.mv_insw = se7206_insw,
.mv_outsb = se7206_outsb,
.mv_outsw = se7206_outsw,
.mv_init_irq = init_se7206_IRQ,
};
arch/sh/boards/mach-se/770x/Makefile
View file @ 8be5814c
......@@ -2,4 +2,4 @@
# Makefile for the 770x SolutionEngine specific parts of the kernel
#
obj-y := setup.o io.o irq.o
obj-y := setup.o irq.o
arch/sh/boards/mach-se/770x/io.c deleted 100644 → 0
View file @ d017bf6b
/*
* Copyright (C) 2000 Kazumoto Kojima
*
* I/O routine for Hitachi SolutionEngine.
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <asm/io.h>
#include <mach-se/mach/se.h>
/* MS7750 requires special versions of in*, out* routines, since
PC-like io ports are located at upper half byte of 16-bit word which
can be accessed only with 16-bit wide. */
static inline volatile __u16 *
port2adr(unsigned int port)
{
if (port & 0xff000000)
return ( volatile __u16 *) port;
if (port >= 0x2000)
return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
else if (port >= 0x1000)
return (volatile __u16 *) (PA_83902 + (port << 1));
else
return (volatile __u16 *) (PA_SUPERIO + (port << 1));
}
static inline int
shifted_port(unsigned long port)
{
/* For IDE registers, value is not shifted */
if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
return 0;
else
return 1;
}
unsigned char se_inb(unsigned long port)
{
if (shifted_port(port))
return (*port2adr(port) >> 8);
else
return (*port2adr(port))&0xff;
}
unsigned char se_inb_p(unsigned long port)
{
unsigned long v;
if (shifted_port(port))
v = (*port2adr(port) >> 8);
else
v = (*port2adr(port))&0xff;
ctrl_delay();
return v;
}
unsigned short se_inw(unsigned long port)
{
if (port >= 0x2000)
return *port2adr(port);
else
maybebadio(port);
return 0;
}
unsigned int se_inl(unsigned long port)
{
maybebadio(port);
return 0;
}
void se_outb(unsigned char value, unsigned long port)
{
if (shifted_port(port))
*(port2adr(port)) = value << 8;
else
*(port2adr(port)) = value;
}
void se_outb_p(unsigned char value, unsigned long port)
{
if (shifted_port(port))
*(port2adr(port)) = value << 8;
else
*(port2adr(port)) = value;
ctrl_delay();
}
void se_outw(unsigned short value, unsigned long port)
{
if (port >= 0x2000)
*port2adr(port) = value;
else
maybebadio(port);
}
void se_outl(unsigned int value, unsigned long port)
{
maybebadio(port);
}
void se_insb(unsigned long port, void *addr, unsigned long count)
{
volatile __u16 *p = port2adr(port);
__u8 *ap = addr;
if (shifted_port(port)) {
while (count--)
*ap++ = *p >> 8;
} else {
while (count--)
*ap++ = *p;
}
}
void se_insw(unsigned long port, void *addr, unsigned long count)
{
volatile __u16 *p = port2adr(port);
__u16 *ap = addr;
while (count--)
*ap++ = *p;
}
void se_insl(unsigned long port, void *addr, unsigned long count)
{
maybebadio(port);
}
void se_outsb(unsigned long port, const void *addr, unsigned long count)
{
volatile __u16 *p = port2adr(port);
const __u8 *ap = addr;
if (shifted_port(port)) {
while (count--)
*p = *ap++ << 8;
} else {
while (count--)
*p = *ap++;
}
}
void se_outsw(unsigned long port, const void *addr, unsigned long count)
{
volatile __u16 *p = port2adr(port);
const __u16 *ap = addr;
while (count--)
*p = *ap++;
}
void se_outsl(unsigned long port, const void *addr, unsigned long count)
{
maybebadio(port);
}
arch/sh/boards/mach-se/770x/setup.c
View file @ 8be5814c
......@@ -195,27 +195,5 @@ static struct sh_machine_vector mv_se __initmv = {
#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
.mv_nr_irqs = 104,
#endif
.mv_inb = se_inb,
.mv_inw = se_inw,
.mv_inl = se_inl,
.mv_outb = se_outb,
.mv_outw = se_outw,
.mv_outl = se_outl,
.mv_inb_p = se_inb_p,
.mv_inw_p = se_inw,
.mv_inl_p = se_inl,
.mv_outb_p = se_outb_p,
.mv_outw_p = se_outw,
.mv_outl_p = se_outl,
.mv_insb = se_insb,
.mv_insw = se_insw,
.mv_insl = se_insl,
.mv_outsb = se_outsb,
.mv_outsw = se_outsw,
.mv_outsl = se_outsl,
.mv_init_irq = init_se_IRQ,
};
arch/sh/boards/mach-se/7751/Makefile
View file @ 8be5814c
......@@ -2,4 +2,4 @@
# Makefile for the 7751 SolutionEngine specific parts of the kernel
#
obj-y := setup.o io.o irq.o
obj-y := setup.o irq.o
arch/sh/boards/mach-se/7751/io.c deleted 100644 → 0
View file @ d017bf6b
/*
* Copyright (C) 2001 Ian da Silva, Jeremy Siegel
* Based largely on io_se.c.
*
* I/O routine for Hitachi 7751 SolutionEngine.
*
* Initial version only to support LAN access; some
* placeholder code from io_se.c left in with the
* expectation of later SuperIO and PCMCIA access.
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <asm/io.h>
#include <mach-se/mach/se7751.h>
#include <asm/addrspace.h>
static inline volatile u16 *port2adr(unsigned int port)
{
if (port >= 0x2000)
return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
maybebadio((unsigned long)port);
return (volatile __u16*)port;
}
/*
* General outline: remap really low stuff [eventually] to SuperIO,
* stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
* is mapped through the PCI IO window. Stuff with high bits (PXSEG)
* should be way beyond the window, and is used w/o translation for
* compatibility.
*/
unsigned char sh7751se_inb(unsigned long port)
{
if (PXSEG(port))
return *(volatile unsigned char *)port;
else
return (*port2adr(port)) & 0xff;
}
unsigned char sh7751se_inb_p(unsigned long port)
{
unsigned char v;
if (PXSEG(port))
v = *(volatile unsigned char *)port;
else
v = (*port2adr(port)) & 0xff;
ctrl_delay();
return v;
}
unsigned short sh7751se_inw(unsigned long port)
{
if (PXSEG(port))
return *(volatile unsigned short *)port;
else if (port >= 0x2000)
return *port2adr(port);
else
maybebadio(port);
return 0;
}
unsigned int sh7751se_inl(unsigned long port)
{
if (PXSEG(port))
return *(volatile unsigned long *)port;
else if (port >= 0x2000)
return *port2adr(port);
else
maybebadio(port);
return 0;
}
void sh7751se_outb(unsigned char value, unsigned long port)
{
if (PXSEG(port))
*(volatile unsigned char *)port = value;
else
*(port2adr(port)) = value;
}
void sh7751se_outb_p(unsigned char value, unsigned long port)
{
if (PXSEG(port))
*(volatile unsigned char *)port = value;
else
*(port2adr(port)) = value;
ctrl_delay();
}
void sh7751se_outw(unsigned short value, unsigned long port)
{
if (PXSEG(port))
*(volatile unsigned short *)port = value;
else if (port >= 0x2000)
*port2adr(port) = value;
else
maybebadio(port);
}
void sh7751se_outl(unsigned int value, unsigned long port)
{
if (PXSEG(port))
*(volatile unsigned long *)port = value;
else
maybebadio(port);
}
void sh7751se_insl(unsigned long port, void *addr, unsigned long count)
{
maybebadio(port);
}
void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count)
{
maybebadio(port);
}
arch/sh/boards/mach-se/7751/setup.c
View file @ 8be5814c
......@@ -56,23 +56,5 @@ __initcall(se7751_devices_setup);
static struct sh_machine_vector mv_7751se __initmv = {
.mv_name = "7751 SolutionEngine",
.mv_nr_irqs = 72,
.mv_inb = sh7751se_inb,
.mv_inw = sh7751se_inw,
.mv_inl = sh7751se_inl,
.mv_outb = sh7751se_outb,
.mv_outw = sh7751se_outw,
.mv_outl = sh7751se_outl,
.mv_inb_p = sh7751se_inb_p,
.mv_inw_p = sh7751se_inw,
.mv_inl_p = sh7751se_inl,
.mv_outb_p = sh7751se_outb_p,
.mv_outw_p = sh7751se_outw,
.mv_outl_p = sh7751se_outl,
.mv_insl = sh7751se_insl,
.mv_outsl = sh7751se_outsl,
.mv_init_irq = init_7751se_IRQ,
};
arch/sh/boards/mach-snapgear/Makefile deleted 100644 → 0
View file @ d017bf6b
#
# Makefile for the SnapGear specific parts of the kernel
#
obj-y := setup.o io.o
arch/sh/boards/mach-snapgear/io.c deleted 100644 → 0
View file @ d017bf6b
/*
* Copyright (C) 2002 David McCullough <davidm@snapgear.com>
* Copyright (C) 2001 Ian da Silva, Jeremy Siegel
* Based largely on io_se.c.
*
* I/O routine for Hitachi 7751 SolutionEngine.
*
* Initial version only to support LAN access; some
* placeholder code from io_se.c left in with the
* expectation of later SuperIO and PCMCIA access.
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <asm/io.h>
#include <asm/addrspace.h>
#ifdef CONFIG_SH_SECUREEDGE5410
unsigned short secureedge5410_ioport;
#endif
static inline volatile __u16 *port2adr(unsigned int port)
{
maybebadio((unsigned long)port);
return (volatile __u16*)port;
}
/*
* General outline: remap really low stuff [eventually] to SuperIO,
* stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
* is mapped through the PCI IO window. Stuff with high bits (PXSEG)
* should be way beyond the window, and is used w/o translation for
* compatibility.
*/
unsigned char snapgear_inb(unsigned long port)
{
if (PXSEG(port))
return *(volatile unsigned char *)port;
else
return (*port2adr(port)) & 0xff;
}
unsigned char snapgear_inb_p(unsigned long port)
{
unsigned char v;
if (PXSEG(port))
v = *(volatile unsigned char *)port;
else
v = (*port2adr(port))&0xff;
ctrl_delay();
return v;
}
unsigned short snapgear_inw(unsigned long port)
{
if (PXSEG(port))
return *(volatile unsigned short *)port;
else if (port >= 0x2000)
return *port2adr(port);
else
maybebadio(port);
return 0;
}
unsigned int snapgear_inl(unsigned long port)
{
if (PXSEG(port))
return *(volatile unsigned long *)port;
else if (port >= 0x2000)
return *port2adr(port);
else
maybebadio(port);
return 0;
}
void snapgear_outb(unsigned char value, unsigned long port)
{
if (PXSEG(port))
*(volatile unsigned char *)port = value;
else
*(port2adr(port)) = value;
}
void snapgear_outb_p(unsigned char value, unsigned long port)
{
if (PXSEG(port))
*(volatile unsigned char *)port = value;
else
*(port2adr(port)) = value;
ctrl_delay();
}
void snapgear_outw(unsigned short value, unsigned long port)
{
if (PXSEG(port))
*(volatile unsigned short *)port = value;
else if (port >= 0x2000)
*port2adr(port) = value;
else
maybebadio(port);
}
void snapgear_outl(unsigned int value, unsigned long port)
{
if (PXSEG(port))
*(volatile unsigned long *)port = value;
else
maybebadio(port);
}
void snapgear_insl(unsigned long port, void *addr, unsigned long count)
{
maybebadio(port);
}
void snapgear_outsl(unsigned long port, const void *addr, unsigned long count)
{
maybebadio(port);
}
arch/sh/boards/mach-systemh/Makefile deleted 100644 → 0
View file @ d017bf6b
#
# Makefile for the SystemH specific parts of the kernel
#
obj-y := setup.o irq.o io.o
# XXX: This wants to be consolidated in arch/sh/drivers/pci, and more
# importantly, with the generic sh7751_pcic_init() code. For now, we'll
# just abuse the hell out of kbuild, because we can..
obj-$(CONFIG_PCI) += pci.o
pci-y := ../../se/7751/pci.o
arch/sh/boards/mach-systemh/io.c deleted 100644 → 0
View file @ d017bf6b
/*
* linux/arch/sh/boards/renesas/systemh/io.c
*
* Copyright (C) 2001 Ian da Silva, Jeremy Siegel
* Based largely on io_se.c.
*
* I/O routine for Hitachi 7751 Systemh.
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <mach/systemh7751.h>
#include <asm/addrspace.h>
#include <asm/io.h>
#define ETHER_IOMAP(adr) (0xB3000000 + (adr)) /*map to 16bits access area
of smc lan chip*/
static inline volatile __u16 *
port2adr(unsigned int port)
{
if (port >= 0x2000)
return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
maybebadio((unsigned long)port);
return (volatile __u16*)port;
}
/*
* General outline: remap really low stuff [eventually] to SuperIO,
* stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
* is mapped through the PCI IO window. Stuff with high bits (PXSEG)
* should be way beyond the window, and is used w/o translation for
* compatibility.
*/
unsigned char sh7751systemh_inb(unsigned long port)
{
if (PXSEG(port))
return *(volatile unsigned char *)port;
else if (port <= 0x3F1)
return *(volatile unsigned char *)ETHER_IOMAP(port);
else
return (*port2adr(port))&0xff;
}
unsigned char sh7751systemh_inb_p(unsigned long port)
{
unsigned char v;
if (PXSEG(port))
v = *(volatile unsigned char *)port;
else if (port <= 0x3F1)
v = *(volatile unsigned char *)ETHER_IOMAP(port);
else
v = (*port2adr(port))&0xff;
ctrl_delay();
return v;
}
unsigned short sh7751systemh_inw(unsigned long port)
{
if (PXSEG(port))
return *(volatile unsigned short *)port;
else if (port >= 0x2000)
return *port2adr(port);
else if (port <= 0x3F1)
return *(volatile unsigned int *)ETHER_IOMAP(port);
else
maybebadio(port);
return 0;
}
unsigned int sh7751systemh_inl(unsigned long port)
{
if (PXSEG(port))
return *(volatile unsigned long *)port;
else if (port >= 0x2000)
return *port2adr(port);
else if (port <= 0x3F1)
return *(volatile unsigned int *)ETHER_IOMAP(port);
else
maybebadio(port);
return 0;
}
void sh7751systemh_outb(unsigned char value, unsigned long port)
{
if (PXSEG(port))
*(volatile unsigned char *)port = value;
else if (port <= 0x3F1)
*(volatile unsigned char *)ETHER_IOMAP(port) = value;
else
*(port2adr(port)) = value;
}
void sh7751systemh_outb_p(unsigned char value, unsigned long port)
{
if (PXSEG(port))
*(volatile unsigned char *)port = value;
else if (port <= 0x3F1)
*(volatile unsigned char *)ETHER_IOMAP(port) = value;
else
*(port2adr(port)) = value;
ctrl_delay();
}
void sh7751systemh_outw(unsigned short value, unsigned long port)
{
if (PXSEG(port))
*(volatile unsigned short *)port = value;
else if (port >= 0x2000)
*port2adr(port) = value;
else if (port <= 0x3F1)
*(volatile unsigned short *)ETHER_IOMAP(port) = value;
else
maybebadio(port);
}
void sh7751systemh_outl(unsigned int value, unsigned long port)
{
if (PXSEG(port))
*(volatile unsigned long *)port = value;
else
maybebadio(port);
}
void sh7751systemh_insb(unsigned long port, void *addr, unsigned long count)
{
unsigned char *p = addr;
while (count--) *p++ = sh7751systemh_inb(port);
}
void sh7751systemh_insw(unsigned long port, void *addr, unsigned long count)
{
unsigned short *p = addr;
while (count--) *p++ = sh7751systemh_inw(port);
}
void sh7751systemh_insl(unsigned long port, void *addr, unsigned long count)
{
maybebadio(port);
}
void sh7751systemh_outsb(unsigned long port, const void *addr, unsigned long count)
{
unsigned char *p = (unsigned char*)addr;
while (count--) sh7751systemh_outb(*p++, port);
}
void sh7751systemh_outsw(unsigned long port, const void *addr, unsigned long count)
{
unsigned short *p = (unsigned short*)addr;
while (count--) sh7751systemh_outw(*p++, port);
}
void sh7751systemh_outsl(unsigned long port, const void *addr, unsigned long count)
{
maybebadio(port);
}
arch/sh/boards/mach-systemh/irq.c deleted 100644 → 0
View file @ d017bf6b
/*
* linux/arch/sh/boards/renesas/systemh/irq.c
*
* Copyright (C) 2000 Kazumoto Kojima
*
* Hitachi SystemH Support.
*
* Modified for 7751 SystemH by
* Jonathan Short.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <mach/systemh7751.h>
#include <asm/smc37c93x.h>
/* address of external interrupt mask register
* address must be set prior to use these (maybe in init_XXX_irq())
* XXX : is it better to use .config than specifying it in code? */
static unsigned long *systemh_irq_mask_register = (unsigned long *)0xB3F10004;
static unsigned long *systemh_irq_request_register = (unsigned long *)0xB3F10000;
static void disable_systemh_irq(struct irq_data *data)
{
unsigned long val, mask = 0x01 << 1;
/* Clear the "irq"th bit in the mask and set it in the request */
val = __raw_readl((unsigned long)systemh_irq_mask_register);
val &= ~mask;
__raw_writel(val, (unsigned long)systemh_irq_mask_register);
val = __raw_readl((unsigned long)systemh_irq_request_register);
val |= mask;
__raw_writel(val, (unsigned long)systemh_irq_request_register);
}
static void enable_systemh_irq(struct irq_data *data)
{
unsigned long val, mask = 0x01 << 1;
/* Set "irq"th bit in the mask register */
val = __raw_readl((unsigned long)systemh_irq_mask_register);
val |= mask;
__raw_writel(val, (unsigned long)systemh_irq_mask_register);
}
static struct irq_chip systemh_irq_type = {
.name = "SystemH Register",
.irq_unmask = enable_systemh_irq,
.irq_mask = disable_systemh_irq,
};
void make_systemh_irq(unsigned int irq)
{
disable_irq_nosync(irq);
set_irq_chip_and_handler(irq, &systemh_irq_type, handle_level_irq);
disable_systemh_irq(irq_get_irq_data(irq));
}
arch/sh/boards/mach-systemh/setup.c deleted 100644 → 0
View file @ d017bf6b
/*
* linux/arch/sh/boards/renesas/systemh/setup.c
*
* Copyright (C) 2000 Kazumoto Kojima
* Copyright (C) 2003 Paul Mundt
*
* Hitachi SystemH Support.
*
* Modified for 7751 SystemH by Jonathan Short.
*
* Rewritten for 2.6 by Paul Mundt.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <asm/machvec.h>
#include <mach/systemh7751.h>
extern void make_systemh_irq(unsigned int irq);
/*
* Initialize IRQ setting
*/
static void __init sh7751systemh_init_irq(void)
{
make_systemh_irq(0xb); /* Ethernet interrupt */
}
static struct sh_machine_vector mv_7751systemh __initmv = {
.mv_name = "7751 SystemH",
.mv_nr_irqs = 72,
.mv_inb = sh7751systemh_inb,
.mv_inw = sh7751systemh_inw,
.mv_inl = sh7751systemh_inl,
.mv_outb = sh7751systemh_outb,
.mv_outw = sh7751systemh_outw,
.mv_outl = sh7751systemh_outl,
.mv_inb_p = sh7751systemh_inb_p,
.mv_inw_p = sh7751systemh_inw,
.mv_inl_p = sh7751systemh_inl,
.mv_outb_p = sh7751systemh_outb_p,
.mv_outw_p = sh7751systemh_outw,
.mv_outl_p = sh7751systemh_outl,
.mv_insb = sh7751systemh_insb,
.mv_insw = sh7751systemh_insw,
.mv_insl = sh7751systemh_insl,
.mv_outsb = sh7751systemh_outsb,
.mv_outsw = sh7751systemh_outsw,
.mv_outsl = sh7751systemh_outsl,
.mv_init_irq = sh7751systemh_init_irq,
};
arch/sh/configs/systemh_defconfig deleted 100644 → 0
View file @ d017bf6b
CONFIG_EXPERIMENTAL=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_HOTPLUG is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_CPU_SUBTYPE_SH7751R=y
CONFIG_MEMORY_START=0x0c000000
CONFIG_MEMORY_SIZE=0x00400000
CONFIG_FLATMEM_MANUAL=y
CONFIG_SH_7751_SYSTEMH=y
CONFIG_PREEMPT=y
# CONFIG_STANDALONE is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=1024
# CONFIG_INPUT is not set
# CONFIG_SERIO_SERPORT is not set
# CONFIG_VT is not set
CONFIG_HW_RANDOM=y
CONFIG_PROC_KCORE=y
CONFIG_TMPFS=y
CONFIG_CRAMFS=y
CONFIG_ROMFS_FS=y
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
arch/sh/include/asm/addrspace.h
View file @ 8be5814c
......@@ -44,10 +44,10 @@
/*
* These will never work in 32-bit, don't even bother.
*/
#define P1SEGADDR(a) __futile_remapping_attempt
#define P2SEGADDR(a) __futile_remapping_attempt
#define P3SEGADDR(a) __futile_remapping_attempt
#define P4SEGADDR(a) __futile_remapping_attempt
#define P1SEGADDR(a) ({ (void)(a); BUG(); NULL; })
#define P2SEGADDR(a) ({ (void)(a); BUG(); NULL; })
#define P3SEGADDR(a) ({ (void)(a); BUG(); NULL; })
#define P4SEGADDR(a) ({ (void)(a); BUG(); NULL; })
#endif
#endif /* P1SEG */
......
arch/sh/include/asm/pgtable.h
View file @ 8be5814c
......@@ -66,7 +66,6 @@ static inline unsigned long long neff_sign_extend(unsigned long val)
#define PHYS_ADDR_MASK29 0x1fffffff
#define PHYS_ADDR_MASK32 0xffffffff
#ifdef CONFIG_PMB
static inline unsigned long phys_addr_mask(void)
{
/* Is the MMU in 29bit mode? */
......@@ -75,17 +74,6 @@ static inline unsigned long phys_addr_mask(void)
return PHYS_ADDR_MASK32;
}
#elif defined(CONFIG_32BIT)
static inline unsigned long phys_addr_mask(void)
{
return PHYS_ADDR_MASK32;
}
#else
static inline unsigned long phys_addr_mask(void)
{
return PHYS_ADDR_MASK29;
}
#endif
#define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK)
#define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT)
......
arch/sh/include/asm/system.h
View file @ 8be5814c
......@@ -10,6 +10,7 @@
#include <linux/compiler.h>
#include <linux/linkage.h>
#include <asm/types.h>
#include <asm/uncached.h>
#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */
......@@ -137,9 +138,6 @@ extern unsigned int instruction_size(unsigned int insn);
#define instruction_size(insn) (4)
#endif
extern unsigned long cached_to_uncached;
extern unsigned long uncached_size;
void per_cpu_trap_init(void);
void default_idle(void);
void cpu_idle_wait(void);
......
arch/sh/include/asm/system_32.h
View file @ 8be5814c
......@@ -145,42 +145,6 @@ do { \
__restore_dsp(prev); \
} while (0)
/*
* Jump to uncached area.
* When handling TLB or caches, we need to do it from an uncached area.
*/
#define jump_to_uncached() \
do { \
unsigned long __dummy; \
\
__asm__ __volatile__( \
"mova 1f, %0\n\t" \
"add %1, %0\n\t" \
"jmp @%0\n\t" \
" nop\n\t" \
".balign 4\n" \
"1:" \
: "=&z" (__dummy) \
: "r" (cached_to_uncached)); \
} while (0)
/*
* Back to cached area.
*/
#define back_to_cached() \
do { \
unsigned long __dummy; \
ctrl_barrier(); \
__asm__ __volatile__( \
"mov.l 1f, %0\n\t" \
"jmp @%0\n\t" \
" nop\n\t" \
".balign 4\n" \
"1: .long 2f\n" \
"2:" \
: "=&r" (__dummy)); \
} while (0)
#ifdef CONFIG_CPU_HAS_SR_RB
#define lookup_exception_vector() \
({ \
......
arch/sh/include/asm/system_64.h
View file @ 8be5814c
......@@ -34,9 +34,6 @@ do { \
&next->thread); \
} while (0)
#define jump_to_uncached() do { } while (0)
#define back_to_cached() do { } while (0)
#define __icbi(addr) __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr))
#define __ocbp(addr) __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr))
#define __ocbi(addr) __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr))
......
arch/sh/include/asm/uncached.h
View file @ 8be5814c
......@@ -4,15 +4,55 @@
#include <linux/bug.h>
#ifdef CONFIG_UNCACHED_MAPPING
extern unsigned long cached_to_uncached;
extern unsigned long uncached_size;
extern unsigned long uncached_start, uncached_end;
extern int virt_addr_uncached(unsigned long kaddr);
extern void uncached_init(void);
extern void uncached_resize(unsigned long size);
/*
* Jump to uncached area.
* When handling TLB or caches, we need to do it from an uncached area.
*/
#define jump_to_uncached() \
do { \
unsigned long __dummy; \
\
__asm__ __volatile__( \
"mova 1f, %0\n\t" \
"add %1, %0\n\t" \
"jmp @%0\n\t" \
" nop\n\t" \
".balign 4\n" \
"1:" \
: "=&z" (__dummy) \
: "r" (cached_to_uncached)); \
} while (0)
/*
* Back to cached area.
*/
#define back_to_cached() \
do { \
unsigned long __dummy; \
ctrl_barrier(); \
__asm__ __volatile__( \
"mov.l 1f, %0\n\t" \
"jmp @%0\n\t" \
" nop\n\t" \
".balign 4\n" \
"1: .long 2f\n" \
"2:" \
: "=&r" (__dummy)); \
} while (0)
#else
#define virt_addr_uncached(kaddr) (0)
#define uncached_init() do { } while (0)
#define uncached_resize(size) BUG()
#define jump_to_uncached() do { } while (0)
#define back_to_cached() do { } while (0)
#endif
#endif /* __ASM_SH_UNCACHED_H */
arch/sh/include/mach-common/mach/edosk7705.h deleted 100644 → 0
View file @ d017bf6b
#ifndef __ASM_SH_EDOSK7705_H
#define __ASM_SH_EDOSK7705_H
#define __IO_PREFIX sh_edosk7705
#include <asm/io_generic.h>
#endif /* __ASM_SH_EDOSK7705_H */
arch/sh/include/mach-common/mach/microdev.h
View file @ 8be5814c
......@@ -68,13 +68,4 @@ extern void microdev_print_fpga_intc_status(void);
#define __IO_PREFIX microdev
#include <asm/io_generic.h>
#if defined(CONFIG_PCI)
unsigned char microdev_pci_inb(unsigned long port);
unsigned short microdev_pci_inw(unsigned long port);
unsigned long microdev_pci_inl(unsigned long port);
void microdev_pci_outb(unsigned char data, unsigned long port);
void microdev_pci_outw(unsigned short data, unsigned long port);
void microdev_pci_outl(unsigned long data, unsigned long port);
#endif
#endif /* __ASM_SH_MICRODEV_H */
arch/sh/include/mach-common/mach/snapgear.h → arch/sh/include/mach-common/mach/secureedge5410.h
View file @ 8be5814c
......@@ -12,30 +12,9 @@
#ifndef _ASM_SH_IO_SNAPGEAR_H
#define _ASM_SH_IO_SNAPGEAR_H
#if defined(CONFIG_CPU_SH4)
/*
* The external interrupt lines, these take up ints 0 - 15 inclusive
* depending on the priority for the interrupt. In fact the priority
* is the interrupt :-)
*/
#define IRL0_IRQ 2
#define IRL0_PRIORITY 13
#define IRL1_IRQ 5
#define IRL1_PRIORITY 10
#define IRL2_IRQ 8
#define IRL2_PRIORITY 7
#define IRL3_IRQ 11
#define IRL3_PRIORITY 4
#endif
#define __IO_PREFIX snapgear
#include <asm/io_generic.h>
#ifdef CONFIG_SH_SECUREEDGE5410
/*
* We need to remember what was written to the ioport as some bits
* are shared with other functions and you cannot read back what was
......@@ -66,6 +45,5 @@ extern unsigned short secureedge5410_ioport;
((secureedge5410_ioport & ~(mask)) | ((val) & (mask)))))
#define SECUREEDGE_READ_IOPORT() \
((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817))
#endif
#endif /* _ASM_SH_IO_SNAPGEAR_H */
arch/sh/include/mach-common/mach/systemh7751.h deleted 100644 → 0
View file @ d017bf6b
#ifndef __ASM_SH_SYSTEMH_7751SYSTEMH_H
#define __ASM_SH_SYSTEMH_7751SYSTEMH_H
/*
* linux/include/asm-sh/systemh/7751systemh.h
*
* Copyright (C) 2000 Kazumoto Kojima
*
* Hitachi SystemH support
* Modified for 7751 SystemH by
* Jonathan Short, 2002.
*/
/* Box specific addresses. */
#define PA_ROM 0x00000000 /* EPROM */
#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */
#define PA_FROM 0x01000000 /* EPROM */
#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */
#define PA_EXT1 0x04000000
#define PA_EXT1_SIZE 0x04000000
#define PA_EXT2 0x08000000
#define PA_EXT2_SIZE 0x04000000
#define PA_SDRAM 0x0c000000
#define PA_SDRAM_SIZE 0x04000000
#define PA_EXT4 0x12000000
#define PA_EXT4_SIZE 0x02000000
#define PA_EXT5 0x14000000
#define PA_EXT5_SIZE 0x04000000
#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */
#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */
#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */
#define PA_LED 0xba000000 /* LED */
#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */
#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */
#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */
#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */
#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */
#define MRSHPC_MODE (PA_MRSHPC + 4)
#define MRSHPC_OPTION (PA_MRSHPC + 6)
#define MRSHPC_CSR (PA_MRSHPC + 8)
#define MRSHPC_ISR (PA_MRSHPC + 10)
#define MRSHPC_ICR (PA_MRSHPC + 12)
#define MRSHPC_CPWCR (PA_MRSHPC + 14)
#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
#define MRSHPC_CDCR (PA_MRSHPC + 28)
#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
#define BCR_ILCRA (PA_BCR + 0)
#define BCR_ILCRB (PA_BCR + 2)
#define BCR_ILCRC (PA_BCR + 4)
#define BCR_ILCRD (PA_BCR + 6)
#define BCR_ILCRE (PA_BCR + 8)
#define BCR_ILCRF (PA_BCR + 10)
#define BCR_ILCRG (PA_BCR + 12)
#define IRQ_79C973 13
#define __IO_PREFIX sh7751systemh
#include <asm/io_generic.h>
#endif /* __ASM_SH_SYSTEMH_7751SYSTEMH_H */
arch/sh/kernel/cpu/sh4a/clock-sh7724.c
View file @ 8be5814c
......@@ -48,7 +48,7 @@ static struct clk r_clk = {
* Default rate for the root input clock, reset this with clk_set_rate()
* from the platform code.
*/
struct clk extal_clk = {
static struct clk extal_clk = {
.rate = 33333333,
};
......@@ -111,7 +111,7 @@ static struct clk div3_clk = {
.parent = &pll_clk,
};
struct clk *main_clks[] = {
static struct clk *main_clks[] = {
&r_clk,
&extal_clk,
&fll_clk,
......@@ -156,7 +156,7 @@ struct clk div4_clks[DIV4_NR] = {
enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR };
struct clk div6_clks[DIV6_NR] = {
static struct clk div6_clks[DIV6_NR] = {
[DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0),
[DIV6_FA] = SH_CLK_DIV6(&div3_clk, FCLKACR, 0),
[DIV6_FB] = SH_CLK_DIV6(&div3_clk, FCLKBCR, 0),
......
arch/sh/mm/Kconfig
View file @ 8be5814c
......@@ -79,7 +79,7 @@ config 29BIT
config 32BIT
bool
default y if CPU_SH5
default y if CPU_SH5 || !MMU
config PMB
bool "Support 32-bit physical addressing through PMB"
......
arch/sh/mm/consistent.c
View file @ 8be5814c
......@@ -79,21 +79,20 @@ void dma_generic_free_coherent(struct device *dev, size_t size,
void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
enum dma_data_direction direction)
{
#if defined(CONFIG_CPU_SH5) || defined(CONFIG_PMB)
void *p1addr = vaddr;
#else
void *p1addr = (void*) P1SEGADDR((unsigned long)vaddr);
#endif
void *addr;
addr = __in_29bit_mode() ?
(void *)P1SEGADDR((unsigned long)vaddr) : vaddr;
switch (direction) {
case DMA_FROM_DEVICE: /* invalidate only */
__flush_invalidate_region(p1addr, size);
__flush_invalidate_region(addr, size);
break;
case DMA_TO_DEVICE: /* writeback only */
__flush_wback_region(p1addr, size);
__flush_wback_region(addr, size);
break;
case DMA_BIDIRECTIONAL: /* writeback and invalidate */
__flush_purge_region(p1addr, size);
__flush_purge_region(addr, size);
break;
default:
BUG();
......
arch/sh/mm/uncached.c
View file @ 8be5814c
......@@ -28,7 +28,7 @@ EXPORT_SYMBOL(virt_addr_uncached);
void __init uncached_init(void)
{
#ifdef CONFIG_29BIT
#if defined(CONFIG_29BIT) || !defined(CONFIG_MMU)
uncached_start = P2SEG;
#else
uncached_start = memory_end;
......
arch/sh/tools/mach-types
View file @ 8be5814c
......@@ -26,7 +26,6 @@ HD64461 HD64461
7724SE SH_7724_SOLUTION_ENGINE
7751SE SH_7751_SOLUTION_ENGINE
7780SE SH_7780_SOLUTION_ENGINE
7751SYSTEMH SH_7751_SYSTEMH
HP6XX SH_HP6XX
DREAMCAST SH_DREAMCAST
SNAPGEAR SH_SECUREEDGE5410
......
drivers/rtc/rtc-ds1302.c
View file @ 8be5814c
......@@ -35,7 +35,7 @@
#ifdef CONFIG_SH_SECUREEDGE5410
#include <asm/rtc.h>
#include <mach/snapgear.h>
#include <mach/secureedge5410.h>
#define RTC_RESET 0x1000
#define RTC_IODATA 0x0800
......
drivers/sh/clk/core.c
View file @ 8be5814c
......@@ -90,8 +90,8 @@ struct clk_rate_round_data {
static long clk_rate_round_helper(struct clk_rate_round_data *rounder)
{
unsigned long rate_error, rate_error_prev = ~0UL;
unsigned long rate_best_fit = rounder->rate;
unsigned long highest, lowest, freq;
long rate_best_fit = -ENOENT;
int i;
highest = 0;
......@@ -146,7 +146,7 @@ long clk_rate_table_round(struct clk *clk,
};
if (clk->nr_freqs < 1)
return 0;
return -ENOSYS;
return clk_rate_round_helper(&table_round);
}
......@@ -541,6 +541,98 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
}
EXPORT_SYMBOL_GPL(clk_round_rate);
long clk_round_parent(struct clk *clk, unsigned long target,
unsigned long *best_freq, unsigned long *parent_freq,
unsigned int div_min, unsigned int div_max)
{
struct cpufreq_frequency_table *freq, *best = NULL;
unsigned long error = ULONG_MAX, freq_high, freq_low, div;
struct clk *parent = clk_get_parent(clk);
if (!parent) {
*parent_freq = 0;
*best_freq = clk_round_rate(clk, target);
return abs(target - *best_freq);
}
for (freq = parent->freq_table; freq->frequency != CPUFREQ_TABLE_END;
freq++) {
if (freq->frequency == CPUFREQ_ENTRY_INVALID)
continue;
if (unlikely(freq->frequency / target <= div_min - 1)) {
unsigned long freq_max;
freq_max = (freq->frequency + div_min / 2) / div_min;
if (error > target - freq_max) {
error = target - freq_max;
best = freq;
if (best_freq)
*best_freq = freq_max;
}
pr_debug("too low freq %lu, error %lu\n", freq->frequency,
target - freq_max);
if (!error)
break;
continue;
}
if (unlikely(freq->frequency / target >= div_max)) {
unsigned long freq_min;
freq_min = (freq->frequency + div_max / 2) / div_max;
if (error > freq_min - target) {
error = freq_min - target;
best = freq;
if (best_freq)
*best_freq = freq_min;
}
pr_debug("too high freq %lu, error %lu\n", freq->frequency,
freq_min - target);
if (!error)
break;
continue;
}
div = freq->frequency / target;
freq_high = freq->frequency / div;
freq_low = freq->frequency / (div + 1);
if (freq_high - target < error) {
error = freq_high - target;
best = freq;
if (best_freq)
*best_freq = freq_high;
}
if (target - freq_low < error) {
error = target - freq_low;
best = freq;
if (best_freq)
*best_freq = freq_low;
}
pr_debug("%u / %lu = %lu, / %lu = %lu, best %lu, parent %u\n",
freq->frequency, div, freq_high, div + 1, freq_low,
*best_freq, best->frequency);
if (!error)
break;
}
if (parent_freq)
*parent_freq = best->frequency;
return error;
}
EXPORT_SYMBOL_GPL(clk_round_parent);
#ifdef CONFIG_PM
static int clks_sysdev_suspend(struct sys_device *dev, pm_message_t state)
{
......
drivers/sh/intc/core.c
View file @ 8be5814c
......@@ -79,7 +79,7 @@ static void __init intc_register_irq(struct intc_desc *desc,
* Register the IRQ position with the global IRQ map, then insert
* it in to the radix tree.
*/
irq_reserve_irqs(irq, 1);
irq_reserve_irq(irq);
raw_spin_lock_irqsave(&intc_big_lock, flags);
radix_tree_insert(&d->tree, enum_id, intc_irq_xlate_get(irq));
......
drivers/sh/intc/dynamic.c
View file @ 8be5814c
......@@ -60,5 +60,5 @@ void reserve_intc_vectors(struct intc_vect *vectors, unsigned int nr_vecs)
int i;
for (i = 0; i < nr_vecs; i++)
irq_reserve_irqs(evt2irq(vectors[i].vect), 1);
irq_reserve_irq(evt2irq(vectors[i].vect));
}
include/linux/sh_clk.h
View file @ 8be5814c
......@@ -122,6 +122,10 @@ int clk_rate_table_find(struct clk *clk,
long clk_rate_div_range_round(struct clk *clk, unsigned int div_min,
unsigned int div_max, unsigned long rate);
long clk_round_parent(struct clk *clk, unsigned long target,
unsigned long *best_freq, unsigned long *parent_freq,
unsigned int div_min, unsigned int div_max);
#define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \
{ \
.parent = _parent, \
......
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