ARM: dts: vf610-zii: Disable SNVS RTC

None of these vf610-zii boards have a battery or super-capacitor
holding up power to the SNVS RTC embedded in the Vybrid SoC,
so it is preferable to disable the snvsrtc node.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

arch/arm/boot/dts/vf610-zii-cfu1.dts

@@ -236,6 +236,10 @@ at24c04@54 {
 	};
 };
 
+&snvsrtc {
+	status = "disabled";
+};
+
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart0>;

arch/arm/boot/dts/vf610-zii-scu4-aib.dts

@@ -671,6 +671,10 @@ sff9_i2c: i2c@5 {
 	};
 };
 
+&snvsrtc {
+	status = "disabled";
+};
+
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart0>;

arch/arm/boot/dts/vf610-zii-ssmb-dtu.dts

@@ -211,6 +211,10 @@ eeprom@52 {
 	};
 };
 
+&snvsrtc {
+	status = "disabled";
+};
+
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart0>;

arch/arm/boot/dts/vf610-zii-ssmb-spu3.dts

@@ -219,6 +219,10 @@ at24c04@52 {
 	};
 };
 
+&snvsrtc {
+	status = "disabled";
+};
+
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart0>;