Commit 8ebd4cf1 authored by Easwar Hariharan's avatar Easwar Hariharan Committed by Doug Ledford

staging/rdma/hfi1: Add active and optical cable support

This patch qualifies and tunes active and optical cables for optimal
bit error rate and signal integrity settings. These settings are
fetched from the platform configuration data.

Based on attributes of the QSFP cable as read from the SFF-8636
compliant memory map, we select the appropriate settings from the
platform configuration data (examples: TX/RX equalization, enabling
cable high power, enabling TX/RX clock data recovery mechanisms, and RX
amplitude control) and apply them to the SERDES and QSFP cable.

The platform configuration data also contains system parameters such
as maximum power dissipation supported, and the cables are qualified
based on these parameters. As part of qualifying the cables, the
correct OfflineDisabledReasons are set for the appropriate scenarios.
Reviewed-by: default avatarDean Luick <dean.luick@intel.com>
Reviewed-by: default avatarMike Marciniszyn <mike.marciniszyn@intel.com>
Reviewed-by: default avatarBrent R Rothermel <brent.r.rothermel@intel.com>
Signed-off-by: default avatarEaswar Hariharan <easwar.hariharan@intel.com>
Signed-off-by: default avatarJubin John <jubin.john@intel.com>
Signed-off-by: default avatarDennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: default avatarDoug Ledford <dledford@redhat.com>
parent c7cb7635
......@@ -8,7 +8,7 @@
obj-$(CONFIG_INFINIBAND_HFI1) += hfi1.o
hfi1-y := chip.o device.o diag.o driver.o efivar.o eprom.o file_ops.o firmware.o \
init.o intr.o mad.o pcie.o pio.o pio_copy.o \
init.o intr.o mad.o pcie.o pio.o pio_copy.o platform.o \
qp.o qsfp.o rc.o ruc.o sdma.o sysfs.o trace.o twsi.o \
uc.o ud.o user_exp_rcv.o user_pages.o user_sdma.o verbs.o
hfi1-$(CONFIG_DEBUG_FS) += debugfs.o
......
This diff is collapsed.
......@@ -371,6 +371,9 @@
#define NUM_LANE_FIELDS 0x8
/* 8051 general register Field IDs */
#define LINK_OPTIMIZATION_SETTINGS 0x00
#define LINK_TUNING_PARAMETERS 0x02
#define DC_HOST_COMM_SETTINGS 0x03
#define TX_SETTINGS 0x06
#define VERIFY_CAP_LOCAL_PHY 0x07
#define VERIFY_CAP_LOCAL_FABRIC 0x08
......@@ -647,10 +650,13 @@ void handle_link_down(struct work_struct *work);
void handle_link_downgrade(struct work_struct *work);
void handle_link_bounce(struct work_struct *work);
void handle_sma_message(struct work_struct *work);
void reset_qsfp(struct hfi1_pportdata *ppd);
void qsfp_event(struct work_struct *work);
void start_freeze_handling(struct hfi1_pportdata *ppd, int flags);
int send_idle_sma(struct hfi1_devdata *dd, u64 message);
int load_8051_config(struct hfi1_devdata *, u8, u8, u32);
int read_8051_config(struct hfi1_devdata *, u8, u8, u32 *);
int start_link(struct hfi1_pportdata *ppd);
void init_qsfp(struct hfi1_pportdata *ppd);
int bringup_serdes(struct hfi1_pportdata *ppd);
void set_intr_state(struct hfi1_devdata *dd, u32 enable);
void apply_link_downgrade_policy(struct hfi1_pportdata *ppd,
......
......@@ -74,7 +74,7 @@
#include "chip.h"
#include "mad.h"
#include "qsfp.h"
#include "platform_config.h"
#include "platform.h"
/* bumped 1 from s/w major version of TrueScale */
#define HFI1_CHIP_VERS_MAJ 3U
......@@ -563,7 +563,8 @@ struct hfi1_pportdata {
struct kobject sl2sc_kobj;
struct kobject vl2mtu_kobj;
/* QSFP support */
/* PHY support */
u32 port_type;
struct qsfp_data qsfp_info;
/* GUID for this interface, in host order */
......
......@@ -500,10 +500,13 @@ void hfi1_init_pportdata(struct pci_dev *pdev, struct hfi1_pportdata *ppd,
INIT_WORK(&ppd->sma_message_work, handle_sma_message);
INIT_WORK(&ppd->link_bounce_work, handle_link_bounce);
INIT_WORK(&ppd->linkstate_active_work, receive_interrupt_work);
INIT_WORK(&ppd->qsfp_info.qsfp_work, qsfp_event);
mutex_init(&ppd->hls_lock);
spin_lock_init(&ppd->sdma_alllock);
spin_lock_init(&ppd->qsfp_info.qsfp_lock);
ppd->qsfp_info.ppd = ppd;
ppd->sm_trap_qp = 0x0;
ppd->sa_qp = 0x1;
......@@ -781,13 +784,6 @@ int hfi1_init(struct hfi1_devdata *dd, int reinit)
for (pidx = 0; pidx < dd->num_pports; ++pidx) {
ppd = dd->pport + pidx;
/* initialize the qsfp if it exists
* Requires interrupts to be enabled so we are notified
* when the QSFP completes reset, and has
* to be done before bringing up the SERDES
*/
init_qsfp(ppd);
/* start the serdes - must be after interrupts are
enabled so we are notified when the link goes up */
lastfail = bringup_serdes(ppd);
......
This diff is collapsed.
......@@ -47,8 +47,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef __PLATFORM_CONFIG_H
#define __PLATFORM_CONFIG_H
#ifndef __PLATFORM_H
#define __PLATFORM_H
#define METADATA_TABLE_FIELD_START_SHIFT 0
#define METADATA_TABLE_FIELD_START_LEN_BITS 15
......@@ -94,17 +94,18 @@ enum platform_config_system_table_fields {
enum platform_config_port_table_fields {
PORT_TABLE_RESERVED,
PORT_TABLE_PORT_TYPE,
PORT_TABLE_ATTENUATION_12G,
PORT_TABLE_ATTENUATION_25G,
PORT_TABLE_LOCAL_ATTEN_12G,
PORT_TABLE_LOCAL_ATTEN_25G,
PORT_TABLE_LINK_SPEED_SUPPORTED,
PORT_TABLE_LINK_WIDTH_SUPPORTED,
PORT_TABLE_AUTO_LANE_SHEDDING_ENABLED,
PORT_TABLE_EXTERNAL_LOOPBACK_ALLOWED,
PORT_TABLE_VL_CAP,
PORT_TABLE_MTU_CAP,
PORT_TABLE_TX_LANE_ENABLE_MASK,
PORT_TABLE_LOCAL_MAX_TIMEOUT,
PORT_TABLE_AUTO_LANE_SHEDDING_ENABLED,
PORT_TABLE_EXTERNAL_LOOPBACK_ALLOWED,
PORT_TABLE_TX_PRESET_IDX_PASSIVE_CU,
PORT_TABLE_REMOTE_ATTEN_12G,
PORT_TABLE_REMOTE_ATTEN_25G,
PORT_TABLE_TX_PRESET_IDX_ACTIVE_NO_EQ,
PORT_TABLE_TX_PRESET_IDX_ACTIVE_EQ,
PORT_TABLE_RX_PRESET_IDX,
......@@ -115,10 +116,10 @@ enum platform_config_port_table_fields {
enum platform_config_rx_preset_table_fields {
RX_PRESET_TABLE_RESERVED,
RX_PRESET_TABLE_QSFP_RX_CDR_APPLY,
RX_PRESET_TABLE_QSFP_RX_EQ_APPLY,
RX_PRESET_TABLE_QSFP_RX_EMP_APPLY,
RX_PRESET_TABLE_QSFP_RX_AMP_APPLY,
RX_PRESET_TABLE_QSFP_RX_CDR,
RX_PRESET_TABLE_QSFP_RX_EQ,
RX_PRESET_TABLE_QSFP_RX_EMP,
RX_PRESET_TABLE_QSFP_RX_AMP,
RX_PRESET_TABLE_MAX
};
......@@ -179,9 +180,11 @@ static const u32 platform_config_table_limits[PLATFORM_CONFIG_TABLE_MAX] = {
* fields defined for each table above
*/
/*=====================================================
/*
*=====================================================
* System table encodings
*====================================================*/
*====================================================
*/
#define PLATFORM_CONFIG_MAGIC_NUM 0x3d4f5041
#define PLATFORM_CONFIG_MAGIC_NUMBER_LEN 4
......@@ -199,12 +202,13 @@ enum platform_config_qsfp_power_class_encoding {
QSFP_POWER_CLASS_7
};
/*=====================================================
/*
*=====================================================
* Port table encodings
*==================================================== */
*====================================================
*/
enum platform_config_port_type_encoding {
PORT_TYPE_RESERVED,
PORT_TYPE_UNKNOWN,
PORT_TYPE_DISCONNECTED,
PORT_TYPE_FIXED,
PORT_TYPE_VARIABLE,
......@@ -283,4 +287,12 @@ enum platform_config_local_max_timeout_encoding {
LOCAL_MAX_TIMEOUT_1000_S
};
#endif /*__PLATFORM_CONFIG_H*/
enum link_tuning_encoding {
OPA_PASSIVE_TUNING,
OPA_ACTIVE_TUNING,
OPA_UNKNOWN_TUNING
};
int set_qsfp_tx(struct hfi1_pportdata *ppd, int on);
void tune_serdes(struct hfi1_pportdata *ppd);
#endif /*__PLATFORM_H*/
......@@ -213,7 +213,8 @@ struct qsfp_data {
u8 cache[QSFP_MAX_NUM_PAGES*128];
spinlock_t qsfp_lock;
u8 check_interrupt_flags;
u8 qsfp_interrupt_functional;
u8 reset_needed;
u8 limiting_active;
u8 cache_valid;
u8 cache_refresh_required;
};
......
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