Commit 8f2b841a authored by Benoit Parrot's avatar Benoit Parrot Committed by Mauro Carvalho Chehab

media: dt-bindings: media: cal: update binding to use syscon

Update Device Tree bindings for the CAL driver to use syscon to access
the phy config register instead of trying to map it directly.
Signed-off-by: default avatarBenoit Parrot <bparrot@ti.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent e42617b8
...@@ -10,9 +10,14 @@ Required properties: ...@@ -10,9 +10,14 @@ Required properties:
- compatible: must be "ti,dra72-cal" - compatible: must be "ti,dra72-cal"
- reg: CAL Top level, Receiver Core #0, Receiver Core #1 and Camera RX - reg: CAL Top level, Receiver Core #0, Receiver Core #1 and Camera RX
control address space control address space
- reg-names: cal_top, cal_rx_core0, cal_rx_core1, and camerrx_control - reg-names: cal_top, cal_rx_core0, cal_rx_core1 and camerrx_control
registers registers
- interrupts: should contain IRQ line for the CAL; - interrupts: should contain IRQ line for the CAL;
- ti,camerrx-control: phandle to the device control module and offset to
the control_camerarx_core register.
This node is meant to replace the "camerrx_control"
reg entry above but "camerrx_control" is still
handled for backward compatibility.
CAL supports 2 camera port nodes on MIPI bus. Each CSI2 camera port nodes CAL supports 2 camera port nodes on MIPI bus. Each CSI2 camera port nodes
should contain a 'port' child node with child 'endpoint' node. Please should contain a 'port' child node with child 'endpoint' node. Please
...@@ -25,13 +30,12 @@ Example: ...@@ -25,13 +30,12 @@ Example:
ti,hwmods = "cal"; ti,hwmods = "cal";
reg = <0x4845B000 0x400>, reg = <0x4845B000 0x400>,
<0x4845B800 0x40>, <0x4845B800 0x40>,
<0x4845B900 0x40>, <0x4845B900 0x40>;
<0x4A002e94 0x4>;
reg-names = "cal_top", reg-names = "cal_top",
"cal_rx_core0", "cal_rx_core0",
"cal_rx_core1", "cal_rx_core1";
"camerrx_control";
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
ti,camerrx-control = <&scm_conf 0xE94>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
......
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