Commit 8f3931ed authored by Boris Brezillon's avatar Boris Brezillon Committed by Miquel Raynal

mtd: rawnand: fscm: Avoid collision on PC def when compiling for MIPS

We want to allow this driver to be selected when COMPILE_TEST=y, this
means the driver can be compiled for any arch, including MIPS. When
compiling this driver for MIPS, we end up with a collision on the 'PC'
macro definition (also defined in arch/mips/include/asm/ptrace.h).

Prefix the fsmc one with FSMC_ to avoid this problem.
Signed-off-by: default avatarBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
parent e37db6df
...@@ -62,7 +62,7 @@ ...@@ -62,7 +62,7 @@
reg) reg)
/* fsmc controller registers for NAND flash */ /* fsmc controller registers for NAND flash */
#define PC 0x00 #define FSMC_PC 0x00
/* pc register definitions */ /* pc register definitions */
#define FSMC_RESET (1 << 0) #define FSMC_RESET (1 << 0)
#define FSMC_WAITON (1 << 1) #define FSMC_WAITON (1 << 1)
...@@ -273,12 +273,13 @@ static void fsmc_nand_setup(struct fsmc_nand_data *host, ...@@ -273,12 +273,13 @@ static void fsmc_nand_setup(struct fsmc_nand_data *host,
tset = (tims->tset & FSMC_TSET_MASK) << FSMC_TSET_SHIFT; tset = (tims->tset & FSMC_TSET_MASK) << FSMC_TSET_SHIFT;
if (host->nand.options & NAND_BUSWIDTH_16) if (host->nand.options & NAND_BUSWIDTH_16)
writel_relaxed(value | FSMC_DEVWID_16, host->regs_va + PC); writel_relaxed(value | FSMC_DEVWID_16,
host->regs_va + FSMC_PC);
else else
writel_relaxed(value | FSMC_DEVWID_8, host->regs_va + PC); writel_relaxed(value | FSMC_DEVWID_8, host->regs_va + FSMC_PC);
writel_relaxed(readl(host->regs_va + PC) | tclr | tar, writel_relaxed(readl(host->regs_va + FSMC_PC) | tclr | tar,
host->regs_va + PC); host->regs_va + FSMC_PC);
writel_relaxed(thiz | thold | twait | tset, host->regs_va + COMM); writel_relaxed(thiz | thold | twait | tset, host->regs_va + COMM);
writel_relaxed(thiz | thold | twait | tset, host->regs_va + ATTRIB); writel_relaxed(thiz | thold | twait | tset, host->regs_va + ATTRIB);
} }
...@@ -371,12 +372,12 @@ static void fsmc_enable_hwecc(struct mtd_info *mtd, int mode) ...@@ -371,12 +372,12 @@ static void fsmc_enable_hwecc(struct mtd_info *mtd, int mode)
{ {
struct fsmc_nand_data *host = mtd_to_fsmc(mtd); struct fsmc_nand_data *host = mtd_to_fsmc(mtd);
writel_relaxed(readl(host->regs_va + PC) & ~FSMC_ECCPLEN_256, writel_relaxed(readl(host->regs_va + FSMC_PC) & ~FSMC_ECCPLEN_256,
host->regs_va + PC); host->regs_va + FSMC_PC);
writel_relaxed(readl(host->regs_va + PC) & ~FSMC_ECCEN, writel_relaxed(readl(host->regs_va + FSMC_PC) & ~FSMC_ECCEN,
host->regs_va + PC); host->regs_va + FSMC_PC);
writel_relaxed(readl(host->regs_va + PC) | FSMC_ECCEN, writel_relaxed(readl(host->regs_va + FSMC_PC) | FSMC_ECCEN,
host->regs_va + PC); host->regs_va + FSMC_PC);
} }
/* /*
...@@ -618,11 +619,11 @@ static void fsmc_select_chip(struct mtd_info *mtd, int chipnr) ...@@ -618,11 +619,11 @@ static void fsmc_select_chip(struct mtd_info *mtd, int chipnr)
if (chipnr > 0) if (chipnr > 0)
return; return;
pc = readl(host->regs_va + PC); pc = readl(host->regs_va + FSMC_PC);
if (chipnr < 0) if (chipnr < 0)
writel_relaxed(pc & ~FSMC_ENABLE, host->regs_va + PC); writel_relaxed(pc & ~FSMC_ENABLE, host->regs_va + FSMC_PC);
else else
writel_relaxed(pc | FSMC_ENABLE, host->regs_va + PC); writel_relaxed(pc | FSMC_ENABLE, host->regs_va + FSMC_PC);
/* nCE line must be asserted before starting any operation */ /* nCE line must be asserted before starting any operation */
mb(); mb();
......
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