Commit 9110cac9 authored by Andrew Morton's avatar Andrew Morton Committed by Dave Jones

[PATCH] fix to support discontigmem for 16way x440

From: Patricia Gaughen <gone@us.ibm.com>

The boot-time ioermap code needs to invalidate the tlb entries after setting
up the new pte.
parent 5958cbab
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
#undef CONFIG_X86_PAE #undef CONFIG_X86_PAE
#include <asm/page.h> #include <asm/page.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/tlbflush.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/stddef.h> #include <linux/stddef.h>
...@@ -48,10 +49,12 @@ static void __boot_ioremap(unsigned long phys_addr, unsigned long nrpages, ...@@ -48,10 +49,12 @@ static void __boot_ioremap(unsigned long phys_addr, unsigned long nrpages,
{ {
boot_pte_t* pte; boot_pte_t* pte;
int i; int i;
char *vaddr = virtual_source;
pte = boot_vaddr_to_pte(virtual_source); pte = boot_vaddr_to_pte(virtual_source);
for (i=0; i < nrpages; i++, phys_addr += PAGE_SIZE, pte++) { for (i=0; i < nrpages; i++, phys_addr += PAGE_SIZE, pte++) {
set_pte(pte, pfn_pte(phys_addr>>PAGE_SHIFT, PAGE_KERNEL)); set_pte(pte, pfn_pte(phys_addr>>PAGE_SHIFT, PAGE_KERNEL));
__flush_tlb_one(&vaddr[i*PAGE_SIZE]);
} }
} }
......
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