Commit 922680b9 authored by Shannon Nelson's avatar Shannon Nelson Committed by Jeff Kirsher

i40e: whitespace paren and comment tweaks

Addresses a few code format issues that have crept in over time.

Change-Id: I1a62cbd16b29a218a933b0f7176abe748f9615e8
Signed-off-by: default avatarMitch Williams <mitch.a.williams@intel.com>
Signed-off-by: default avatarShannon Nelson <shannon.nelson@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent a4bcfbb7
...@@ -672,7 +672,7 @@ static bool i40e_asq_done(struct i40e_hw *hw) ...@@ -672,7 +672,7 @@ static bool i40e_asq_done(struct i40e_hw *hw)
/* AQ designers suggest use of head for better /* AQ designers suggest use of head for better
* timing reliability than DD bit * timing reliability than DD bit
*/ */
return (rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use); return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use;
} }
...@@ -682,7 +682,7 @@ static bool i40e_asq_done(struct i40e_hw *hw) ...@@ -682,7 +682,7 @@ static bool i40e_asq_done(struct i40e_hw *hw)
* @desc: prefilled descriptor describing the command (non DMA mem) * @desc: prefilled descriptor describing the command (non DMA mem)
* @buff: buffer to use for indirect commands * @buff: buffer to use for indirect commands
* @buff_size: size of buffer for indirect commands * @buff_size: size of buffer for indirect commands
* @opaque: pointer to info to be used in async cleanup * @cmd_details: pointer to command details structure
* *
* This is the main send command driver routine for the Admin Queue send * This is the main send command driver routine for the Admin Queue send
* queue. It runs the queue, cleans the queue, etc * queue. It runs the queue, cleans the queue, etc
......
...@@ -406,6 +406,7 @@ i40e_status i40e_pf_reset(struct i40e_hw *hw) ...@@ -406,6 +406,7 @@ i40e_status i40e_pf_reset(struct i40e_hw *hw)
} }
i40e_clear_pxe_mode(hw); i40e_clear_pxe_mode(hw);
return 0; return 0;
} }
......
...@@ -89,7 +89,7 @@ typedef void (*I40E_ADMINQ_CALLBACK)(struct i40e_hw *, struct i40e_aq_desc *); ...@@ -89,7 +89,7 @@ typedef void (*I40E_ADMINQ_CALLBACK)(struct i40e_hw *, struct i40e_aq_desc *);
#define I40E_QTX_CTL_VF_QUEUE 0x0 #define I40E_QTX_CTL_VF_QUEUE 0x0
#define I40E_QTX_CTL_PF_QUEUE 0x2 #define I40E_QTX_CTL_PF_QUEUE 0x2
/* debug masks */ /* debug masks - set these bits in hw->debug_mask to control output */
enum i40e_debug_mask { enum i40e_debug_mask {
I40E_DEBUG_INIT = 0x00000001, I40E_DEBUG_INIT = 0x00000001,
I40E_DEBUG_RELEASE = 0x00000002, I40E_DEBUG_RELEASE = 0x00000002,
...@@ -103,10 +103,10 @@ enum i40e_debug_mask { ...@@ -103,10 +103,10 @@ enum i40e_debug_mask {
I40E_DEBUG_DCB = 0x00000400, I40E_DEBUG_DCB = 0x00000400,
I40E_DEBUG_DIAG = 0x00000800, I40E_DEBUG_DIAG = 0x00000800,
I40E_DEBUG_AQ_MESSAGE = 0x01000000, /* for i40e_debug() */ I40E_DEBUG_AQ_MESSAGE = 0x01000000,
I40E_DEBUG_AQ_DESCRIPTOR = 0x02000000, I40E_DEBUG_AQ_DESCRIPTOR = 0x02000000,
I40E_DEBUG_AQ_DESC_BUFFER = 0x04000000, I40E_DEBUG_AQ_DESC_BUFFER = 0x04000000,
I40E_DEBUG_AQ_COMMAND = 0x06000000, /* for i40e_debug_aq() */ I40E_DEBUG_AQ_COMMAND = 0x06000000,
I40E_DEBUG_AQ = 0x0F000000, I40E_DEBUG_AQ = 0x0F000000,
I40E_DEBUG_USER = 0xF0000000, I40E_DEBUG_USER = 0xF0000000,
...@@ -520,7 +520,7 @@ enum i40e_rx_desc_status_bits { ...@@ -520,7 +520,7 @@ enum i40e_rx_desc_status_bits {
#define I40E_RXD_QW1_STATUS_TSYNVALID_SHIFT I40E_RX_DESC_STATUS_TSYNVALID_SHIFT #define I40E_RXD_QW1_STATUS_TSYNVALID_SHIFT I40E_RX_DESC_STATUS_TSYNVALID_SHIFT
#define I40E_RXD_QW1_STATUS_TSYNVALID_MASK (0x1UL << \ #define I40E_RXD_QW1_STATUS_TSYNVALID_MASK (0x1UL << \
I40E_RXD_QW1_STATUS_TSYNVALID_SHIFT) I40E_RXD_QW1_STATUS_TSYNVALID_SHIFT)
enum i40e_rx_desc_fltstat_values { enum i40e_rx_desc_fltstat_values {
I40E_RX_DESC_FLTSTAT_NO_DATA = 0, I40E_RX_DESC_FLTSTAT_NO_DATA = 0,
......
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