Commit 928c4a5c authored by Leo Yan's avatar Leo Yan Committed by Wei Xu

arm64: dts: Hi3660: Remove 'CPU_NAP' idle state

Thanks a lot for Vincent Guittot careful work to find bug for 'CPU_NAP'
idle state.  At early time, the CPU CA73 CPU_NAP idle state has been
supported on Hikey960.  Later we found the system has the hang issue
and for resolving this issue Hisilicon released new MCU firmware, but
unfortunately the new MCU firmware has side effect and results in the
CA73 CPU cannot really enter CPU_NAP state and roll back to WFI state.

After discussion we cannot see the possibility to enable CA73 CPU_NAP
state anymore on Hikey960, based on this conclusion we should remove
this state from DT binding.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Kevin Wang <jean.wangtao@linaro.org>
Cc: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: default avatarLeo Yan <leo.yan@linaro.org>
Tested-by: default avatarVincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: default avatarWei Xu <xuwei5@hisilicon.com>
parent 6bbec98e
...@@ -100,11 +100,7 @@ cpu4: cpu@100 { ...@@ -100,11 +100,7 @@ cpu4: cpu@100 {
reg = <0x0 0x100>; reg = <0x0 0x100>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A73_L2>; next-level-cache = <&A73_L2>;
cpu-idle-states = < cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_1>;
&CPU_NAP
&CPU_SLEEP
&CLUSTER_SLEEP_1
>;
capacity-dmips-mhz = <1024>; capacity-dmips-mhz = <1024>;
}; };
...@@ -114,11 +110,7 @@ cpu5: cpu@101 { ...@@ -114,11 +110,7 @@ cpu5: cpu@101 {
reg = <0x0 0x101>; reg = <0x0 0x101>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A73_L2>; next-level-cache = <&A73_L2>;
cpu-idle-states = < cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_1>;
&CPU_NAP
&CPU_SLEEP
&CLUSTER_SLEEP_1
>;
capacity-dmips-mhz = <1024>; capacity-dmips-mhz = <1024>;
}; };
...@@ -128,11 +120,7 @@ cpu6: cpu@102 { ...@@ -128,11 +120,7 @@ cpu6: cpu@102 {
reg = <0x0 0x102>; reg = <0x0 0x102>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A73_L2>; next-level-cache = <&A73_L2>;
cpu-idle-states = < cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_1>;
&CPU_NAP
&CPU_SLEEP
&CLUSTER_SLEEP_1
>;
capacity-dmips-mhz = <1024>; capacity-dmips-mhz = <1024>;
}; };
...@@ -142,25 +130,13 @@ cpu7: cpu@103 { ...@@ -142,25 +130,13 @@ cpu7: cpu@103 {
reg = <0x0 0x103>; reg = <0x0 0x103>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A73_L2>; next-level-cache = <&A73_L2>;
cpu-idle-states = < cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_1>;
&CPU_NAP
&CPU_SLEEP
&CLUSTER_SLEEP_1
>;
capacity-dmips-mhz = <1024>; capacity-dmips-mhz = <1024>;
}; };
idle-states { idle-states {
entry-method = "psci"; entry-method = "psci";
CPU_NAP: cpu-nap {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0000001>;
entry-latency-us = <7>;
exit-latency-us = <2>;
min-residency-us = <15>;
};
CPU_SLEEP: cpu-sleep { CPU_SLEEP: cpu-sleep {
compatible = "arm,idle-state"; compatible = "arm,idle-state";
local-timer-stop; local-timer-stop;
......
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