Commit 9778256b authored by Lee Jones's avatar Lee Jones Committed by Linus Walleij

dmaengine: ste_dma40: Separate Logical Global Interrupt Mask (GIM) unmasking

During the initial setup of a logical channel, it is necessary to unmask
the GIM in order to receive generated terminal count and error interrupts.
We're separating out this required code so it will be possible to move
the remaining code in d40_phy_cfg(), which is mostly runtime configuration
into the runtime_config() routine.

Cc: Dan Williams <djbw@fb.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Rabin Vincent <rabin@rab.in>
Acked-by: default avatarVinod Koul <vinod.koul@intel.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 252f27b0
...@@ -2513,6 +2513,10 @@ static int d40_alloc_chan_resources(struct dma_chan *chan) ...@@ -2513,6 +2513,10 @@ static int d40_alloc_chan_resources(struct dma_chan *chan)
d40c->lcpa = d40c->base->lcpa_base + d40c->lcpa = d40c->base->lcpa_base +
d40c->dma_cfg.dev_type * d40c->dma_cfg.dev_type *
D40_LCPA_CHAN_SIZE + D40_LCPA_CHAN_DST_DELTA; D40_LCPA_CHAN_SIZE + D40_LCPA_CHAN_DST_DELTA;
/* Unmask the Global Interrupt Mask. */
d40c->src_def_cfg |= BIT(D40_SREG_CFG_LOG_GIM_POS);
d40c->dst_def_cfg |= BIT(D40_SREG_CFG_LOG_GIM_POS);
} }
dev_dbg(chan2dev(d40c), "allocated %s channel (phy %d%s)\n", dev_dbg(chan2dev(d40c), "allocated %s channel (phy %d%s)\n",
......
...@@ -107,11 +107,6 @@ void d40_phy_cfg(struct stedma40_chan_cfg *cfg, ...@@ -107,11 +107,6 @@ void d40_phy_cfg(struct stedma40_chan_cfg *cfg,
src |= 1 << D40_SREG_CFG_PRI_POS; src |= 1 << D40_SREG_CFG_PRI_POS;
dst |= 1 << D40_SREG_CFG_PRI_POS; dst |= 1 << D40_SREG_CFG_PRI_POS;
} }
} else {
/* Logical channel */
dst |= 1 << D40_SREG_CFG_LOG_GIM_POS;
src |= 1 << D40_SREG_CFG_LOG_GIM_POS;
} }
if (cfg->src_info.big_endian) if (cfg->src_info.big_endian)
......
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