Commit 9812186f authored by Alexander Viro's avatar Alexander Viro Committed by Linus Torvalds

[PATCH] (8/12) offb iomem annotations

Signed-off-by: default avatarAl Viro <viro@parcelfarce.linux.theplanet.co.uk>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent eeedbb47
...@@ -47,20 +47,14 @@ enum { ...@@ -47,20 +47,14 @@ enum {
}; };
struct offb_par { struct offb_par {
volatile unsigned char *cmap_adr; volatile void __iomem *cmap_adr;
volatile unsigned char *cmap_data; volatile void __iomem *cmap_data;
int cmap_type; int cmap_type;
int blanked; int blanked;
}; };
struct offb_par default_par; struct offb_par default_par;
#ifdef __powerpc__
#define mach_eieio() eieio()
#else
#define mach_eieio() do {} while (0)
#endif
/* /*
* Interface used by the world * Interface used by the world
*/ */
...@@ -110,44 +104,36 @@ static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, ...@@ -110,44 +104,36 @@ static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
switch (par->cmap_type) { switch (par->cmap_type) {
case cmap_m64: case cmap_m64:
*par->cmap_adr = regno; writeb(regno, par->cmap_adr);
mach_eieio(); writeb(red, par->cmap_data);
*par->cmap_data = red; writeb(green, par->cmap_data);
mach_eieio(); writeb(blue, par->cmap_data);
*par->cmap_data = green;
mach_eieio();
*par->cmap_data = blue;
mach_eieio();
break; break;
case cmap_M3A: case cmap_M3A:
/* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */ /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
out_le32((unsigned *) (par->cmap_adr + 0x58), out_le32(par->cmap_adr + 0x58,
in_le32((unsigned *) (par->cmap_adr + in_le32(par->cmap_adr + 0x58) & ~0x20);
0x58)) & ~0x20);
case cmap_r128: case cmap_r128:
/* Set palette index & data */ /* Set palette index & data */
out_8(par->cmap_adr + 0xb0, regno); out_8(par->cmap_adr + 0xb0, regno);
out_le32((unsigned *) (par->cmap_adr + 0xb4), out_le32(par->cmap_adr + 0xb4,
(red << 16 | green << 8 | blue)); (red << 16 | green << 8 | blue));
break; break;
case cmap_M3B: case cmap_M3B:
/* Set PALETTE_ACCESS_CNTL in DAC_CNTL */ /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
out_le32((unsigned *) (par->cmap_adr + 0x58), out_le32(par->cmap_adr + 0x58,
in_le32((unsigned *) (par->cmap_adr + in_le32(par->cmap_adr + 0x58) | 0x20);
0x58)) | 0x20);
/* Set palette index & data */ /* Set palette index & data */
out_8(par->cmap_adr + 0xb0, regno); out_8(par->cmap_adr + 0xb0, regno);
out_le32((unsigned *) (par->cmap_adr + 0xb4), out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
(red << 16 | green << 8 | blue));
break; break;
case cmap_radeon: case cmap_radeon:
/* Set palette index & data (could be smarter) */ /* Set palette index & data (could be smarter) */
out_8(par->cmap_adr + 0xb0, regno); out_8(par->cmap_adr + 0xb0, regno);
out_le32((unsigned *) (par->cmap_adr + 0xb4), out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
(red << 16 | green << 8 | blue));
break; break;
case cmap_gxt2000: case cmap_gxt2000:
out_le32((unsigned *) par->cmap_adr + regno, out_le32((unsigned __iomem *) par->cmap_adr + regno,
(red << 16 | green << 8 | blue)); (red << 16 | green << 8 | blue));
break; break;
} }
...@@ -191,47 +177,33 @@ static int offb_blank(int blank, struct fb_info *info) ...@@ -191,47 +177,33 @@ static int offb_blank(int blank, struct fb_info *info)
for (i = 0; i < 256; i++) { for (i = 0; i < 256; i++) {
switch (par->cmap_type) { switch (par->cmap_type) {
case cmap_m64: case cmap_m64:
*par->cmap_adr = i; writeb(i, par->cmap_adr);
mach_eieio(); for (j = 0; j < 3; j++)
for (j = 0; j < 3; j++) { writeb(0, par->cmap_data);
*par->cmap_data = 0;
mach_eieio();
}
break; break;
case cmap_M3A: case cmap_M3A:
/* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */ /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
out_le32((unsigned *) (par->cmap_adr + out_le32(par->cmap_adr + 0x58,
0x58), in_le32(par->cmap_adr + 0x58) & ~0x20);
in_le32((unsigned *) (par->
cmap_adr +
0x58)) &
~0x20);
case cmap_r128: case cmap_r128:
/* Set palette index & data */ /* Set palette index & data */
out_8(par->cmap_adr + 0xb0, i); out_8(par->cmap_adr + 0xb0, i);
out_le32((unsigned *) (par->cmap_adr + out_le32(par->cmap_adr + 0xb4, 0);
0xb4), 0);
break; break;
case cmap_M3B: case cmap_M3B:
/* Set PALETTE_ACCESS_CNTL in DAC_CNTL */ /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
out_le32((unsigned *) (par->cmap_adr + out_le32(par->cmap_adr + 0x58,
0x58), in_le32(par->cmap_adr + 0x58) | 0x20);
in_le32((unsigned *) (par->
cmap_adr +
0x58)) |
0x20);
/* Set palette index & data */ /* Set palette index & data */
out_8(par->cmap_adr + 0xb0, i); out_8(par->cmap_adr + 0xb0, i);
out_le32((unsigned *) (par->cmap_adr + out_le32(par->cmap_adr + 0xb4, 0);
0xb4), 0);
break; break;
case cmap_radeon: case cmap_radeon:
out_8(par->cmap_adr + 0xb0, i); out_8(par->cmap_adr + 0xb0, i);
out_le32((unsigned *) (par->cmap_adr + out_le32(par->cmap_adr + 0xb4, 0);
0xb4), 0);
break; break;
case cmap_gxt2000: case cmap_gxt2000:
out_le32((unsigned *) par->cmap_adr + i, out_le32((unsigned __iomem *) par->cmap_adr + i,
0); 0);
break; break;
} }
......
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