Commit 9937f5ff authored by Zubair Lutfullah Kakakhel's avatar Zubair Lutfullah Kakakhel Committed by Ralf Baechle

MIPS: xilfpga: Add mipsfpga platform code

The xilfpga platform will be DT only.

Add required platform code.
DT files have already been added separately.
Signed-off-by: default avatarZubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: robh+dt@kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11364/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 552b8b36
...@@ -33,6 +33,7 @@ platforms += sibyte ...@@ -33,6 +33,7 @@ platforms += sibyte
platforms += sni platforms += sni
platforms += txx9 platforms += txx9
platforms += vr41xx platforms += vr41xx
platforms += xilfpga
# include the platform specific files # include the platform specific files
include $(patsubst %, $(srctree)/arch/mips/%/Platform, $(platforms)) include $(patsubst %, $(srctree)/arch/mips/%/Platform, $(platforms))
...@@ -404,6 +404,28 @@ config MACH_PISTACHIO ...@@ -404,6 +404,28 @@ config MACH_PISTACHIO
help help
This enables support for the IMG Pistachio SoC platform. This enables support for the IMG Pistachio SoC platform.
config MACH_XILFPGA
bool "MIPSfpga Xilinx based boards"
select ARCH_REQUIRE_GPIOLIB
select BOOT_ELF32
select BOOT_RAW
select BUILTIN_DTB
select CEVT_R4K
select COMMON_CLK
select CSRC_R4K
select IRQ_MIPS_CPU
select LIBFDT
select MIPS_CPU_SCACHE
select SYS_HAS_EARLY_PRINTK
select SYS_HAS_CPU_MIPS32_R2
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_ZBOOT_UART16550
select USE_OF
select USE_GENERIC_EARLY_PRINTK_8250
help
This enables support for the IMG University Program MIPSfpga platform.
config MIPS_MALTA config MIPS_MALTA
bool "MIPS Malta board" bool "MIPS Malta board"
select ARCH_MAY_HAVE_PC_FDC select ARCH_MAY_HAVE_PC_FDC
...@@ -970,6 +992,7 @@ source "arch/mips/loongson32/Kconfig" ...@@ -970,6 +992,7 @@ source "arch/mips/loongson32/Kconfig"
source "arch/mips/loongson64/Kconfig" source "arch/mips/loongson64/Kconfig"
source "arch/mips/netlogic/Kconfig" source "arch/mips/netlogic/Kconfig"
source "arch/mips/paravirt/Kconfig" source "arch/mips/paravirt/Kconfig"
source "arch/mips/xilfpga/Kconfig"
endmenu endmenu
......
/*
* Copyright (C) 2015 Imagination Technologies
* Author: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __MIPS_ASM_MACH_XILFPGA_IRQ_H__
#define __MIPS_ASM_MACH_XILFPGA_IRQ_H__
#define NR_IRQS 32
#include_next <irq.h>
#endif /* __MIPS_ASM_MACH_XILFPGA_IRQ_H__ */
choice
prompt "Machine type"
depends on MACH_XILFPGA
default XILFPGA_NEXYS4DDR
config XILFPGA_NEXYS4DDR
bool "Nexys4DDR by Digilent"
endchoice
#
# Makefile for the Xilfpga
#
obj-y += init.o
obj-y += intc.o
obj-y += time.o
platform-$(CONFIG_MACH_XILFPGA) += xilfpga/
cflags-$(CONFIG_MACH_XILFPGA) += -I$(srctree)/arch/mips/include/asm/mach-xilfpga
load-$(CONFIG_MACH_XILFPGA) += 0xffffffff80100000
/*
* Xilfpga platform setup
*
* Copyright (C) 2015 Imagination Technologies
* Author: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*/
#include <linux/of_fdt.h>
#include <linux/of_platform.h>
#include <asm/prom.h>
#define XILFPGA_UART_BASE 0xb0401000
const char *get_system_type(void)
{
return "MIPSfpga";
}
void __init plat_mem_setup(void)
{
__dt_setup_arch(__dtb_start);
strlcpy(arcs_cmdline, boot_command_line, COMMAND_LINE_SIZE);
}
void __init prom_init(void)
{
setup_8250_early_printk_port(XILFPGA_UART_BASE, 2, 50000);
}
void __init prom_free_prom_memory(void)
{
}
void __init device_tree_init(void)
{
if (!initial_boot_params)
return;
unflatten_and_copy_device_tree();
}
static int __init plat_of_setup(void)
{
if (!of_have_populated_dt())
panic("Device tree not present");
if (of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL))
panic("Failed to populate DT");
return 0;
}
arch_initcall(plat_of_setup);
/*
* Xilfpga interrupt controller setup
*
* Copyright (C) 2015 Imagination Technologies
* Author: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*/
#include <linux/of.h>
#include <linux/of_irq.h>
#include <asm/irq_cpu.h>
static struct of_device_id of_irq_ids[] __initdata = {
{ .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_irq_of_init },
{},
};
void __init arch_init_irq(void)
{
of_irq_init(of_irq_ids);
}
/*
* Xilfpga clocksource/timer setup
*
* Copyright (C) 2015 Imagination Technologies
* Author: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*/
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clocksource.h>
#include <linux/of.h>
#include <asm/time.h>
void __init plat_time_init(void)
{
struct device_node *np;
struct clk *clk;
of_clk_init(NULL);
clocksource_of_init();
np = of_get_cpu_node(0, NULL);
if (!np) {
pr_err("Failed to get CPU node\n");
return;
}
clk = of_clk_get(np, 0);
if (IS_ERR(clk)) {
pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));
return;
}
mips_hpt_frequency = clk_get_rate(clk) / 2;
clk_put(clk);
}
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