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Commit 99cd2201 authored by David S. Miller's avatar David S. Miller
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[SPARC64]: Fix sparse errors in arch/sparc64/kernel/traps.c 

Add 'UL' markers to DCU_* macros.

Declare C functions called from assembler in entry.h

Declare C functions called from within the sparc64 arch
code in include/asm-sparc64/*.h headers as appropriate.

Remove unused routines in traps.c
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 3d5ae6b6
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Showing with 167 additions and 70 deletions
arch/sparc64/kernel/entry.h
View file @ 99cd2201
...@@ -2,6 +2,7 @@ ...@@ -2,6 +2,7 @@
#define _ENTRY_H #define _ENTRY_H
#include <linux/init.h> #include <linux/init.h>
#include <linux/types.h>
extern char *sparc_cpu_type; extern char *sparc_cpu_type;
extern char *sparc_fpu_type; extern char *sparc_fpu_type;
...@@ -12,4 +13,144 @@ extern void __init boot_cpu_id_too_large(int cpu); ...@@ -12,4 +13,144 @@ extern void __init boot_cpu_id_too_large(int cpu);
extern unsigned int dcache_parity_tl1_occurred; extern unsigned int dcache_parity_tl1_occurred;
extern unsigned int icache_parity_tl1_occurred; extern unsigned int icache_parity_tl1_occurred;
extern void bad_trap_tl1(struct pt_regs *regs, long lvl);
extern void do_fpe_common(struct pt_regs *regs);
extern void do_fpieee(struct pt_regs *regs);
extern void do_fpother(struct pt_regs *regs);
extern void do_tof(struct pt_regs *regs);
extern void do_div0(struct pt_regs *regs);
extern void do_illegal_instruction(struct pt_regs *regs);
extern void mem_address_unaligned(struct pt_regs *regs,
unsigned long sfar,
unsigned long sfsr);
extern void sun4v_do_mna(struct pt_regs *regs,
unsigned long addr,
unsigned long type_ctx);
extern void do_privop(struct pt_regs *regs);
extern void do_privact(struct pt_regs *regs);
extern void do_cee(struct pt_regs *regs);
extern void do_cee_tl1(struct pt_regs *regs);
extern void do_dae_tl1(struct pt_regs *regs);
extern void do_iae_tl1(struct pt_regs *regs);
extern void do_div0_tl1(struct pt_regs *regs);
extern void do_fpdis_tl1(struct pt_regs *regs);
extern void do_fpieee_tl1(struct pt_regs *regs);
extern void do_fpother_tl1(struct pt_regs *regs);
extern void do_ill_tl1(struct pt_regs *regs);
extern void do_irq_tl1(struct pt_regs *regs);
extern void do_lddfmna_tl1(struct pt_regs *regs);
extern void do_stdfmna_tl1(struct pt_regs *regs);
extern void do_paw(struct pt_regs *regs);
extern void do_paw_tl1(struct pt_regs *regs);
extern void do_vaw(struct pt_regs *regs);
extern void do_vaw_tl1(struct pt_regs *regs);
extern void do_tof_tl1(struct pt_regs *regs);
extern void do_getpsr(struct pt_regs *regs);
extern void spitfire_insn_access_exception(struct pt_regs *regs,
unsigned long sfsr,
unsigned long sfar);
extern void spitfire_insn_access_exception_tl1(struct pt_regs *regs,
unsigned long sfsr,
unsigned long sfar);
extern void spitfire_data_access_exception(struct pt_regs *regs,
unsigned long sfsr,
unsigned long sfar);
extern void spitfire_data_access_exception_tl1(struct pt_regs *regs,
unsigned long sfsr,
unsigned long sfar);
extern void spitfire_access_error(struct pt_regs *regs,
unsigned long status_encoded,
unsigned long afar);
extern void cheetah_fecc_handler(struct pt_regs *regs,
unsigned long afsr,
unsigned long afar);
extern void cheetah_cee_handler(struct pt_regs *regs,
unsigned long afsr,
unsigned long afar);
extern void cheetah_deferred_handler(struct pt_regs *regs,
unsigned long afsr,
unsigned long afar);
extern void cheetah_plus_parity_error(int type, struct pt_regs *regs);
extern void sun4v_insn_access_exception(struct pt_regs *regs,
unsigned long addr,
unsigned long type_ctx);
extern void sun4v_insn_access_exception_tl1(struct pt_regs *regs,
unsigned long addr,
unsigned long type_ctx);
extern void sun4v_data_access_exception(struct pt_regs *regs,
unsigned long addr,
unsigned long type_ctx);
extern void sun4v_data_access_exception_tl1(struct pt_regs *regs,
unsigned long addr,
unsigned long type_ctx);
extern void sun4v_resum_error(struct pt_regs *regs,
unsigned long offset);
extern void sun4v_resum_overflow(struct pt_regs *regs);
extern void sun4v_nonresum_error(struct pt_regs *regs,
unsigned long offset);
extern void sun4v_nonresum_overflow(struct pt_regs *regs);
extern unsigned long sun4v_err_itlb_vaddr;
extern unsigned long sun4v_err_itlb_ctx;
extern unsigned long sun4v_err_itlb_pte;
extern unsigned long sun4v_err_itlb_error;
extern void sun4v_itlb_error_report(struct pt_regs *regs, int tl);
extern unsigned long sun4v_err_dtlb_vaddr;
extern unsigned long sun4v_err_dtlb_ctx;
extern unsigned long sun4v_err_dtlb_pte;
extern unsigned long sun4v_err_dtlb_error;
extern void sun4v_dtlb_error_report(struct pt_regs *regs, int tl);
extern void hypervisor_tlbop_error(unsigned long err,
unsigned long op);
extern void hypervisor_tlbop_error_xcall(unsigned long err,
unsigned long op);
/* WARNING: The error trap handlers in assembly know the precise
* layout of the following structure.
*
* C-level handlers in traps.c use this information to log the
* error and then determine how to recover (if possible).
*/
struct cheetah_err_info {
/*0x00*/u64 afsr;
/*0x08*/u64 afar;
/* D-cache state */
/*0x10*/u64 dcache_data[4]; /* The actual data */
/*0x30*/u64 dcache_index; /* D-cache index */
/*0x38*/u64 dcache_tag; /* D-cache tag/valid */
/*0x40*/u64 dcache_utag; /* D-cache microtag */
/*0x48*/u64 dcache_stag; /* D-cache snooptag */
/* I-cache state */
/*0x50*/u64 icache_data[8]; /* The actual insns + predecode */
/*0x90*/u64 icache_index; /* I-cache index */
/*0x98*/u64 icache_tag; /* I-cache phys tag */
/*0xa0*/u64 icache_utag; /* I-cache microtag */
/*0xa8*/u64 icache_stag; /* I-cache snooptag */
/*0xb0*/u64 icache_upper; /* I-cache upper-tag */
/*0xb8*/u64 icache_lower; /* I-cache lower-tag */
/* E-cache state */
/*0xc0*/u64 ecache_data[4]; /* 32 bytes from staging registers */
/*0xe0*/u64 ecache_index; /* E-cache index */
/*0xe8*/u64 ecache_tag; /* E-cache tag/state */
/*0xf0*/u64 __pad[32 - 30];
};
#define CHAFSR_INVALID ((u64)-1L)
/* This is allocated at boot time based upon the largest hardware
* cpu ID in the system. We allocate two entries per cpu, one for
* TL==0 logging and one for TL >= 1 logging.
*/
extern struct cheetah_err_info *cheetah_error_log;
#endif /* _ENTRY_H */ #endif /* _ENTRY_H */
arch/sparc64/kernel/traps.c
View file @ 99cd2201
...@@ -42,6 +42,7 @@ ...@@ -42,6 +42,7 @@
#endif #endif
#include <asm/prom.h> #include <asm/prom.h>
#include "entry.h"
/* When an irrecoverable trap occurs at tl > 0, the trap entry /* When an irrecoverable trap occurs at tl > 0, the trap entry
* code logs the trap state registers at every level in the trap * code logs the trap state registers at every level in the trap
...@@ -77,11 +78,6 @@ static void dump_tl1_traplog(struct tl1_traplog *p) ...@@ -77,11 +78,6 @@ static void dump_tl1_traplog(struct tl1_traplog *p)
} }
} }
void do_call_debug(struct pt_regs *regs)
{
notify_die(DIE_CALL, "debug call", regs, 0, 255, SIGINT);
}
void bad_trap(struct pt_regs *regs, long lvl) void bad_trap(struct pt_regs *regs, long lvl)
{ {
char buffer[32]; char buffer[32];
...@@ -550,41 +546,6 @@ static unsigned long ecache_flush_physbase; ...@@ -550,41 +546,6 @@ static unsigned long ecache_flush_physbase;
static unsigned long ecache_flush_linesize; static unsigned long ecache_flush_linesize;
static unsigned long ecache_flush_size; static unsigned long ecache_flush_size;
/* WARNING: The error trap handlers in assembly know the precise
* layout of the following structure.
*
* C-level handlers below use this information to log the error
* and then determine how to recover (if possible).
*/
struct cheetah_err_info {
/*0x00*/u64 afsr;
/*0x08*/u64 afar;
/* D-cache state */
/*0x10*/u64 dcache_data[4]; /* The actual data */
/*0x30*/u64 dcache_index; /* D-cache index */
/*0x38*/u64 dcache_tag; /* D-cache tag/valid */
/*0x40*/u64 dcache_utag; /* D-cache microtag */
/*0x48*/u64 dcache_stag; /* D-cache snooptag */
/* I-cache state */
/*0x50*/u64 icache_data[8]; /* The actual insns + predecode */
/*0x90*/u64 icache_index; /* I-cache index */
/*0x98*/u64 icache_tag; /* I-cache phys tag */
/*0xa0*/u64 icache_utag; /* I-cache microtag */
/*0xa8*/u64 icache_stag; /* I-cache snooptag */
/*0xb0*/u64 icache_upper; /* I-cache upper-tag */
/*0xb8*/u64 icache_lower; /* I-cache lower-tag */
/* E-cache state */
/*0xc0*/u64 ecache_data[4]; /* 32 bytes from staging registers */
/*0xe0*/u64 ecache_index; /* E-cache index */
/*0xe8*/u64 ecache_tag; /* E-cache tag/state */
/*0xf0*/u64 __pad[32 - 30];
};
#define CHAFSR_INVALID ((u64)-1L)
/* This table is ordered in priority of errors and matches the /* This table is ordered in priority of errors and matches the
* AFAR overwrite policy as well. * AFAR overwrite policy as well.
*/ */
...@@ -758,10 +719,6 @@ static struct afsr_error_table __jalapeno_error_table[] = { ...@@ -758,10 +719,6 @@ static struct afsr_error_table __jalapeno_error_table[] = {
static struct afsr_error_table *cheetah_error_table; static struct afsr_error_table *cheetah_error_table;
static unsigned long cheetah_afsr_errors; static unsigned long cheetah_afsr_errors;
/* This is allocated at boot time based upon the largest hardware
* cpu ID in the system. We allocate two entries per cpu, one for
* TL==0 logging and one for TL >= 1 logging.
*/
struct cheetah_err_info *cheetah_error_log; struct cheetah_err_info *cheetah_error_log;
static inline struct cheetah_err_info *cheetah_get_error_log(unsigned long afsr) static inline struct cheetah_err_info *cheetah_get_error_log(unsigned long afsr)
...@@ -2102,7 +2059,7 @@ void do_div0(struct pt_regs *regs) ...@@ -2102,7 +2059,7 @@ void do_div0(struct pt_regs *regs)
force_sig_info(SIGFPE, &info, current); force_sig_info(SIGFPE, &info, current);
} }
void instruction_dump (unsigned int *pc) static void instruction_dump(unsigned int *pc)
{ {
int i; int i;
...@@ -2115,7 +2072,7 @@ void instruction_dump (unsigned int *pc) ...@@ -2115,7 +2072,7 @@ void instruction_dump (unsigned int *pc)
printk("\n"); printk("\n");
} }
static void user_instruction_dump (unsigned int __user *pc) static void user_instruction_dump(unsigned int __user *pc)
{ {
int i; int i;
unsigned int buf[9]; unsigned int buf[9];
......
arch/sparc64/mm/init.c
View file @ 99cd2201
...@@ -1274,10 +1274,6 @@ void __cpuinit sun4v_ktsb_register(void) ...@@ -1274,10 +1274,6 @@ void __cpuinit sun4v_ktsb_register(void)
/* paging_init() sets up the page tables */ /* paging_init() sets up the page tables */
extern void cheetah_ecache_flush_init(void);
extern void sun4v_patch_tlb_handlers(void);
extern void cpu_probe(void);
extern void central_probe(void); extern void central_probe(void);
static unsigned long last_valid_pfn; static unsigned long last_valid_pfn;
......
include/asm-sparc64/dcu.h
View file @ 99cd2201
/* $Id: dcu.h,v 1.2 2001/03/01 23:23:33 davem Exp $ */
#ifndef _SPARC64_DCU_H #ifndef _SPARC64_DCU_H
#define _SPARC64_DCU_H #define _SPARC64_DCU_H
#include <linux/const.h>
/* UltraSparc-III Data Cache Unit Control Register */ /* UltraSparc-III Data Cache Unit Control Register */
#define DCU_CP 0x0002000000000000 /* Physical Cache Enable w/o mmu*/ #define DCU_CP _AC(0x0002000000000000,UL) /* Phys Cache Enable w/o mmu */
#define DCU_CV 0x0001000000000000 /* Virtual Cache Enable w/o mmu */ #define DCU_CV _AC(0x0001000000000000,UL) /* Virt Cache Enable w/o mmu */
#define DCU_ME 0x0000800000000000 /* NC-store Merging Enable */ #define DCU_ME _AC(0x0000800000000000,UL) /* NC-store Merging Enable */
#define DCU_RE 0x0000400000000000 /* RAW bypass Enable */ #define DCU_RE _AC(0x0000400000000000,UL) /* RAW bypass Enable */
#define DCU_PE 0x0000200000000000 /* PCache Enable */ #define DCU_PE _AC(0x0000200000000000,UL) /* PCache Enable */
#define DCU_HPE 0x0000100000000000 /* HW prefetch Enable */ #define DCU_HPE _AC(0x0000100000000000,UL) /* HW prefetch Enable */
#define DCU_SPE 0x0000080000000000 /* SW prefetch Enable */ #define DCU_SPE _AC(0x0000080000000000,UL) /* SW prefetch Enable */
#define DCU_SL 0x0000040000000000 /* Secondary load steering Enab */ #define DCU_SL _AC(0x0000040000000000,UL) /* Secondary ld-steering Enab*/
#define DCU_WE 0x0000020000000000 /* WCache enable */ #define DCU_WE _AC(0x0000020000000000,UL) /* WCache enable */
#define DCU_PM 0x000001fe00000000 /* PA Watchpoint Byte Mask */ #define DCU_PM _AC(0x000001fe00000000,UL) /* PA Watchpoint Byte Mask */
#define DCU_VM 0x00000001fe000000 /* VA Watchpoint Byte Mask */ #define DCU_VM _AC(0x00000001fe000000,UL) /* VA Watchpoint Byte Mask */
#define DCU_PR 0x0000000001000000 /* PA Watchpoint Read Enable */ #define DCU_PR _AC(0x0000000001000000,UL) /* PA Watchpoint Read Enable */
#define DCU_PW 0x0000000000800000 /* PA Watchpoint Write Enable */ #define DCU_PW _AC(0x0000000000800000,UL) /* PA Watchpoint Write Enable*/
#define DCU_VR 0x0000000000400000 /* VA Watchpoint Read Enable */ #define DCU_VR _AC(0x0000000000400000,UL) /* VA Watchpoint Read Enable */
#define DCU_VW 0x0000000000200000 /* VA Watchpoint Write Enable */ #define DCU_VW _AC(0x0000000000200000,UL) /* VA Watchpoint Write Enable*/
#define DCU_DM 0x0000000000000008 /* DMMU Enable */ #define DCU_DM _AC(0x0000000000000008,UL) /* DMMU Enable */
#define DCU_IM 0x0000000000000004 /* IMMU Enable */ #define DCU_IM _AC(0x0000000000000004,UL) /* IMMU Enable */
#define DCU_DC 0x0000000000000002 /* Data Cache Enable */ #define DCU_DC _AC(0x0000000000000002,UL) /* Data Cache Enable */
#define DCU_IC 0x0000000000000001 /* Instruction Cache Enable */ #define DCU_IC _AC(0x0000000000000001,UL) /* Instruction Cache Enable */
#endif /* _SPARC64_DCU_H */ #endif /* _SPARC64_DCU_H */
include/asm-sparc64/pgtable.h
View file @ 99cd2201
...@@ -761,6 +761,8 @@ extern unsigned long get_fb_unmapped_area(struct file *filp, unsigned long, ...@@ -761,6 +761,8 @@ extern unsigned long get_fb_unmapped_area(struct file *filp, unsigned long,
extern void pgtable_cache_init(void); extern void pgtable_cache_init(void);
extern void sun4v_register_fault_status(void); extern void sun4v_register_fault_status(void);
extern void sun4v_ktsb_register(void); extern void sun4v_ktsb_register(void);
extern void __init cheetah_ecache_flush_init(void);
extern void sun4v_patch_tlb_handlers(void);
extern unsigned long cmdline_memory_size; extern unsigned long cmdline_memory_size;
......
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