Commit 9a3b19a1 authored by Chris Wilson's avatar Chris Wilson

drm/i915: Only try to park engines after a failed reset

Currently we try to stop the engine by programming the ring registers to
be disabled before we perform the reset. Sometimes, we see the context
image also have invalid ring registers, which one presumes may be
actually caused by us doing so. Lets risk not doing programming the
ring to zero on the first attempt to avoid preserving that corruption
into the context image, leaving the w/a in place for subsequent
reset attempts.
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190213232047.8486-1-chris@chris-wilson.co.uk
parent d31c85fc
...@@ -119,8 +119,10 @@ static void gen3_stop_engine(struct intel_engine_cs *engine) ...@@ -119,8 +119,10 @@ static void gen3_stop_engine(struct intel_engine_cs *engine)
struct drm_i915_private *dev_priv = engine->i915; struct drm_i915_private *dev_priv = engine->i915;
const u32 base = engine->mmio_base; const u32 base = engine->mmio_base;
GEM_TRACE("%s\n", engine->name);
if (intel_engine_stop_cs(engine)) if (intel_engine_stop_cs(engine))
DRM_DEBUG_DRIVER("%s: timed out on STOP_RING\n", engine->name); GEM_TRACE("%s: timed out on STOP_RING\n", engine->name);
I915_WRITE_FW(RING_HEAD(base), I915_READ_FW(RING_TAIL(base))); I915_WRITE_FW(RING_HEAD(base), I915_READ_FW(RING_TAIL(base)));
POSTING_READ_FW(RING_HEAD(base)); /* paranoia */ POSTING_READ_FW(RING_HEAD(base)); /* paranoia */
...@@ -133,9 +135,9 @@ static void gen3_stop_engine(struct intel_engine_cs *engine) ...@@ -133,9 +135,9 @@ static void gen3_stop_engine(struct intel_engine_cs *engine)
I915_WRITE_FW(RING_CTL(base), 0); I915_WRITE_FW(RING_CTL(base), 0);
/* Check acts as a post */ /* Check acts as a post */
if (I915_READ_FW(RING_HEAD(base)) != 0) if (I915_READ_FW(RING_HEAD(base)))
DRM_DEBUG_DRIVER("%s: ring head not parked\n", GEM_TRACE("%s: ring head [%x] not parked\n",
engine->name); engine->name, I915_READ_FW(RING_HEAD(base)));
} }
static void i915_stop_engines(struct drm_i915_private *i915, static void i915_stop_engines(struct drm_i915_private *i915,
...@@ -579,7 +581,8 @@ int intel_gpu_reset(struct drm_i915_private *i915, unsigned int engine_mask) ...@@ -579,7 +581,8 @@ int intel_gpu_reset(struct drm_i915_private *i915, unsigned int engine_mask)
* *
* FIXME: Wa for more modern gens needs to be validated * FIXME: Wa for more modern gens needs to be validated
*/ */
i915_stop_engines(i915, engine_mask); if (retry)
i915_stop_engines(i915, engine_mask);
GEM_TRACE("engine_mask=%x\n", engine_mask); GEM_TRACE("engine_mask=%x\n", engine_mask);
preempt_disable(); preempt_disable();
......
...@@ -1889,6 +1889,8 @@ static void execlists_reset_prepare(struct intel_engine_cs *engine) ...@@ -1889,6 +1889,8 @@ static void execlists_reset_prepare(struct intel_engine_cs *engine)
__tasklet_disable_sync_once(&execlists->tasklet); __tasklet_disable_sync_once(&execlists->tasklet);
GEM_BUG_ON(!reset_in_progress(execlists)); GEM_BUG_ON(!reset_in_progress(execlists));
intel_engine_stop_cs(engine);
/* And flush any current direct submission. */ /* And flush any current direct submission. */
spin_lock_irqsave(&engine->timeline.lock, flags); spin_lock_irqsave(&engine->timeline.lock, flags);
process_csb(engine); /* drain preemption events */ process_csb(engine); /* drain preemption events */
......
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