Commit 9a603f48 authored by Daniel Vetter's avatar Daniel Vetter

drm/i915: Run psr_setup unconditionally

Due to runtime pm and system s/r we need to restore hw state every
time we enable a pipe again. Hence trying to avoid that is just
pointless book-keeping which Rodrigo then tried to work around by
manually adding psr_setup calls to our resume code.

Much simpler to just remove code instead.

v2: Properly bail out of psr exit if psr isn't enabled. Spotted by
Rodrigo.
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent b04c5bd6
...@@ -661,7 +661,6 @@ struct i915_drrs { ...@@ -661,7 +661,6 @@ struct i915_drrs {
struct i915_psr { struct i915_psr {
bool sink_support; bool sink_support;
bool source_ok; bool source_ok;
bool setup_done;
bool enabled; bool enabled;
bool active; bool active;
struct delayed_work work; struct delayed_work work;
......
...@@ -1681,9 +1681,6 @@ static void intel_edp_psr_setup(struct intel_dp *intel_dp) ...@@ -1681,9 +1681,6 @@ static void intel_edp_psr_setup(struct intel_dp *intel_dp)
struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_private *dev_priv = dev->dev_private;
struct edp_vsc_psr psr_vsc; struct edp_vsc_psr psr_vsc;
if (dev_priv->psr.setup_done)
return;
/* Prepare VSC packet as per EDP 1.3 spec, Table 3.10 */ /* Prepare VSC packet as per EDP 1.3 spec, Table 3.10 */
memset(&psr_vsc, 0, sizeof(psr_vsc)); memset(&psr_vsc, 0, sizeof(psr_vsc));
psr_vsc.sdp_header.HB0 = 0; psr_vsc.sdp_header.HB0 = 0;
...@@ -1695,8 +1692,6 @@ static void intel_edp_psr_setup(struct intel_dp *intel_dp) ...@@ -1695,8 +1692,6 @@ static void intel_edp_psr_setup(struct intel_dp *intel_dp)
/* Avoid continuous PSR exit by masking memup and hpd */ /* Avoid continuous PSR exit by masking memup and hpd */
I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP | I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP |
EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP); EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP);
dev_priv->psr.setup_done = true;
} }
static void intel_edp_psr_enable_sink(struct intel_dp *intel_dp) static void intel_edp_psr_enable_sink(struct intel_dp *intel_dp)
...@@ -1928,7 +1923,7 @@ void intel_edp_psr_exit(struct drm_device *dev) ...@@ -1928,7 +1923,7 @@ void intel_edp_psr_exit(struct drm_device *dev)
if (!HAS_PSR(dev)) if (!HAS_PSR(dev))
return; return;
if (!dev_priv->psr.setup_done) if (!dev_priv->psr.enabled)
return; return;
cancel_delayed_work_sync(&dev_priv->psr.work); cancel_delayed_work_sync(&dev_priv->psr.work);
......
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