Commit 9d03b296 authored by Olof Johansson's avatar Olof Johansson

Merge tag 'qcom-arm64-for-4.13' of...

Merge tag 'qcom-arm64-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64

Qualcomm ARM64 Updates for v4.13

* Fix APQ8016 SBC WLAN LED
* Add MSM8996 CPU node
* Add MSM8992 SMEM and fixed regulator
* Fixup MSM8916 USB support

* tag 'qcom-arm64-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  arm64: dts: apq8016-sbc: Correct WLAN LED default-trigger
  arm64: dts: msm8996: Add CPU clock controller node
  arm64: dts: smem enablement for msm8992
  arm64: dts: msm8992 add fixed regulator
  arm64: dts: qcom: Collapse usb support into one node
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents e4b79c3b 20afb8ec
......@@ -178,7 +178,7 @@ led@4 {
led@5 {
label = "apq8016-sbc:yellow:wlan";
gpios = <&pm8916_mpps 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "wlan";
linux,default-trigger = "phy0tx";
default-state = "off";
};
......@@ -215,22 +215,16 @@ sdhci@07864000 {
usb@78d9000 {
extcon = <&usb_id>, <&usb_id>;
status = "okay";
};
ehci@78d9000 {
status = "okay";
};
phy@78d9000 {
adp-disable;
hnp-disable;
srp-disable;
ulpi {
phy {
v1p8-supply = <&pm8916_l7>;
v3p3-supply = <&pm8916_l13>;
vddcx-supply = <&pm8916_s1>;
extcon = <&usb_id>, <&usb_id>;
dr_mode = "otg";
status = "okay";
switch-gpio = <&pm8916_gpios 4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_sw_sel_pm>;
extcon = <&usb_id>;
};
};
};
lpass@07708000 {
......@@ -348,6 +342,14 @@ usb_id: usb-id {
pinctrl-0 = <&usb_id_default>;
};
usb-switch {
compatible = "toshiba,tc7usb40mu";
switch-gpios = <&pm8916_gpios 4 GPIO_ACTIVE_HIGH>;
extcon = <&usb_id>;
pinctrl-names = "default";
pinctrl-0 = <&usb_sw_sel_pm>;
};
hdmi-out {
compatible = "hdmi-connector";
type = "a";
......
......@@ -546,44 +546,40 @@ sdhc_2: sdhci@07864000 {
status = "disabled";
};
usb_dev: usb@78d9000 {
otg: usb@78d9000 {
compatible = "qcom,ci-hdrc";
reg = <0x78d9000 0x400>;
dr_mode = "peripheral";
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
usb-phy = <&usb_otg>;
status = "disabled";
};
usb_host: ehci@78d9000 {
compatible = "qcom,ehci-host";
reg = <0x78d9000 0x400>;
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
usb-phy = <&usb_otg>;
status = "disabled";
};
usb_otg: phy@78d9000 {
compatible = "qcom,usb-otg-snps";
reg = <0x78d9000 0x400>;
reg = <0x78d9000 0x200>,
<0x78d9200 0x200>;
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
qcom,vdd-levels = <500000 1000000 1320000>;
qcom,phy-init-sequence = <0x44 0x6B 0x24 0x13>;
dr_mode = "peripheral";
qcom,otg-control = <2>; // PMIC
qcom,manual-pullup;
clocks = <&gcc GCC_USB_HS_AHB_CLK>,
<&gcc GCC_USB_HS_SYSTEM_CLK>,
<&gcc GCC_USB2A_PHY_SLEEP_CLK>;
clock-names = "iface", "core", "sleep";
resets = <&gcc GCC_USB2A_PHY_BCR>,
<&gcc GCC_USB_HS_BCR>;
reset-names = "phy", "link";
<&gcc GCC_USB_HS_SYSTEM_CLK>;
clock-names = "iface", "core";
assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
assigned-clock-rates = <80000000>;
resets = <&gcc GCC_USB_HS_BCR>;
reset-names = "core";
phy_type = "ulpi";
dr_mode = "otg";
ahb-burst-config = <0>;
phy-names = "usb-phy";
phys = <&usb_hs_phy>;
status = "disabled";
#reset-cells = <1>;
ulpi {
usb_hs_phy: phy {
compatible = "qcom,usb-hs-phy-msm8916",
"qcom,usb-hs-phy";
#phy-cells = <0>;
clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
clock-names = "ref", "sleep";
resets = <&gcc GCC_USB2A_PHY_BCR>, <&otg 0>;
reset-names = "phy", "por";
qcom,init-seq = /bits/ 8 <0x0 0x44
0x1 0x6b 0x2 0x24 0x3 0x13>;
};
};
};
intc: interrupt-controller@b000000 {
......
......@@ -68,6 +68,30 @@ sleep_clk: sleep_clk {
clock-frequency = <32768>;
};
vreg_vph_pwr: vreg-vph-pwr {
compatible = "regulator-fixed";
status = "okay";
regulator-name = "vph-pwr";
regulator-min-microvolt = <3600000>;
regulator-max-microvolt = <3600000>;
regulator-always-on;
};
sfpb_mutex: hwmutex {
compatible = "qcom,sfpb-mutex";
syscon = <&sfpb_mutex_regs 0x0 0x100>;
#hwlock-cells = <1>;
};
smem {
compatible = "qcom,smem";
memory-region = <&smem_region>;
qcom,rpm-msg-ram = <&rpm_msg_ram>;
hwlocks = <&sfpb_mutex 3>;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
......@@ -82,6 +106,11 @@ intc: interrupt-controller@f9000000 {
<0xf9002000 0x1000>;
};
apcs: syscon@f900d000 {
compatible = "syscon";
reg = <0xf900d000 0x2000>;
};
timer@f9020000 {
#address-cells = <1>;
#size-cells = <1>;
......@@ -172,12 +201,36 @@ clock_gcc: clock-controller@fc400000 {
#power-domain-cells = <1>;
reg = <0xfc400000 0x2000>;
};
rpm_msg_ram: memory@fc428000 {
compatible = "qcom,rpm-msg-ram";
reg = <0xfc428000 0x4000>;
};
sfpb_mutex_regs: syscon@fd484000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "syscon";
reg = <0xfd484000 0x400>;
};
};
memory {
device_type = "memory";
reg = <0 0 0 0>; // bootloader will update
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
smem_region: smem@6a00000 {
reg = <0x0 0x6a00000 0x0 0x200000>;
no-map;
};
};
};
......
......@@ -311,6 +311,12 @@ gcc: clock-controller@300000 {
reg = <0x300000 0x90000>;
};
kryocc: clock-controller@6400000 {
compatible = "qcom,apcc-msm8996";
reg = <0x6400000 0x90000>;
#clock-cells = <1>;
};
blsp1_spi0: spi@07575000 {
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x07575000 0x600>;
......
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