Commit 9e6f784e authored by Vladimir Oltean's avatar Vladimir Oltean Committed by Mark Brown

spi: spi-fsl-dspi: Demistify magic value in SPI_SR_CLEAR

This patch adds the field definitions for the SPI_SR register. The SPI
status register is write-1-to-clear and this value is written at init
time.
Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
Link: https://lore.kernel.org/r/20190818180115.31114-5-olteanv@gmail.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent b2655196
...@@ -57,7 +57,19 @@ ...@@ -57,7 +57,19 @@
#define SPI_SR 0x2c #define SPI_SR 0x2c
#define SPI_SR_TCFQF BIT(31) #define SPI_SR_TCFQF BIT(31)
#define SPI_SR_EOQF BIT(28) #define SPI_SR_EOQF BIT(28)
#define SPI_SR_CLEAR 0x9aaf0000 #define SPI_SR_TFUF BIT(27)
#define SPI_SR_TFFF BIT(25)
#define SPI_SR_CMDTCF BIT(23)
#define SPI_SR_SPEF BIT(21)
#define SPI_SR_RFOF BIT(19)
#define SPI_SR_TFIWF BIT(18)
#define SPI_SR_RFDF BIT(17)
#define SPI_SR_CMDFFF BIT(16)
#define SPI_SR_CLEAR (SPI_SR_TCFQF | SPI_SR_EOQF | \
SPI_SR_TFUF | SPI_SR_TFFF | \
SPI_SR_CMDTCF | SPI_SR_SPEF | \
SPI_SR_RFOF | SPI_SR_TFIWF | \
SPI_SR_RFDF | SPI_SR_CMDFFF)
#define SPI_RSER_TFFFE BIT(25) #define SPI_RSER_TFFFE BIT(25)
#define SPI_RSER_TFFFD BIT(24) #define SPI_RSER_TFFFD BIT(24)
......
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