Commit 9f0a5ba5 authored by Eric W. Biederman's avatar Eric W. Biederman Committed by Linus Torvalds

[PATCH] irq: Remove set_native_irq_info

This patch replaces all instances of "set_native_irq_info(irq, mask)"
with "irq_desc[irq].affinity = mask".  The latter form is clearer
uses fewer abstractions, and makes access to this field uniform
accross different architectures.
Signed-off-by: default avatarEric W. Biederman <ebiederm@xmission.com>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent fc5d56f9
...@@ -343,7 +343,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t cpumask) ...@@ -343,7 +343,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t cpumask)
break; break;
entry = irq_2_pin + entry->next; entry = irq_2_pin + entry->next;
} }
set_native_irq_info(irq, cpumask); irq_desc[irq].affinity = cpumask;
spin_unlock_irqrestore(&ioapic_lock, flags); spin_unlock_irqrestore(&ioapic_lock, flags);
} }
...@@ -1354,7 +1354,7 @@ static void __init setup_IO_APIC_irqs(void) ...@@ -1354,7 +1354,7 @@ static void __init setup_IO_APIC_irqs(void)
} }
spin_lock_irqsave(&ioapic_lock, flags); spin_lock_irqsave(&ioapic_lock, flags);
__ioapic_write_entry(apic, pin, entry); __ioapic_write_entry(apic, pin, entry);
set_native_irq_info(irq, TARGET_CPUS); irq_desc[irq].affinity = TARGET_CPUS;
spin_unlock_irqrestore(&ioapic_lock, flags); spin_unlock_irqrestore(&ioapic_lock, flags);
} }
} }
...@@ -2585,7 +2585,7 @@ static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask) ...@@ -2585,7 +2585,7 @@ static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
msg.address_lo |= MSI_ADDR_DEST_ID(dest); msg.address_lo |= MSI_ADDR_DEST_ID(dest);
write_msi_msg(irq, &msg); write_msi_msg(irq, &msg);
set_native_irq_info(irq, mask); irq_desc[irq].affinity = mask;
} }
#endif /* CONFIG_SMP */ #endif /* CONFIG_SMP */
...@@ -2669,7 +2669,7 @@ static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask) ...@@ -2669,7 +2669,7 @@ static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask)
dest = cpu_mask_to_apicid(mask); dest = cpu_mask_to_apicid(mask);
target_ht_irq(irq, dest); target_ht_irq(irq, dest);
set_native_irq_info(irq, mask); irq_desc[irq].affinity = mask;
} }
#endif #endif
...@@ -2875,7 +2875,7 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a ...@@ -2875,7 +2875,7 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a
spin_lock_irqsave(&ioapic_lock, flags); spin_lock_irqsave(&ioapic_lock, flags);
__ioapic_write_entry(ioapic, pin, entry); __ioapic_write_entry(ioapic, pin, entry);
set_native_irq_info(irq, TARGET_CPUS); irq_desc[irq].affinity = TARGET_CPUS;
spin_unlock_irqrestore(&ioapic_lock, flags); spin_unlock_irqrestore(&ioapic_lock, flags);
return 0; return 0;
......
...@@ -60,7 +60,7 @@ static void ia64_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask) ...@@ -60,7 +60,7 @@ static void ia64_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
msg.address_lo = addr; msg.address_lo = addr;
write_msi_msg(irq, &msg); write_msi_msg(irq, &msg);
set_native_irq_info(irq, cpu_mask); irq_desc[irq].affinity = cpu_mask;
} }
#endif /* CONFIG_SMP */ #endif /* CONFIG_SMP */
......
...@@ -204,7 +204,7 @@ static void sn_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask) ...@@ -204,7 +204,7 @@ static void sn_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff); msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
write_msi_msg(irq, &msg); write_msi_msg(irq, &msg);
set_native_irq_info(irq, cpu_mask); irq_desc[irq].affinity = cpu_mask;
} }
#endif /* CONFIG_SMP */ #endif /* CONFIG_SMP */
......
...@@ -261,7 +261,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask) ...@@ -261,7 +261,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
spin_lock_irqsave(&ioapic_lock, flags); spin_lock_irqsave(&ioapic_lock, flags);
__target_IO_APIC_irq(irq, dest, vector); __target_IO_APIC_irq(irq, dest, vector);
set_native_irq_info(irq, mask); irq_desc[irq].affinity = mask;
spin_unlock_irqrestore(&ioapic_lock, flags); spin_unlock_irqrestore(&ioapic_lock, flags);
} }
#endif #endif
...@@ -857,7 +857,7 @@ static void __init setup_IO_APIC_irq(int apic, int pin, int idx, int irq) ...@@ -857,7 +857,7 @@ static void __init setup_IO_APIC_irq(int apic, int pin, int idx, int irq)
ioapic_write_entry(apic, pin, entry); ioapic_write_entry(apic, pin, entry);
spin_lock_irqsave(&ioapic_lock, flags); spin_lock_irqsave(&ioapic_lock, flags);
set_native_irq_info(irq, TARGET_CPUS); irq_desc[irq].affinity = TARGET_CPUS;
spin_unlock_irqrestore(&ioapic_lock, flags); spin_unlock_irqrestore(&ioapic_lock, flags);
} }
...@@ -1930,7 +1930,7 @@ static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask) ...@@ -1930,7 +1930,7 @@ static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
msg.address_lo |= MSI_ADDR_DEST_ID(dest); msg.address_lo |= MSI_ADDR_DEST_ID(dest);
write_msi_msg(irq, &msg); write_msi_msg(irq, &msg);
set_native_irq_info(irq, mask); irq_desc[irq].affinity = mask;
} }
#endif /* CONFIG_SMP */ #endif /* CONFIG_SMP */
...@@ -2018,7 +2018,7 @@ static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask) ...@@ -2018,7 +2018,7 @@ static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask)
dest = cpu_mask_to_apicid(tmp); dest = cpu_mask_to_apicid(tmp);
target_ht_irq(irq, dest, vector); target_ht_irq(irq, dest, vector);
set_native_irq_info(irq, mask); irq_desc[irq].affinity = mask;
} }
#endif #endif
...@@ -2143,7 +2143,7 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int triggering, int p ...@@ -2143,7 +2143,7 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int triggering, int p
ioapic_write_entry(ioapic, pin, entry); ioapic_write_entry(ioapic, pin, entry);
spin_lock_irqsave(&ioapic_lock, flags); spin_lock_irqsave(&ioapic_lock, flags);
set_native_irq_info(irq, TARGET_CPUS); irq_desc[irq].affinity = TARGET_CPUS;
spin_unlock_irqrestore(&ioapic_lock, flags); spin_unlock_irqrestore(&ioapic_lock, flags);
return 0; return 0;
......
...@@ -199,17 +199,6 @@ extern int setup_irq(unsigned int irq, struct irqaction *new); ...@@ -199,17 +199,6 @@ extern int setup_irq(unsigned int irq, struct irqaction *new);
# define handle_dynamic_tick(a) do { } while (0) # define handle_dynamic_tick(a) do { } while (0)
#endif #endif
#ifdef CONFIG_SMP
static inline void set_native_irq_info(int irq, cpumask_t mask)
{
irq_desc[irq].affinity = mask;
}
#else
static inline void set_native_irq_info(int irq, cpumask_t mask)
{
}
#endif
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
#if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE) #if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
......
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