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Commit a1744d3b authored by David S. Miller's avatar David S. Miller
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Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6 

Conflicts:

	drivers/net/wireless/p54/p54common.c
parents 275f165f a4322266
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.mailmap
View file @ a1744d3b
......@@ -80,6 +80,8 @@ Nguyen Anh Quynh <aquynh@gmail.com>
Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
Patrick Mochel <mochel@digitalimplant.org>
Peter A Jonsson <pj@ludd.ltu.se>
Peter Oruba <peter@oruba.de>
Peter Oruba <peter.oruba@amd.com>
Praveen BP <praveenbp@ti.com>
Rajesh Shah <rajesh.shah@intel.com>
Ralf Baechle <ralf@linux-mips.org>
......
Documentation/00-INDEX
View file @ a1744d3b
......@@ -172,7 +172,7 @@ i2c/
- directory with info about the I2C bus/protocol (2 wire, kHz speed).
i2o/
- directory with info about the Linux I2O subsystem.
i386/
x86/i386/
- directory with info about Linux on Intel 32 bit architecture.
ia64/
- directory with info about Linux on Intel 64 bit architecture.
......@@ -382,7 +382,7 @@ w1/
- directory with documents regarding the 1-wire (w1) subsystem.
watchdog/
- how to auto-reboot Linux if it has "fallen and can't get up". ;-)
x86_64/
x86/x86_64/
- directory with info on Linux support for AMD x86-64 (Hammer) machines.
zorro.txt
- info on writing drivers for Zorro bus devices found on Amigas.
Documentation/DocBook/Makefile
View file @ a1744d3b
......@@ -136,7 +136,7 @@ quiet_cmd_db2ps = PS $@
%.ps : %.xml
$(call cmd,db2ps)
quiet_cmd_db2pdf = PDF $@
quiet_cmd_db2pdf = PDF $@
cmd_db2pdf = $(subst TYPE,pdf, $($(PDF_METHOD)template))
%.pdf : %.xml
$(call cmd,db2pdf)
......@@ -148,7 +148,7 @@ build_main_index = rm -rf $(main_idx) && \
echo '<h2>Kernel Version: $(KERNELVERSION)</h2>' >> $(main_idx) && \
cat $(HTML) >> $(main_idx)
quiet_cmd_db2html = HTML $@
quiet_cmd_db2html = HTML $@
cmd_db2html = xmlto xhtml $(XMLTOFLAGS) -o $(patsubst %.html,%,$@) $< && \
echo '<a HREF="$(patsubst %.html,%,$(notdir $@))/index.html"> \
$(patsubst %.html,%,$(notdir $@))</a><p>' > $@
......
Documentation/DocBook/deviceiobook.tmpl
View file @ a1744d3b
......@@ -24,7 +24,7 @@
<surname>Cox</surname>
<affiliation>
<address>
<email>alan@redhat.com</email>
<email>alan@lxorguk.ukuu.org.uk</email>
</address>
</affiliation>
</author>
......
Documentation/DocBook/mcabook.tmpl
View file @ a1744d3b
......@@ -12,7 +12,7 @@
<surname>Cox</surname>
<affiliation>
<address>
<email>alan@redhat.com</email>
<email>alan@lxorguk.ukuu.org.uk</email>
</address>
</affiliation>
</author>
......
Documentation/DocBook/wanbook.tmpl
View file @ a1744d3b
......@@ -12,7 +12,7 @@
<surname>Cox</surname>
<affiliation>
<address>
<email>alan@redhat.com</email>
<email>alan@lxorguk.ukuu.org.uk</email>
</address>
</affiliation>
</author>
......
Documentation/DocBook/z8530book.tmpl
View file @ a1744d3b
......@@ -12,7 +12,7 @@
<surname>Cox</surname>
<affiliation>
<address>
<email>alan@redhat.com</email>
<email>alan@lxorguk.ukuu.org.uk</email>
</address>
</affiliation>
</author>
......
Documentation/ManagementStyle
View file @ a1744d3b
......@@ -17,7 +17,7 @@ companies. If you sign purchase orders or you have any clue about the
budget of your group, you're almost certainly not a kernel manager.
These suggestions may or may not apply to you.
First off, I'd suggest buying "Seven Habits of Highly Successful
First off, I'd suggest buying "Seven Habits of Highly Effective
People", and NOT read it. Burn it, it's a great symbolic gesture.
(*) This document does so not so much by answering the question, but by
......
Documentation/arm/empeg/README deleted 100644 → 0
View file @ 275f165f
Empeg, Ltd's Empeg MP3 Car Audio Player
The initial design is to go in your car, but you can use it at home, on a
boat... almost anywhere. The principle is to store CD-quality music using
MPEG technology onto a hard disk in the unit, and use the power of the
embedded computer to serve up the music you want.
For more details, see:
http://www.empeg.com
Documentation/arm/empeg/ir.txt deleted 100644 → 0
View file @ 275f165f
Infra-red driver documentation.
Mike Crowe <mac@empeg.com>
(C) Empeg Ltd 1999
Not a lot here yet :-)
The Kenwood KCA-R6A remote control generates a sequence like the following:
Go low for approx 16T (Around 9000us)
Go high for approx 8T (Around 4000us)
Go low for less than 2T (Around 750us)
For each of the 32 bits
Go high for more than 2T (Around 1500us) == 1
Go high for less than T (Around 400us) == 0
Go low for less than 2T (Around 750us)
Rather than repeat a signal when the button is held down certain buttons
generate the following code to indicate repetition.
Go low for approx 16T
Go high for approx 4T
Go low for less than 2T
(By removing the <2T from the start of the sequence and placing at the end
it can be considered a stop bit but I found it easier to deal with it at
the start).
The 32 bits are encoded as XxYy where x and y are the actual data values
while X and Y are the logical inverses of the associated data values. Using
LSB first yields sensible codes for the numbers.
All codes are of the form b9xx
The numeric keys generate the code 0x where x is the number pressed.
Tuner 1c
Tape 1d
CD 1e
CD-MD-CH 1f
Track- 0a
Track+ 0b
Rewind 0c
FF 0d
DNPP 5e
Play/Pause 0e
Vol+ 14
Vol- 15
Documentation/arm/empeg/mkdevs deleted 100644 → 0
View file @ 275f165f
#!/bin/sh
mknod /dev/display c 244 0
mknod /dev/ir c 242 0
mknod /dev/usb0 c 243 0
mknod /dev/audio c 245 4
mknod /dev/dsp c 245 3
mknod /dev/mixer c 245 0
mknod /dev/empeg_state c 246 0
mknod /dev/radio0 c 81 64
ln -sf radio0 radio
ln -sf usb0 usb
Documentation/filesystems/Locking
View file @ a1744d3b
......@@ -161,8 +161,12 @@ prototypes:
int (*set_page_dirty)(struct page *page);
int (*readpages)(struct file *filp, struct address_space *mapping,
struct list_head *pages, unsigned nr_pages);
int (*prepare_write)(struct file *, struct page *, unsigned, unsigned);
int (*commit_write)(struct file *, struct page *, unsigned, unsigned);
int (*write_begin)(struct file *, struct address_space *mapping,
loff_t pos, unsigned len, unsigned flags,
struct page **pagep, void **fsdata);
int (*write_end)(struct file *, struct address_space *mapping,
loff_t pos, unsigned len, unsigned copied,
struct page *page, void *fsdata);
sector_t (*bmap)(struct address_space *, sector_t);
int (*invalidatepage) (struct page *, unsigned long);
int (*releasepage) (struct page *, int);
......@@ -180,8 +184,6 @@ sync_page: no maybe
writepages: no
set_page_dirty no no
readpages: no
prepare_write: no yes yes
commit_write: no yes yes
write_begin: no locks the page yes
write_end: no yes, unlocks yes
perform_write: no n/a yes
......@@ -191,7 +193,7 @@ releasepage: no yes
direct_IO: no
launder_page: no yes
->prepare_write(), ->commit_write(), ->sync_page() and ->readpage()
->write_begin(), ->write_end(), ->sync_page() and ->readpage()
may be called from the request handler (/dev/loop).
->readpage() unlocks the page, either synchronously or via I/O
......
Documentation/filesystems/vfs.txt
View file @ a1744d3b
......@@ -492,7 +492,7 @@ written-back to storage typically in whole pages, however the
address_space has finer control of write sizes.
The read process essentially only requires 'readpage'. The write
process is more complicated and uses prepare_write/commit_write or
process is more complicated and uses write_begin/write_end or
set_page_dirty to write data into the address_space, and writepage,
sync_page, and writepages to writeback data to storage.
......@@ -521,8 +521,6 @@ struct address_space_operations {
int (*set_page_dirty)(struct page *page);
int (*readpages)(struct file *filp, struct address_space *mapping,
struct list_head *pages, unsigned nr_pages);
int (*prepare_write)(struct file *, struct page *, unsigned, unsigned);
int (*commit_write)(struct file *, struct page *, unsigned, unsigned);
int (*write_begin)(struct file *, struct address_space *mapping,
loff_t pos, unsigned len, unsigned flags,
struct page **pagep, void **fsdata);
......@@ -598,37 +596,7 @@ struct address_space_operations {
readpages is only used for read-ahead, so read errors are
ignored. If anything goes wrong, feel free to give up.
prepare_write: called by the generic write path in VM to set up a write
request for a page. This indicates to the address space that
the given range of bytes is about to be written. The
address_space should check that the write will be able to
complete, by allocating space if necessary and doing any other
internal housekeeping. If the write will update parts of
any basic-blocks on storage, then those blocks should be
pre-read (if they haven't been read already) so that the
updated blocks can be written out properly.
The page will be locked.
Note: the page _must not_ be marked uptodate in this function
(or anywhere else) unless it actually is uptodate right now. As
soon as a page is marked uptodate, it is possible for a concurrent
read(2) to copy it to userspace.
commit_write: If prepare_write succeeds, new data will be copied
into the page and then commit_write will be called. It will
typically update the size of the file (if appropriate) and
mark the inode as dirty, and do any other related housekeeping
operations. It should avoid returning an error if possible -
errors should have been handled by prepare_write.
write_begin: This is intended as a replacement for prepare_write. The
key differences being that:
- it returns a locked page (in *pagep) rather than being
given a pre locked page;
- it must be able to cope with short writes (where the
length passed to write_begin is greater than the number
of bytes copied into the page).
write_begin:
Called by the generic buffered write code to ask the filesystem to
prepare to write len bytes at the given offset in the file. The
address_space should check that the write will be able to complete,
......@@ -640,6 +608,9 @@ struct address_space_operations {
The filesystem must return the locked pagecache page for the specified
offset, in *pagep, for the caller to write into.
It must be able to cope with short writes (where the length passed to
write_begin is greater than the number of bytes copied into the page).
flags is a field for AOP_FLAG_xxx flags, described in
include/linux/fs.h.
......
Documentation/ftrace.txt
View file @ a1744d3b
......@@ -291,6 +291,9 @@ explains which is which.
CPU#: The CPU which the process was running on.
irqs-off: 'd' interrupts are disabled. '.' otherwise.
Note: If the architecture does not support a way to
read the irq flags variable, an 'X' will always
be printed here.
need-resched: 'N' task need_resched is set, '.' otherwise.
......
Documentation/i2c/busses/i2c-sis96x
View file @ a1744d3b
......@@ -42,7 +42,7 @@ I suspect that this driver could be made to work for the following SiS
chipsets as well: 635, and 635T. If anyone owns a board with those chips
AND is willing to risk crashing & burning an otherwise well-behaved kernel
in the name of progress... please contact me at <mhoffman@lightlink.com> or
via the project's mailing list: <i2c@lm-sensors.org>. Please send bug
via the linux-i2c mailing list: <linux-i2c@vger.kernel.org>. Please send bug
reports and/or success stories as well.
......
Documentation/isdn/CREDITS
View file @ a1744d3b
......@@ -5,7 +5,7 @@ I want to thank all who contributed to this project and especially to:
Thomas Bogendörfer (tsbogend@bigbug.franken.de)
Tester, lots of bugfixes and hints.
Alan Cox (alan@redhat.com)
Alan Cox (alan@lxorguk.ukuu.org.uk)
For help getting into standard-kernel.
Henner Eisen (eis@baty.hanse.de)
......
Documentation/ja_JP/HOWTO
View file @ a1744d3b
......@@ -11,14 +11,14 @@ for non English (read: Japanese) speakers and is not intended as a
fork. So if you have any comments or updates for this file, please try
to update the original English file first.
Last Updated: 2008/08/21
Last Updated: 2008/10/24
==================================
これは、
linux-2.6.27/Documentation/HOWTO
linux-2.6.28/Documentation/HOWTO
の和訳です。
翻訳団体： JF プロジェクト < http://www.linux.or.jp/JF/ >
翻訳日： 2008/8/5
翻訳日： 2008/10/24
翻訳者： Tsugikazu Shibata <tshibata at ab dot jp dot nec dot com>
校正者： 松倉さん <nbh--mats at nifty dot com>
小林 雅典さん (Masanori Kobayasi) <zap03216 at nifty dot ne dot jp>
......@@ -110,8 +110,8 @@ Linux カーネルソースツリーは幅広い範囲のドキュメントを
新しいドキュメントファイルも追加することを勧めます。
カーネルの変更が、カーネルがユーザ空間に公開しているインターフェイスの
変更を引き起こす場合、その変更を説明するマニュアルページのパッチや情報
をマニュアルページのメンテナ mtk.manpages@gmail.com に送ることを勧めま
す。
をマニュアルページのメンテナ mtk.manpages@gmail.com に送り、CC を
linux-api@ver.kernel.org に送ることを勧めます。
以下はカーネルソースツリーに含まれている読んでおくべきファイルの一覧で
す-
......@@ -149,7 +149,7 @@ Linux カーネルソースツリーは幅広い範囲のドキュメントを
この他にパッチを作る方法についてのよくできた記述は-
"The Perfect Patch"
http://www.zip.com.au/~akpm/linux/patches/stuff/tpp.txt
http://userweb.kernel.org/~akpm/stuff/tpp.txt
"Linux kernel patch submission format"
http://linux.yyz.us/patch-format.html
......@@ -664,7 +664,7 @@ Linux カーネルコミュニティは、一度に大量のコードの塊を
これについて全てがどのようにあるべきかについての詳細は、以下のドキュメ
ントの ChangeLog セクションを見てください-
"The Perfect Patch"
http://www.zip.com.au/~akpm/linux/patches/stuff/tpp.txt
http://userweb.kernel.org/~akpm/stuff/tpp.txt
これらのどれもが、時にはとても困難です。これらの慣例を完璧に実施するに
は数年かかるかもしれません。これは継続的な改善のプロセスであり、そのた
......
Documentation/kernel-parameters.txt
View file @ a1744d3b
......@@ -100,7 +100,7 @@ parameter is applicable:
X86-32 X86-32, aka i386 architecture is enabled.
X86-64 X86-64 architecture is enabled.
More X86-64 boot options can be found in
Documentation/x86_64/boot-options.txt .
Documentation/x86/x86_64/boot-options.txt .
X86 Either 32bit or 64bit x86 (same as X86-32+X86-64)
In addition, the following text indicates that the option:
......@@ -112,10 +112,10 @@ In addition, the following text indicates that the option:
Parameters denoted with BOOT are actually interpreted by the boot
loader, and have no meaning to the kernel directly.
Do not modify the syntax of boot loader parameters without extreme
need or coordination with <Documentation/i386/boot.txt>.
need or coordination with <Documentation/x86/i386/boot.txt>.
There are also arch-specific kernel-parameters not documented here.
See for example <Documentation/x86_64/boot-options.txt>.
See for example <Documentation/x86/x86_64/boot-options.txt>.
Note that ALL kernel parameters listed below are CASE SENSITIVE, and that
a trailing = on the name of any parameter states that that parameter will
......@@ -1222,7 +1222,7 @@ and is between 256 and 4096 characters. It is defined in the file
mce [X86-32] Machine Check Exception
mce=option [X86-64] See Documentation/x86_64/boot-options.txt
mce=option [X86-64] See Documentation/x86/x86_64/boot-options.txt
md= [HW] RAID subsystems devices and level
See Documentation/md.txt.
......@@ -1728,7 +1728,7 @@ and is between 256 and 4096 characters. It is defined in the file
See Documentation/paride.txt.
pirq= [SMP,APIC] Manual mp-table setup
See Documentation/i386/IO-APIC.txt.
See Documentation/x86/i386/IO-APIC.txt.
plip= [PPT,NET] Parallel port network link
Format: { parport<nr> | timid | 0 }
......@@ -2343,7 +2343,7 @@ and is between 256 and 4096 characters. It is defined in the file
See Documentation/fb/modedb.txt.
vga= [BOOT,X86-32] Select a particular video mode
See Documentation/i386/boot.txt and
See Documentation/x86/i386/boot.txt and
Documentation/svga.txt.
Use vga=ask for menu.
This is actually a boot loader parameter; the value is
......
Documentation/lguest/Makefile
View file @ a1744d3b
# This creates the demonstration utility "lguest" which runs a Linux guest.
CFLAGS:=-Wall -Wmissing-declarations -Wmissing-prototypes -O3 -I../../include
CFLAGS:=-Wall -Wmissing-declarations -Wmissing-prototypes -O3 -I../../include -I../../arch/x86/include
LDLIBS:=-lz
all: lguest
......
Documentation/lguest/lguest.c
View file @ a1744d3b
......@@ -44,7 +44,7 @@
#include "linux/virtio_console.h"
#include "linux/virtio_rng.h"
#include "linux/virtio_ring.h"
#include "asm-x86/bootparam.h"
#include "asm/bootparam.h"
/*L:110 We can ignore the 39 include files we need for this program, but I do
* want to draw attention to the use of kernel-style types.
*
......@@ -402,7 +402,7 @@ static unsigned long load_bzimage(int fd)
void *p = from_guest_phys(0x100000);
/* Go back to the start of the file and read the header. It should be
* a Linux boot header (see Documentation/i386/boot.txt) */
* a Linux boot header (see Documentation/x86/i386/boot.txt) */
lseek(fd, 0, SEEK_SET);
read(fd, &boot, sizeof(boot));
......
Documentation/networking/dmfe.txt
View file @ a1744d3b
......@@ -60,6 +60,6 @@ Tobias Ringstrom <tori@unhappy.mine.nu> : Current Maintainer
Contributors:
Marcelo Tosatti <marcelo@conectiva.com.br>
Alan Cox <alan@redhat.com>
Alan Cox <alan@lxorguk.ukuu.org.uk>
Jeff Garzik <jgarzik@pobox.com>
Vojtech Pavlik <vojtech@suse.cz>
Documentation/scheduler/00-INDEX
View file @ a1744d3b
......@@ -4,8 +4,6 @@ sched-arch.txt
- CPU Scheduler implementation hints for architecture specific code.
sched-coding.txt
- reference for various scheduler-related methods in the O(1) scheduler.
sched-design.txt
- goals, design and implementation of the Linux O(1) scheduler.
sched-design-CFS.txt
- goals, design and implementation of the Complete Fair Scheduler.
sched-domains.txt
......
Documentation/scheduler/sched-design-CFS.txt
View file @ a1744d3b
......@@ -92,7 +92,7 @@ other HZ detail. Thus the CFS scheduler has no notion of "timeslices" in the
way the previous scheduler had, and has no heuristics whatsoever. There is
only one central tunable (you have to switch on CONFIG_SCHED_DEBUG):
/proc/sys/kernel/sched_granularity_ns
/proc/sys/kernel/sched_min_granularity_ns
which can be used to tune the scheduler from "desktop" (i.e., low latencies) to
"server" (i.e., good batching) workloads. It defaults to a setting suitable
......
Documentation/scsi/aacraid.txt
View file @ a1744d3b
......@@ -128,7 +128,7 @@ Supported Cards/Chipsets
People
-------------------------
Alan Cox <alan@redhat.com>
Alan Cox <alan@lxorguk.ukuu.org.uk>
Christoph Hellwig <hch@infradead.org> (updates for new-style PCI probing and SCSI host registration,
small cleanups/fixes)
Matt Domsch <matt_domsch@dell.com> (revision ioctl, adapter messages)
......
Documentation/spi/.gitignore 0 → 100644
View file @ a1744d3b
spidev_fdx
spidev_test
Documentation/stable_kernel_rules.txt
View file @ a1744d3b
......@@ -12,6 +12,7 @@ Rules on what kind of patches are accepted, and which ones are not, into the
marked CONFIG_BROKEN), an oops, a hang, data corruption, a real
security issue, or some "oh, that's not good" issue. In short, something
critical.
- New device IDs and quirks are also accepted.
- No "theoretical race condition" issues, unless an explanation of how the
race can be exploited is also provided.
- It cannot contain any "trivial" fixes in it (spelling changes,
......
Documentation/sysctl/kernel.txt
View file @ a1744d3b
......@@ -363,11 +363,21 @@ tainted:
Non-zero if the kernel has been tainted. Numeric values, which
can be ORed together:
1 - A module with a non-GPL license has been loaded, this
includes modules with no license.
Set by modutils >= 2.4.9 and module-init-tools.
2 - A module was force loaded by insmod -f.
Set by modutils >= 2.4.9 and module-init-tools.
4 - Unsafe SMP processors: SMP with CPUs not designed for SMP.
64 - A module from drivers/staging was loaded.
1 - A module with a non-GPL license has been loaded, this
includes modules with no license.
Set by modutils >= 2.4.9 and module-init-tools.
2 - A module was force loaded by insmod -f.
Set by modutils >= 2.4.9 and module-init-tools.
4 - Unsafe SMP processors: SMP with CPUs not designed for SMP.
8 - A module was forcibly unloaded from the system by rmmod -f.
16 - A hardware machine check error occurred on the system.
32 - A bad page was discovered on the system.
64 - The user has asked that the system be marked "tainted". This
could be because they are running software that directly modifies
the hardware, or for other reasons.
128 - The system has died.
256 - The ACPI DSDT has been overridden with one supplied by the user
instead of using the one provided by the hardware.
512 - A kernel warning has occurred.
1024 - A module from drivers/staging was loaded.
Documentation/video4linux/bttv/CONTRIBUTORS
View file @ a1744d3b
......@@ -3,7 +3,7 @@ Contributors to bttv:
Michael Chu <mmchu@pobox.com>
AverMedia fix and more flexible card recognition
Alan Cox <alan@redhat.com>
Alan Cox <alan@lxorguk.ukuu.org.uk>
Video4Linux interface and 2.1.x kernel adaptation
Chris Kleitsch
......
Documentation/watchdog/src/.gitignore 0 → 100644
View file @ a1744d3b
watchdog-simple
watchdog-test
Documentation/x86/x86_64/boot-options.txt
View file @ a1744d3b
......@@ -35,7 +35,7 @@ APICs
nolapic Don't use the local APIC (alias for i386 compatibility)
pirq=... See Documentation/i386/IO-APIC.txt
pirq=... See Documentation/x86/i386/IO-APIC.txt
noapictimer Don't set up the APIC timer
......@@ -139,7 +139,7 @@ Non Executable Mappings
SMP
additional_cpus=NUM Allow NUM more CPUs for hotplug
(defaults are specified by the BIOS, see Documentation/x86_64/cpu-hotplug-spec)
(defaults are specified by the BIOS, see Documentation/x86/x86_64/cpu-hotplug-spec)
NUMA
......
Documentation/x86/x86_64/fake-numa-for-cpusets
View file @ a1744d3b
......@@ -10,7 +10,7 @@ amount of system memory that are available to a certain class of tasks.
For more information on the features of cpusets, see Documentation/cpusets.txt.
There are a number of different configurations you can use for your needs. For
more information on the numa=fake command line option and its various ways of
configuring fake nodes, see Documentation/x86_64/boot-options.txt.
configuring fake nodes, see Documentation/x86/x86_64/boot-options.txt.
For the purposes of this introduction, we'll assume a very primitive NUMA
emulation setup of "numa=fake=4*512,". This will split our system memory into
......
MAINTAINERS
View file @ a1744d3b
......@@ -347,7 +347,7 @@ S: Maintained
ALI1563 I2C DRIVER
P: Rudolf Marek
M: r.marek@assembler.cz
L: i2c@lm-sensors.org
L: linux-i2c@vger.kernel.org
S: Maintained
ALPHA PORT
......@@ -610,6 +610,11 @@ P: Philipp Zabel
M: philipp.zabel@gmail.com
S: Maintained
ARM/NEC MOBILEPRO 900/c MACHINE SUPPORT
P: Michael Petchkovsky
M: mkpetch@internode.on.net
S: Maintained
ARM/TOSA MACHINE SUPPORT
P: Dmitry Baryshkov
M: dbaryshkov@gmail.com
......@@ -738,6 +743,8 @@ P: Nick Kossifidis
M: mickflemm@gmail.com
P: Luis R. Rodriguez
M: mcgrof@gmail.com
P: Bob Copeland
M: me@bobcopeland.com
L: linux-wireless@vger.kernel.org
L: ath5k-devel@lists.ath5k.org
S: Maintained
......@@ -1744,7 +1751,7 @@ FREESCALE I2C CPM DRIVER
P: Jochen Friedrich
M: jochen@scram.de
L: linuxppc-dev@ozlabs.org
L: i2c@lm-sensors.org
L: linux-i2c@vger.kernel.org
S: Maintained
FREESCALE SOC FS_ENET DRIVER
......@@ -2017,7 +2024,7 @@ S: Maintained
I2C/SMBUS STUB DRIVER
P: Mark M. Hoffman
M: mhoffman@lightlink.com
L: i2c@lm-sensors.org
L: linux-i2c@vger.kernel.org
S: Maintained
I2C SUBSYSTEM
......@@ -2025,14 +2032,14 @@ P: Jean Delvare (PC drivers, core)
M: khali@linux-fr.org
P: Ben Dooks (embedded platforms)
M: ben-linux@fluff.org
L: i2c@lm-sensors.org
L: linux-i2c@vger.kernel.org
T: quilt http://khali.linux-fr.org/devel/linux-2.6/jdelvare-i2c/
S: Maintained
I2C-TINY-USB DRIVER
P: Till Harbaum
M: till@harbaum.org
L: i2c@lm-sensors.org
L: linux-i2c@vger.kernel.org
T: http://www.harbaum.org/till/i2c_tiny_usb
S: Maintained
......@@ -2696,6 +2703,16 @@ M: matthew@wil.cx
L: linux-scsi@vger.kernel.org
S: Maintained
LTP (Linux Test Project)
P: Subrata Modak
M: subrata@linux.vnet.ibm.com
P: Mike Frysinger
M: vapier@gentoo.org
L: ltp-list@lists.sourceforge.net (subscribers-only)
W: http://ltp.sourceforge.net/
T: git kernel.org/pub/scm/linux/kernel/git/galak/ltp.git
S: Maintained
M32R ARCHITECTURE
P: Hirokazu Takata
M: takata@linux-m32r.org
......@@ -3138,7 +3155,7 @@ S: Maintained
OPENCORES I2C BUS DRIVER
P: Peter Korsgaard
M: jacmet@sunsite.dk
L: i2c@lm-sensors.org
L: linux-i2c@vger.kernel.org
S: Maintained
OPROFILE
......@@ -3185,7 +3202,7 @@ S: Maintained
PA SEMI SMBUS DRIVER
P: Olof Johansson
M: olof@lixom.net
L: i2c@lm-sensors.org
L: linux-i2c@vger.kernel.org
S: Maintained
PANASONIC LAPTOP ACPI EXTRAS DRIVER
......@@ -3330,7 +3347,7 @@ S: Maintained
PNXxxxx I2C DRIVER
P: Vitaly Wool
M: vitalywool@gmail.com
L: i2c@lm-sensors.org
L: linux-i2c@vger.kernel.org
S: Maintained
PPP PROTOCOL DRIVERS AND COMPRESSORS
......@@ -3794,7 +3811,7 @@ S: Maintained
SIS 96X I2C/SMBUS DRIVER
P: Mark M. Hoffman
M: mhoffman@lightlink.com
L: i2c@lm-sensors.org
L: linux-i2c@vger.kernel.org
S: Maintained
SIS FRAMEBUFFER DRIVER
......@@ -4541,7 +4558,7 @@ S: Maintained
VIAPRO SMBUS DRIVER
P: Jean Delvare
M: khali@linux-fr.org
L: i2c@lm-sensors.org
L: linux-i2c@vger.kernel.org
S: Maintained
VIA UNICHROME(PRO)/CHROME9 FRAMEBUFFER DRIVER
......
Makefile
View file @ a1744d3b
......@@ -536,7 +536,7 @@ KBUILD_CFLAGS += -g
KBUILD_AFLAGS += -gdwarf-2
endif
ifdef CONFIG_FTRACE
ifdef CONFIG_FUNCTION_TRACER
KBUILD_CFLAGS += -pg
endif
......@@ -961,6 +961,7 @@ export CPPFLAGS_vmlinux.lds += -P -C -U$(ARCH)
# The asm symlink changes when $(ARCH) changes.
# Detect this and ask user to run make mrproper
# If asm is a stale symlink (point to dir that does not exist) remove it
define check-symlink
set -e; \
if [ -L include/asm ]; then \
......@@ -970,6 +971,10 @@ define check-symlink
echo " set ARCH or save .config and run 'make mrproper' to fix it"; \
exit 1; \
fi; \
test -e $$asmlink || rm include/asm; \
elif [ -d include/asm ]; then \
echo "ERROR: $@ is a directory but a symlink was expected";\
exit 1; \
fi
endef
......@@ -1431,7 +1436,8 @@ ALLSOURCE_ARCHS := $(SRCARCH)
define find-sources
( for arch in $(ALLSOURCE_ARCHS) ; do \
find $(__srctree)arch/$${arch} $(RCS_FIND_IGNORE) \
-name $1 -print; \
-wholename $(__srctree)arch/$${arch}/include/asm -type d -prune \
-o -name $1 -print; \
done ; \
find $(__srctree)security/selinux/include $(RCS_FIND_IGNORE) \
-name $1 -print; \
......
arch/arm/Kconfig
View file @ a1744d3b
......@@ -16,8 +16,7 @@ config ARM
select HAVE_ARCH_KGDB
select HAVE_KPROBES if (!XIP_KERNEL)
select HAVE_KRETPROBES if (HAVE_KPROBES)
select HAVE_FTRACE if (!XIP_KERNEL)
select HAVE_DYNAMIC_FTRACE if (HAVE_FTRACE)
select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
select HAVE_GENERIC_DMA_COHERENT
help
The ARM series is a line of low-power-consumption RISC chip designs
......
arch/arm/boot/compressed/Makefile
View file @ a1744d3b
......@@ -70,7 +70,7 @@ SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/
targets := vmlinux vmlinux.lds piggy.gz piggy.o font.o font.c \
head.o misc.o $(OBJS)
ifeq ($(CONFIG_FTRACE),y)
ifeq ($(CONFIG_FUNCTION_TRACER),y)
ORIG_CFLAGS := $(KBUILD_CFLAGS)
KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
endif
......
arch/arm/common/sharpsl_pm.c
View file @ a1744d3b
......@@ -54,11 +54,13 @@
/*
* Prototypes
*/
#ifdef CONFIG_PM
static int sharpsl_off_charge_battery(void);
static int sharpsl_check_battery_temp(void);
static int sharpsl_check_battery_voltage(void);
static int sharpsl_ac_check(void);
static int sharpsl_fatal_check(void);
#endif
static int sharpsl_check_battery_temp(void);
static int sharpsl_ac_check(void);
static int sharpsl_average_value(int ad);
static void sharpsl_average_clear(void);
static void sharpsl_charge_toggle(struct work_struct *private_);
......@@ -424,6 +426,7 @@ static int sharpsl_check_battery_temp(void)
return 0;
}
#ifdef CONFIG_PM
static int sharpsl_check_battery_voltage(void)
{
int val, i, buff[5];
......@@ -455,6 +458,7 @@ static int sharpsl_check_battery_voltage(void)
return 0;
}
#endif
static int sharpsl_ac_check(void)
{
......@@ -586,8 +590,6 @@ static int corgi_pxa_pm_enter(suspend_state_t state)
return 0;
}
#endif
/*
* Check for fatal battery errors
......@@ -738,7 +740,10 @@ static int sharpsl_off_charge_battery(void)
}
}
}
#else
#define sharpsl_pm_suspend NULL
#define sharpsl_pm_resume NULL
#endif
static ssize_t battery_percentage_show(struct device *dev, struct device_attribute *attr, char *buf)
{
......@@ -768,10 +773,12 @@ static void sharpsl_apm_get_power_status(struct apm_power_info *info)
info->battery_life = sharpsl_pm.battstat.mainbat_percent;
}
#ifdef CONFIG_PM
static struct platform_suspend_ops sharpsl_pm_ops = {
.enter = corgi_pxa_pm_enter,
.valid = suspend_valid_only_mem,
};
#endif
static int __init sharpsl_pm_probe(struct platform_device *pdev)
{
......@@ -802,7 +809,9 @@ static int __init sharpsl_pm_probe(struct platform_device *pdev)
apm_get_power_status = sharpsl_apm_get_power_status;
#ifdef CONFIG_PM
suspend_set_ops(&sharpsl_pm_ops);
#endif
mod_timer(&sharpsl_pm.ac_timer, jiffies + msecs_to_jiffies(250));
......
arch/arm/include/asm/ftrace.h
View file @ a1744d3b
#ifndef _ASM_ARM_FTRACE
#define _ASM_ARM_FTRACE
#ifdef CONFIG_FTRACE
#ifdef CONFIG_FUNCTION_TRACER
#define MCOUNT_ADDR ((long)(mcount))
#define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */
......
arch/arm/kernel/armksyms.c
View file @ a1744d3b
......@@ -183,6 +183,6 @@ EXPORT_SYMBOL(_find_next_bit_be);
EXPORT_SYMBOL(copy_page);
#ifdef CONFIG_FTRACE
#ifdef CONFIG_FUNCTION_TRACER
EXPORT_SYMBOL(mcount);
#endif
arch/arm/kernel/entry-common.S
View file @ a1744d3b
......@@ -101,7 +101,7 @@ ENDPROC(ret_from_fork)
#undef CALL
#define CALL(x) .long x
#ifdef CONFIG_FTRACE
#ifdef CONFIG_FUNCTION_TRACER
#ifdef CONFIG_DYNAMIC_FTRACE
ENTRY(mcount)
stmdb sp!, {r0-r3, lr}
......@@ -149,7 +149,7 @@ trace:
ftrace_stub:
mov pc, lr
#endif /* CONFIG_FTRACE */
#endif /* CONFIG_FUNCTION_TRACER */
/*=============================================================================
* SWI handler
......
arch/arm/kernel/ftrace.c
View file @ a1744d3b
......@@ -95,19 +95,6 @@ int ftrace_update_ftrace_func(ftrace_func_t func)
return ret;
}
int ftrace_mcount_set(unsigned long *data)
{
unsigned long pc, old;
unsigned long *addr = data;
unsigned char *new;
pc = (unsigned long)&mcount_call;
memcpy(&old, &mcount_call, MCOUNT_INSN_SIZE);
new = ftrace_call_replace(pc, *addr);
*addr = ftrace_modify_code(pc, (unsigned char *)&old, new);
return 0;
}
/* run from kstop_machine */
int __init ftrace_dyn_arch_init(void *data)
{
......
arch/arm/mach-at91/board-afeb-9260v1.c
View file @ a1744d3b
......@@ -165,6 +165,7 @@ static struct at91_mmc_data __initdata afeb9260_mmc_data = {
static struct i2c_board_info __initdata afeb9260_i2c_devices[] = {
{
I2C_BOARD_INFO("fm3130", 0x68),
}, {
I2C_BOARD_INFO("24c64", 0x50),
},
};
......
arch/arm/mach-at91/include/mach/gpio.h
View file @ a1744d3b
......@@ -13,6 +13,7 @@
#ifndef __ASM_ARCH_AT91RM9200_GPIO_H
#define __ASM_ARCH_AT91RM9200_GPIO_H
#include <linux/kernel.h>
#include <asm/irq.h>
#define PIN_BASE NR_AIC_IRQS
......@@ -220,6 +221,7 @@ static inline int gpio_request(unsigned gpio, const char *label)
static inline void gpio_free(unsigned gpio)
{
might_sleep();
}
extern int gpio_direction_input(unsigned gpio);
......
arch/arm/mach-ep93xx/core.c
View file @ a1744d3b
......@@ -26,6 +26,7 @@
#include <linux/serial_core.h>
#include <linux/device.h>
#include <linux/mm.h>
#include <linux/dma-mapping.h>
#include <linux/time.h>
#include <linux/timex.h>
#include <linux/delay.h>
......@@ -449,12 +450,13 @@ static struct resource ep93xx_ohci_resources[] = {
},
};
static struct platform_device ep93xx_ohci_device = {
.name = "ep93xx-ohci",
.id = -1,
.dev = {
.dma_mask = (void *)0xffffffff,
.coherent_dma_mask = 0xffffffff,
.dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask,
.coherent_dma_mask = DMA_BIT_MASK(32),
},
.num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
.resource = ep93xx_ohci_resources,
......
arch/arm/mach-imx/include/mach/gpio.h
View file @ a1744d3b
#ifndef _IMX_GPIO_H
#include <linux/kernel.h>
#include <mach/imx-regs.h>
#define IMX_GPIO_ALLOC_MODE_NORMAL 0
......@@ -63,6 +64,8 @@ static inline int gpio_request(unsigned gpio, const char *label)
static inline void gpio_free(unsigned gpio)
{
might_sleep();
imx_gpio_free(gpio);
}
......
arch/arm/mach-ixp4xx/include/mach/gpio.h
View file @ a1744d3b
......@@ -25,6 +25,7 @@
#ifndef __ASM_ARCH_IXP4XX_GPIO_H
#define __ASM_ARCH_IXP4XX_GPIO_H
#include <linux/kernel.h>
#include <mach/hardware.h>
static inline int gpio_request(unsigned gpio, const char *label)
......@@ -34,6 +35,8 @@ static inline int gpio_request(unsigned gpio, const char *label)
static inline void gpio_free(unsigned gpio)
{
might_sleep();
return;
}
......
arch/arm/mach-ks8695/include/mach/gpio.h
View file @ a1744d3b
......@@ -11,6 +11,8 @@
#ifndef __ASM_ARCH_GPIO_H_
#define __ASM_ARCH_GPIO_H_
#include <linux/kernel.h>
#define KS8695_GPIO_0 0
#define KS8695_GPIO_1 1
#define KS8695_GPIO_2 2
......@@ -74,6 +76,7 @@ static inline int gpio_request(unsigned int pin, const char *label)
static inline void gpio_free(unsigned int pin)
{
might_sleep();
}
#endif
arch/arm/mach-mx3/mx31ads.c
View file @ a1744d3b
......@@ -35,6 +35,8 @@
#include <mach/imx-uart.h>
#include <mach/iomux-mx3.h>
#include "devices.h"
/*!
* @file mx31ads.c
*
......
arch/arm/mach-mx3/pcm037.c
View file @ a1744d3b
......@@ -91,12 +91,12 @@ static struct map_desc pcm037_io_desc[] __initdata = {
.virtual = AIPS1_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(AIPS1_BASE_ADDR),
.length = AIPS1_SIZE,
.type = MT_DEVICE
.type = MT_DEVICE_NONSHARED
}, {
.virtual = AIPS2_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(AIPS2_BASE_ADDR),
.length = AIPS2_SIZE,
.type = MT_DEVICE
.type = MT_DEVICE_NONSHARED
},
};
......
arch/arm/mach-ns9xxx/gpio.c
View file @ a1744d3b
......@@ -8,6 +8,7 @@
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/compiler.h>
#include <linux/init.h>
#include <linux/spinlock.h>
......@@ -63,6 +64,7 @@ EXPORT_SYMBOL(gpio_request);
void gpio_free(unsigned gpio)
{
might_sleep();
clear_bit(gpio, gpiores);
return;
}
......
arch/arm/mach-orion5x/gpio.c
View file @ a1744d3b
......@@ -165,6 +165,8 @@ EXPORT_SYMBOL(gpio_request);
void gpio_free(unsigned pin)
{
might_sleep();
if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
pr_debug("%s: invalid GPIO %d\n", __func__, pin);
return;
......
arch/arm/mach-pxa/corgi_pm.c
View file @ a1744d3b
......@@ -204,7 +204,9 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = {
.read_devdata = corgipm_read_devdata,
.charger_wakeup = corgi_charger_wakeup,
.should_wakeup = corgi_should_wakeup,
#ifdef CONFIG_BACKLIGHT_CORGI
#if defined(CONFIG_LCD_CORGI)
.backlight_limit = corgi_lcd_limit_intensity,
#elif defined(CONFIG_BACKLIGHT_CORGI)
.backlight_limit = corgibl_limit_intensity,
#endif
.charge_on_volt = SHARPSL_CHARGE_ON_VOLT,
......
arch/arm/mach-pxa/include/mach/sharpsl.h
View file @ a1744d3b
......@@ -26,6 +26,7 @@ struct corgits_machinfo {
* SharpSL Backlight
*/
extern void corgibl_limit_intensity(int limit);
extern void corgi_lcd_limit_intensity(int limit);
/*
......
arch/arm/mach-pxa/spitz.c
View file @ a1744d3b
......@@ -385,6 +385,16 @@ static void __init spitz_init_spi(void)
if (err)
goto err_free_2;
err = gpio_direction_output(SPITZ_GPIO_ADS7846_CS, 1);
if (err)
goto err_free_3;
err = gpio_direction_output(SPITZ_GPIO_LCDCON_CS, 1);
if (err)
goto err_free_3;
err = gpio_direction_output(SPITZ_GPIO_MAX1111_CS, 1);
if (err)
goto err_free_3;
if (machine_is_akita()) {
spitz_lcdcon_info.gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT;
spitz_lcdcon_info.gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON;
......@@ -394,6 +404,8 @@ static void __init spitz_init_spi(void)
spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices));
return;
err_free_3:
gpio_free(SPITZ_GPIO_MAX1111_CS);
err_free_2:
gpio_free(SPITZ_GPIO_LCDCON_CS);
err_free_1:
......
arch/arm/mach-pxa/spitz_pm.c
View file @ a1744d3b
......@@ -198,7 +198,9 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = {
.read_devdata = spitzpm_read_devdata,
.charger_wakeup = spitz_charger_wakeup,
.should_wakeup = spitz_should_wakeup,
#ifdef CONFIG_BACKLIGHT_CORGI
#if defined(CONFIG_LCD_CORGI)
.backlight_limit = corgi_lcd_limit_intensity,
#elif defined(CONFIG_BACKLIGHT_CORGI)
.backlight_limit = corgibl_limit_intensity,
#endif
.charge_on_volt = SHARPSL_CHARGE_ON_VOLT,
......
arch/arm/mm/proc-xsc3.S
View file @ a1744d3b
......@@ -349,7 +349,7 @@ ENTRY(cpu_xsc3_switch_mm)
cpu_xsc3_mt_table:
.long 0x00 @ L_PTE_MT_UNCACHED
.long PTE_EXT_TEX(1) @ L_PTE_MT_BUFFERABLE
.long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH
.long PTE_EXT_TEX(5) | PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH
.long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK
.long PTE_EXT_TEX(1) | PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED
.long 0x00 @ unused
......
arch/arm/plat-mxc/gpio.c
View file @ a1744d3b
......@@ -188,7 +188,7 @@ static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset)
struct mxc_gpio_port *port =
container_of(chip, struct mxc_gpio_port, chip);
return (__raw_readl(port->base + GPIO_DR) >> offset) & 1;
return (__raw_readl(port->base + GPIO_PSR) >> offset) & 1;
}
static int mxc_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
......
arch/arm/plat-mxc/include/mach/io.h
View file @ a1744d3b
......@@ -14,6 +14,26 @@
/* Allow IO space to be anywhere in the memory */
#define IO_SPACE_LIMIT 0xffffffff
#ifdef CONFIG_ARCH_MX3
#define __arch_ioremap __mx3_ioremap
#define __arch_iounmap __iounmap
static inline void __iomem *
__mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
{
if (mtype == MT_DEVICE) {
/* Access all peripherals below 0x80000000 as nonshared device
* but leave l2cc alone.
*/
if ((phys_addr < 0x80000000) && ((phys_addr < L2CC_BASE_ADDR) ||
(phys_addr >= L2CC_BASE_ADDR + L2CC_SIZE)))
mtype = MT_DEVICE_NONSHARED;
}
return __arm_ioremap(phys_addr, size, mtype);
}
#endif
/* io address mapping macro */
#define __io(a) ((void __iomem *)(a))
......
arch/ia64/include/asm/iommu.h
View file @ a1744d3b
......@@ -11,6 +11,5 @@ extern int force_iommu, no_iommu;
extern int iommu_detected;
extern void iommu_dma_init(void);
extern void machvec_init(const char *name);
extern int forbid_dac;
#endif
arch/ia64/include/asm/kvm_host.h
View file @ a1744d3b
......@@ -365,7 +365,8 @@ struct kvm_vcpu_arch {
long itc_offset;
unsigned long itc_check;
unsigned long timer_check;
unsigned long timer_pending;
unsigned int timer_pending;
unsigned int timer_fired;
unsigned long vrr[8];
unsigned long ibr[8];
......@@ -417,6 +418,9 @@ struct kvm_arch {
struct list_head assigned_dev_head;
struct dmar_domain *intel_iommu_domain;
struct hlist_head irq_ack_notifier_list;
unsigned long irq_sources_bitmap;
unsigned long irq_states[KVM_IOAPIC_NUM_PINS];
};
union cpuid3_t {
......
arch/ia64/kernel/pci-dma.c
View file @ a1744d3b
......@@ -89,13 +89,6 @@ int iommu_dma_supported(struct device *dev, u64 mask)
{
struct dma_mapping_ops *ops = get_dma_ops(dev);
#ifdef CONFIG_PCI
if (mask > 0xffffffff && forbid_dac > 0) {
dev_info(dev, "Disallowing DAC for device\n");
return 0;
}
#endif
if (ops->dma_supported_op)
return ops->dma_supported_op(dev, mask);
......
arch/ia64/kvm/Makefile
View file @ a1744d3b
......@@ -29,13 +29,18 @@ define cmd_offsets
echo ""; \
echo "#endif" ) > $@
endef
# We use internal rules to avoid the "is up to date" message from make
arch/ia64/kvm/asm-offsets.s: arch/ia64/kvm/asm-offsets.c
arch/ia64/kvm/asm-offsets.s: arch/ia64/kvm/asm-offsets.c \
$(wildcard $(srctree)/arch/ia64/include/asm/*.h)\
$(wildcard $(srctree)/include/linux/*.h)
$(call if_changed_dep,cc_s_c)
$(obj)/$(offsets-file): arch/ia64/kvm/asm-offsets.s
$(call cmd,offsets)
FORCE : $(obj)/$(offsets-file)
#
# Makefile for Kernel-based Virtual Machine module
#
......@@ -53,7 +58,6 @@ endif
kvm-objs := $(common-objs) kvm-ia64.o kvm_fw.o
obj-$(CONFIG_KVM) += kvm.o
FORCE : $(obj)/$(offsets-file)
EXTRA_CFLAGS_vcpu.o += -mfixed-range=f2-f5,f12-f127
kvm-intel-objs = vmm.o vmm_ivt.o trampoline.o vcpu.o optvfault.o mmio.o \
vtlb.o process.o
......
arch/ia64/kvm/kvm-ia64.c
View file @ a1744d3b
......@@ -385,6 +385,7 @@ static int handle_global_purge(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
struct kvm *kvm = vcpu->kvm;
struct call_data call_data;
int i;
call_data.ptc_g_data = p->u.ptc_g_data;
for (i = 0; i < KVM_MAX_VCPUS; i++) {
......@@ -418,33 +419,41 @@ int kvm_emulate_halt(struct kvm_vcpu *vcpu)
ktime_t kt;
long itc_diff;
unsigned long vcpu_now_itc;
unsigned long expires;
struct hrtimer *p_ht = &vcpu->arch.hlt_timer;
unsigned long cyc_per_usec = local_cpu_data->cyc_per_usec;
struct vpd *vpd = to_host(vcpu->kvm, vcpu->arch.vpd);
vcpu_now_itc = ia64_getreg(_IA64_REG_AR_ITC) + vcpu->arch.itc_offset;
if (irqchip_in_kernel(vcpu->kvm)) {
if (time_after(vcpu_now_itc, vpd->itm)) {
vcpu->arch.timer_check = 1;
return 1;
}
itc_diff = vpd->itm - vcpu_now_itc;
if (itc_diff < 0)
itc_diff = -itc_diff;
vcpu_now_itc = ia64_getreg(_IA64_REG_AR_ITC) + vcpu->arch.itc_offset;
expires = div64_u64(itc_diff, cyc_per_usec);
kt = ktime_set(0, 1000 * expires);
vcpu->arch.ht_active = 1;
hrtimer_start(p_ht, kt, HRTIMER_MODE_ABS);
if (time_after(vcpu_now_itc, vpd->itm)) {
vcpu->arch.timer_check = 1;
return 1;
}
itc_diff = vpd->itm - vcpu_now_itc;
if (itc_diff < 0)
itc_diff = -itc_diff;
expires = div64_u64(itc_diff, cyc_per_usec);
kt = ktime_set(0, 1000 * expires);
down_read(&vcpu->kvm->slots_lock);
vcpu->arch.ht_active = 1;
hrtimer_start(p_ht, kt, HRTIMER_MODE_ABS);
if (irqchip_in_kernel(vcpu->kvm)) {
vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
kvm_vcpu_block(vcpu);
hrtimer_cancel(p_ht);
vcpu->arch.ht_active = 0;
if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
vcpu->arch.mp_state =
KVM_MP_STATE_RUNNABLE;
up_read(&vcpu->kvm->slots_lock);
if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
return -EINTR;
return 1;
......@@ -484,10 +493,6 @@ static int (*kvm_vti_exit_handlers[])(struct kvm_vcpu *vcpu,
static const int kvm_vti_max_exit_handlers =
sizeof(kvm_vti_exit_handlers)/sizeof(*kvm_vti_exit_handlers);
static void kvm_prepare_guest_switch(struct kvm_vcpu *vcpu)
{
}
static uint32_t kvm_get_exit_reason(struct kvm_vcpu *vcpu)
{
struct exit_ctl_data *p_exit_data;
......@@ -600,8 +605,6 @@ static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
again:
preempt_disable();
kvm_prepare_guest_switch(vcpu);
local_irq_disable();
if (signal_pending(current)) {
......@@ -614,7 +617,7 @@ static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
vcpu->guest_mode = 1;
kvm_guest_enter();
down_read(&vcpu->kvm->slots_lock);
r = vti_vcpu_run(vcpu, kvm_run);
if (r < 0) {
local_irq_enable();
......@@ -634,9 +637,8 @@ static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
* But we need to prevent reordering, hence this barrier():
*/
barrier();
kvm_guest_exit();
up_read(&vcpu->kvm->slots_lock);
preempt_enable();
r = kvm_handle_exit(kvm_run, vcpu);
......@@ -673,6 +675,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
kvm_vcpu_block(vcpu);
clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
vcpu_put(vcpu);
return -EAGAIN;
}
......@@ -778,6 +781,9 @@ static void kvm_init_vm(struct kvm *kvm)
kvm_build_io_pmt(kvm);
INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
/* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
}
struct kvm *kvm_arch_create_vm(void)
......@@ -941,9 +947,8 @@ long kvm_arch_vm_ioctl(struct file *filp,
goto out;
if (irqchip_in_kernel(kvm)) {
mutex_lock(&kvm->lock);
kvm_ioapic_set_irq(kvm->arch.vioapic,
irq_event.irq,
irq_event.level);
kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
irq_event.irq, irq_event.level);
mutex_unlock(&kvm->lock);
r = 0;
}
......@@ -1123,15 +1128,16 @@ static enum hrtimer_restart hlt_timer_fn(struct hrtimer *data)
wait_queue_head_t *q;
vcpu = container_of(data, struct kvm_vcpu, arch.hlt_timer);
q = &vcpu->wq;
if (vcpu->arch.mp_state != KVM_MP_STATE_HALTED)
goto out;
q = &vcpu->wq;
if (waitqueue_active(q)) {
vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
if (waitqueue_active(q))
wake_up_interruptible(q);
}
out:
vcpu->arch.timer_fired = 1;
vcpu->arch.timer_check = 1;
return HRTIMER_NORESTART;
}
......@@ -1700,12 +1706,14 @@ static void vcpu_kick_intr(void *info)
void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
{
int ipi_pcpu = vcpu->cpu;
int cpu = get_cpu();
if (waitqueue_active(&vcpu->wq))
wake_up_interruptible(&vcpu->wq);
if (vcpu->guest_mode)
if (vcpu->guest_mode && cpu != ipi_pcpu)
smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
put_cpu();
}
int kvm_apic_set_irq(struct kvm_vcpu *vcpu, u8 vec, u8 trig)
......@@ -1715,13 +1723,7 @@ int kvm_apic_set_irq(struct kvm_vcpu *vcpu, u8 vec, u8 trig)
if (!test_and_set_bit(vec, &vpd->irr[0])) {
vcpu->arch.irq_new_pending = 1;
if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
kvm_vcpu_kick(vcpu);
else if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED) {
vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
if (waitqueue_active(&vcpu->wq))
wake_up_interruptible(&vcpu->wq);
}
kvm_vcpu_kick(vcpu);
return 1;
}
return 0;
......@@ -1791,7 +1793,7 @@ int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu)
int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
{
return 0;
return vcpu->arch.timer_fired;
}
gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
......
arch/ia64/kvm/kvm_fw.c
View file @ a1744d3b
......@@ -286,6 +286,12 @@ static u64 kvm_get_pal_call_index(struct kvm_vcpu *vcpu)
return index;
}
static void prepare_for_halt(struct kvm_vcpu *vcpu)
{
vcpu->arch.timer_pending = 1;
vcpu->arch.timer_fired = 0;
}
int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *run)
{
......@@ -304,11 +310,10 @@ int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *run)
break;
case PAL_HALT_LIGHT:
{
vcpu->arch.timer_pending = 1;
INIT_PAL_STATUS_SUCCESS(result);
prepare_for_halt(vcpu);
if (kvm_highest_pending_irq(vcpu) == -1)
ret = kvm_emulate_halt(vcpu);
}
break;
......
arch/ia64/kvm/process.c
View file @ a1744d3b
......@@ -713,7 +713,7 @@ void leave_hypervisor_tail(void)
if (!(VCPU(v, itv) & (1 << 16))) {
vcpu_pend_interrupt(v, VCPU(v, itv)
& 0xff);
VMX(v, itc_check) = 0;
VMX(v, itc_check) = 0;
} else {
v->arch.timer_pending = 1;
}
......
arch/mips/Kconfig
View file @ a1744d3b
......@@ -238,21 +238,8 @@ config MIPS_SIM
This option enables support for MIPS Technologies MIPSsim software
emulator.
config MARKEINS
bool "NEC EMMA2RH Mark-eins"
select CEVT_R4K
select CSRC_R4K
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_CPU
select SWAP_IO_SPACE
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_HAS_CPU_R5000
help
This enables support for the R5432-based NEC Mark-eins
boards with R5500 CPU.
config MACH_EMMA
bool "NEC EMMA series based machines"
config MACH_VR41XX
bool "NEC VR4100 series based machines"
......@@ -261,6 +248,19 @@ config MACH_VR41XX
select SYS_HAS_CPU_VR41XX
select GENERIC_HARDIRQS_NO__DO_IRQ
config NXP_STB220
bool "NXP STB220 board"
select SOC_PNX833X
help
Support for NXP Semiconductors STB220 Development Board.
config NXP_STB225
bool "NXP 225 board"
select SOC_PNX833X
select SOC_PNX8335
help
Support for NXP Semiconductors STB225 Development Board.
config PNX8550_JBS
bool "NXP PNX8550 based JBS board"
select PNX8550
......@@ -327,7 +327,6 @@ config SGI_IP22
select IP22_CPU_SCACHE
select IRQ_CPU
select GENERIC_ISA_DMA_SUPPORT_BROKEN
select SGI_HAS_DS1286
select SGI_HAS_I8042
select SGI_HAS_INDYDOG
select SGI_HAS_HAL2
......@@ -382,7 +381,6 @@ config SGI_IP28
select HW_HAS_EISA
select I8253
select I8259
select SGI_HAS_DS1286
select SGI_HAS_I8042
select SGI_HAS_INDYDOG
select SGI_HAS_HAL2
......@@ -601,6 +599,7 @@ endchoice
source "arch/mips/alchemy/Kconfig"
source "arch/mips/basler/excite/Kconfig"
source "arch/mips/emma/Kconfig"
source "arch/mips/jazz/Kconfig"
source "arch/mips/lasat/Kconfig"
source "arch/mips/pmc-sierra/Kconfig"
......@@ -849,6 +848,24 @@ config MIPS_RM9122
bool
select SERIAL_RM9000
config SOC_PNX833X
bool
select CEVT_R4K
select CSRC_R4K
select IRQ_CPU
select DMA_NONCOHERENT
select SYS_HAS_CPU_MIPS32_R2
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_BIG_ENDIAN
select GENERIC_HARDIRQS_NO__DO_IRQ
select GENERIC_GPIO
select CPU_MIPSR2_IRQ_VI
config SOC_PNX8335
bool
select SOC_PNX833X
config PNX8550
bool
select SOC_PNX8550
......@@ -874,9 +891,6 @@ config EMMA2RH
config SERIAL_RM9000
bool
config SGI_HAS_DS1286
bool
config SGI_HAS_INDYDOG
bool
......@@ -1092,6 +1106,16 @@ config CPU_R5432
select CPU_SUPPORTS_32BIT_KERNEL
select CPU_SUPPORTS_64BIT_KERNEL
config CPU_R5500
bool "R5500"
depends on SYS_HAS_CPU_R5500
select CPU_HAS_LLSC
select CPU_SUPPORTS_32BIT_KERNEL
select CPU_SUPPORTS_64BIT_KERNEL
help
NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
instruction set.
config CPU_R6000
bool "R6000"
depends on EXPERIMENTAL
......@@ -1202,6 +1226,9 @@ config SYS_HAS_CPU_R5000
config SYS_HAS_CPU_R5432
bool
config SYS_HAS_CPU_R5500
bool
config SYS_HAS_CPU_R6000
bool
......
arch/mips/Makefile
View file @ a1744d3b
......@@ -131,6 +131,8 @@ cflags-$(CONFIG_CPU_MIPS64_R2) += $(call cc-option,-march=mips64r2,-mips64r2 -U_
cflags-$(CONFIG_CPU_R5000) += -march=r5000 -Wa,--trap
cflags-$(CONFIG_CPU_R5432) += $(call cc-option,-march=r5400,-march=r5000) \
-Wa,--trap
cflags-$(CONFIG_CPU_R5500) += $(call cc-option,-march=r5500,-march=r5000) \
-Wa,--trap
cflags-$(CONFIG_CPU_NEVADA) += $(call cc-option,-march=rm5200,-march=r5000) \
-Wa,--trap
cflags-$(CONFIG_CPU_RM7000) += $(call cc-option,-march=rm7000,-march=r5000) \
......@@ -381,6 +383,14 @@ load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
#
load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
# NXP STB225
core-$(CONFIG_SOC_PNX833X) += arch/mips/nxp/pnx833x/common/
cflags-$(CONFIG_SOC_PNX833X) += -Iarch/mips/include/asm/mach-pnx833x
libs-$(CONFIG_NXP_STB220) += arch/mips/nxp/pnx833x/stb22x/
load-$(CONFIG_NXP_STB220) += 0xffffffff80001000
libs-$(CONFIG_NXP_STB225) += arch/mips/nxp/pnx833x/stb22x/
load-$(CONFIG_NXP_STB225) += 0xffffffff80001000
#
# Common NXP PNX8550
#
......@@ -399,14 +409,17 @@ load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
libs-$(CONFIG_PNX8550_STB810) += arch/mips/nxp/pnx8550/stb810/
load-$(CONFIG_PNX8550_STB810) += 0xffffffff80060000
# NEC EMMA2RH boards
#
core-$(CONFIG_EMMA2RH) += arch/mips/emma2rh/common/
cflags-$(CONFIG_EMMA2RH) += -I$(srctree)/arch/mips/include/asm/mach-emma2rh
# Common NEC EMMAXXX
#
core-$(CONFIG_SOC_EMMA) += arch/mips/emma/common/
cflags-$(CONFIG_SOC_EMMA2RH) += -I$(srctree)/arch/mips/include/asm/mach-emma2rh
#
# NEC EMMA2RH Mark-eins
core-$(CONFIG_MARKEINS) += arch/mips/emma2rh/markeins/
load-$(CONFIG_MARKEINS) += 0xffffffff88100000
#
core-$(CONFIG_NEC_MARKEINS) += arch/mips/emma/markeins/
load-$(CONFIG_NEC_MARKEINS) += 0xffffffff88100000
#
# SGI IP22 (Indy/Indigo2)
......
arch/mips/alchemy/common/platform.c
View file @ a1744d3b
......@@ -17,6 +17,8 @@
#include <linux/init.h>
#include <asm/mach-au1x00/au1xxx.h>
#include <asm/mach-au1x00/au1xxx_dbdma.h>
#include <asm/mach-au1x00/au1100_mmc.h>
#define PORT(_base, _irq) \
{ \
......@@ -163,24 +165,6 @@ static struct resource au1xxx_usb_gdt_resources[] = {
},
};
static struct resource au1xxx_mmc_resources[] = {
[0] = {
.start = SD0_PHYS_ADDR,
.end = SD0_PHYS_ADDR + 0x7ffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = SD1_PHYS_ADDR,
.end = SD1_PHYS_ADDR + 0x7ffff,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = AU1200_SD_INT,
.end = AU1200_SD_INT,
.flags = IORESOURCE_IRQ,
}
};
static u64 udc_dmamask = DMA_32BIT_MASK;
static struct platform_device au1xxx_usb_gdt_device = {
......@@ -249,16 +233,79 @@ static struct platform_device au1200_lcd_device = {
static u64 au1xxx_mmc_dmamask = DMA_32BIT_MASK;
static struct platform_device au1xxx_mmc_device = {
extern struct au1xmmc_platform_data au1xmmc_platdata[2];
static struct resource au1200_mmc0_resources[] = {
[0] = {
.start = SD0_PHYS_ADDR,
.end = SD0_PHYS_ADDR + 0x7ffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AU1200_SD_INT,
.end = AU1200_SD_INT,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = DSCR_CMD0_SDMS_TX0,
.end = DSCR_CMD0_SDMS_TX0,
.flags = IORESOURCE_DMA,
},
[3] = {
.start = DSCR_CMD0_SDMS_RX0,
.end = DSCR_CMD0_SDMS_RX0,
.flags = IORESOURCE_DMA,
}
};
static struct platform_device au1200_mmc0_device = {
.name = "au1xxx-mmc",
.id = 0,
.dev = {
.dma_mask = &au1xxx_mmc_dmamask,
.coherent_dma_mask = DMA_32BIT_MASK,
.dma_mask = &au1xxx_mmc_dmamask,
.coherent_dma_mask = DMA_32BIT_MASK,
.platform_data = &au1xmmc_platdata[0],
},
.num_resources = ARRAY_SIZE(au1xxx_mmc_resources),
.resource = au1xxx_mmc_resources,
.num_resources = ARRAY_SIZE(au1200_mmc0_resources),
.resource = au1200_mmc0_resources,
};
#ifndef CONFIG_MIPS_DB1200
static struct resource au1200_mmc1_resources[] = {
[0] = {
.start = SD1_PHYS_ADDR,
.end = SD1_PHYS_ADDR + 0x7ffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AU1200_SD_INT,
.end = AU1200_SD_INT,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = DSCR_CMD0_SDMS_TX1,
.end = DSCR_CMD0_SDMS_TX1,
.flags = IORESOURCE_DMA,
},
[3] = {
.start = DSCR_CMD0_SDMS_RX1,
.end = DSCR_CMD0_SDMS_RX1,
.flags = IORESOURCE_DMA,
}
};
static struct platform_device au1200_mmc1_device = {
.name = "au1xxx-mmc",
.id = 1,
.dev = {
.dma_mask = &au1xxx_mmc_dmamask,
.coherent_dma_mask = DMA_32BIT_MASK,
.platform_data = &au1xmmc_platdata[1],
},
.num_resources = ARRAY_SIZE(au1200_mmc1_resources),
.resource = au1200_mmc1_resources,
};
#endif /* #ifndef CONFIG_MIPS_DB1200 */
#endif /* #ifdef CONFIG_SOC_AU1200 */
static struct platform_device au1x00_pcmcia_device = {
......@@ -296,7 +343,10 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = {
&au1xxx_usb_gdt_device,
&au1xxx_usb_otg_device,
&au1200_lcd_device,
&au1xxx_mmc_device,
&au1200_mmc0_device,
#ifndef CONFIG_MIPS_DB1200
&au1200_mmc1_device,
#endif
#endif
#ifdef SMBUS_PSC_BASE
&pbdb_smbus_device,
......
arch/mips/alchemy/pb1200/platform.c
View file @ a1744d3b
......@@ -20,9 +20,90 @@
#include <linux/dma-mapping.h>
#include <linux/init.h>
#include <linux/leds.h>
#include <linux/platform_device.h>
#include <asm/mach-au1x00/au1xxx.h>
#include <asm/mach-au1x00/au1100_mmc.h>
static int mmc_activity;
static void pb1200mmc0_set_power(void *mmc_host, int state)
{
if (state)
bcsr->board |= BCSR_BOARD_SD0PWR;
else
bcsr->board &= ~BCSR_BOARD_SD0PWR;
au_sync_delay(1);
}
static int pb1200mmc0_card_readonly(void *mmc_host)
{
return (bcsr->status & BCSR_STATUS_SD0WP) ? 1 : 0;
}
static int pb1200mmc0_card_inserted(void *mmc_host)
{
return (bcsr->sig_status & BCSR_INT_SD0INSERT) ? 1 : 0;
}
static void pb1200_mmcled_set(struct led_classdev *led,
enum led_brightness brightness)
{
if (brightness != LED_OFF) {
if (++mmc_activity == 1)
bcsr->disk_leds &= ~(1 << 8);
} else {
if (--mmc_activity == 0)
bcsr->disk_leds |= (1 << 8);
}
}
static struct led_classdev pb1200mmc_led = {
.brightness_set = pb1200_mmcled_set,
};
#ifndef CONFIG_MIPS_DB1200
static void pb1200mmc1_set_power(void *mmc_host, int state)
{
if (state)
bcsr->board |= BCSR_BOARD_SD1PWR;
else
bcsr->board &= ~BCSR_BOARD_SD1PWR;
au_sync_delay(1);
}
static int pb1200mmc1_card_readonly(void *mmc_host)
{
return (bcsr->status & BCSR_STATUS_SD1WP) ? 1 : 0;
}
static int pb1200mmc1_card_inserted(void *mmc_host)
{
return (bcsr->sig_status & BCSR_INT_SD1INSERT) ? 1 : 0;
}
#endif
const struct au1xmmc_platform_data au1xmmc_platdata[2] = {
[0] = {
.set_power = pb1200mmc0_set_power,
.card_inserted = pb1200mmc0_card_inserted,
.card_readonly = pb1200mmc0_card_readonly,
.cd_setup = NULL, /* use poll-timer in driver */
.led = &pb1200mmc_led,
},
#ifndef CONFIG_MIPS_DB1200
[1] = {
.set_power = pb1200mmc1_set_power,
.card_inserted = pb1200mmc1_card_inserted,
.card_readonly = pb1200mmc1_card_readonly,
.cd_setup = NULL, /* use poll-timer in driver */
.led = &pb1200mmc_led,
},
#endif
};
static struct resource ide_resources[] = {
[0] = {
......
arch/mips/configs/ip22_defconfig
View file @ a1744d3b
......@@ -771,7 +771,6 @@ CONFIG_WATCHDOG=y
CONFIG_INDYDOG=m
# CONFIG_HW_RANDOM is not set
# CONFIG_RTC is not set
CONFIG_SGI_DS1286=m
# CONFIG_R3964 is not set
CONFIG_RAW_DRIVER=m
CONFIG_MAX_RAW_DEVS=256
......
arch/mips/configs/ip27_defconfig
View file @ a1744d3b
......@@ -701,7 +701,6 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_WATCHDOG is not set
CONFIG_HW_RANDOM=m
# CONFIG_RTC is not set
CONFIG_SGI_IP27_RTC=y
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_DRM is not set
......
arch/mips/configs/ip28_defconfig
View file @ a1744d3b
......@@ -70,7 +70,6 @@ CONFIG_CPU_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_IRQ_CPU=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_SGI_HAS_DS1286=y
CONFIG_SGI_HAS_INDYDOG=y
CONFIG_SGI_HAS_SEEQ=y
CONFIG_SGI_HAS_WD93=y
......@@ -585,7 +584,6 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_RTC is not set
CONFIG_SGI_DS1286=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
......
arch/mips/configs/pnx8335-stb225_defconfig 0 → 100644
View file @ a1744d3b
This diff is collapsed.
arch/mips/emma/Kconfig 0 → 100644
View file @ a1744d3b
choice
prompt "Machine type"
depends on MACH_EMMA
default NEC_MARKEINS
config NEC_MARKEINS
bool "NEC EMMA2RH Mark-eins board"
select SOC_EMMA2RH
select HW_HAS_PCI
help
This enables support for the NEC Electronics Mark-eins boards.
endchoice
config SOC_EMMA2RH
bool
select SOC_EMMA
select SYS_HAS_CPU_R5500
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
config SOC_EMMA
bool
select CEVT_R4K
select CSRC_R4K
select DMA_NONCOHERENT
select IRQ_CPU
select SWAP_IO_SPACE
select SYS_SUPPORTS_BIG_ENDIAN
arch/mips/emma2rh/common/Makefile → arch/mips/emma/common/Makefile
View file @ a1744d3b
......@@ -10,4 +10,4 @@
# (at your option) any later version.
#
obj-$(CONFIG_MARKEINS) += irq.o irq_emma2rh.o prom.o
obj-$(CONFIG_NEC_MARKEINS) += prom.o
arch/mips/emma2rh/common/prom.c → arch/mips/emma/common/prom.c
View file @ a1744d3b
......@@ -29,11 +29,11 @@
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
#include <asm/emma2rh/emma2rh.h>
#include <asm/emma/emma2rh.h>
const char *get_system_type(void)
{
#if defined(CONFIG_MARKEINS)
#ifdef CONFIG_NEC_MARKEINS
return "NEC EMMA2RH Mark-eins";
#else
#error Unknown NEC board
......@@ -60,7 +60,7 @@ void __init prom_init(void)
strcat(arcs_cmdline, " ");
}
#if defined(CONFIG_MARKEINS)
#ifdef CONFIG_NEC_MARKEINS
add_memory_region(0, EMMA2RH_RAM_SIZE, BOOT_MEM_RAM);
#else
#error Unknown NEC board
......
arch/mips/emma2rh/markeins/Makefile → arch/mips/emma/markeins/Makefile
View file @ a1744d3b
......@@ -10,4 +10,4 @@
# (at your option) any later version.
#
obj-$(CONFIG_MARKEINS) += irq.o irq_markeins.o setup.o led.o platform.o
obj-$(CONFIG_NEC_MARKEINS) += irq.o setup.o led.o platform.o
arch/mips/emma2rh/markeins/irq.c → arch/mips/emma/markeins/irq.c
View file @ a1744d3b
......@@ -32,31 +32,164 @@
#include <asm/irq_cpu.h>
#include <asm/system.h>
#include <asm/mipsregs.h>
#include <asm/debug.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
#include <asm/emma2rh/emma2rh.h>
#include <asm/emma/emma2rh.h>
/*
* IRQ mapping
*
* 0-7: 8 CPU interrupts
* 0 - software interrupt 0
* 1 - software interrupt 1
* 2 - most Vrc5477 interrupts are routed to this pin
* 3 - (optional) some other interrupts routed to this pin for debugg
* 4 - not used
* 5 - not used
* 6 - not used
* 7 - cpu timer (used by default)
*
*/
static void emma2rh_irq_enable(unsigned int irq)
{
u32 reg_value;
u32 reg_bitmask;
u32 reg_index;
irq -= EMMA2RH_IRQ_BASE;
reg_index = EMMA2RH_BHIF_INT_EN_0 +
(EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32);
reg_value = emma2rh_in32(reg_index);
reg_bitmask = 0x1 << (irq % 32);
emma2rh_out32(reg_index, reg_value | reg_bitmask);
}
static void emma2rh_irq_disable(unsigned int irq)
{
u32 reg_value;
u32 reg_bitmask;
u32 reg_index;
irq -= EMMA2RH_IRQ_BASE;
reg_index = EMMA2RH_BHIF_INT_EN_0 +
(EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32);
reg_value = emma2rh_in32(reg_index);
reg_bitmask = 0x1 << (irq % 32);
emma2rh_out32(reg_index, reg_value & ~reg_bitmask);
}
struct irq_chip emma2rh_irq_controller = {
.name = "emma2rh_irq",
.ack = emma2rh_irq_disable,
.mask = emma2rh_irq_disable,
.mask_ack = emma2rh_irq_disable,
.unmask = emma2rh_irq_enable,
};
void emma2rh_irq_init(void)
{
u32 i;
for (i = 0; i < NUM_EMMA2RH_IRQ; i++)
set_irq_chip_and_handler(EMMA2RH_IRQ_BASE + i,
&emma2rh_irq_controller,
handle_level_irq);
}
static void emma2rh_sw_irq_enable(unsigned int irq)
{
u32 reg;
irq -= EMMA2RH_SW_IRQ_BASE;
reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
reg |= 1 << irq;
emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
}
static void emma2rh_sw_irq_disable(unsigned int irq)
{
u32 reg;
irq -= EMMA2RH_SW_IRQ_BASE;
reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
reg &= ~(1 << irq);
emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
}
struct irq_chip emma2rh_sw_irq_controller = {
.name = "emma2rh_sw_irq",
.ack = emma2rh_sw_irq_disable,
.mask = emma2rh_sw_irq_disable,
.mask_ack = emma2rh_sw_irq_disable,
.unmask = emma2rh_sw_irq_enable,
};
void emma2rh_sw_irq_init(void)
{
u32 i;
for (i = 0; i < NUM_EMMA2RH_IRQ_SW; i++)
set_irq_chip_and_handler(EMMA2RH_SW_IRQ_BASE + i,
&emma2rh_sw_irq_controller,
handle_level_irq);
}
static void emma2rh_gpio_irq_enable(unsigned int irq)
{
u32 reg;
irq -= EMMA2RH_GPIO_IRQ_BASE;
reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
reg |= 1 << irq;
emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
}
static void emma2rh_gpio_irq_disable(unsigned int irq)
{
u32 reg;
irq -= EMMA2RH_GPIO_IRQ_BASE;
reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
reg &= ~(1 << irq);
emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
}
static void emma2rh_gpio_irq_ack(unsigned int irq)
{
u32 reg;
extern void emma2rh_sw_irq_init(u32 base);
extern void emma2rh_gpio_irq_init(u32 base);
extern void emma2rh_irq_init(u32 base);
extern void emma2rh_irq_dispatch(void);
irq -= EMMA2RH_GPIO_IRQ_BASE;
emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
reg &= ~(1 << irq);
emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
}
static void emma2rh_gpio_irq_end(unsigned int irq)
{
u32 reg;
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
irq -= EMMA2RH_GPIO_IRQ_BASE;
reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
reg |= 1 << irq;
emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
}
}
struct irq_chip emma2rh_gpio_irq_controller = {
.name = "emma2rh_gpio_irq",
.ack = emma2rh_gpio_irq_ack,
.mask = emma2rh_gpio_irq_disable,
.mask_ack = emma2rh_gpio_irq_ack,
.unmask = emma2rh_gpio_irq_enable,
.end = emma2rh_gpio_irq_end,
};
void emma2rh_gpio_irq_init(void)
{
u32 i;
for (i = 0; i < NUM_EMMA2RH_IRQ_GPIO; i++)
set_irq_chip(EMMA2RH_GPIO_IRQ_BASE + i,
&emma2rh_gpio_irq_controller);
}
static struct irqaction irq_cascade = {
.handler = no_action,
......@@ -67,12 +200,80 @@ static struct irqaction irq_cascade = {
.next = NULL,
};
/*
* the first level int-handler will jump here if it is a emma2rh irq
*/
void emma2rh_irq_dispatch(void)
{
u32 intStatus;
u32 bitmask;
u32 i;
intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0) &
emma2rh_in32(EMMA2RH_BHIF_INT_EN_0);
#ifdef EMMA2RH_SW_CASCADE
if (intStatus &
(1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
u32 swIntStatus;
swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT)
& emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
if (swIntStatus & bitmask) {
do_IRQ(EMMA2RH_SW_IRQ_BASE + i);
return;
}
}
}
#endif
for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
if (intStatus & bitmask) {
do_IRQ(EMMA2RH_IRQ_BASE + i);
return;
}
}
intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1) &
emma2rh_in32(EMMA2RH_BHIF_INT_EN_1);
#ifdef EMMA2RH_GPIO_CASCADE
if (intStatus &
(1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
u32 gpioIntStatus;
gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST)
& emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
if (gpioIntStatus & bitmask) {
do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i);
return;
}
}
}
#endif
for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) {
if (intStatus & bitmask) {
do_IRQ(EMMA2RH_IRQ_BASE + i);
return;
}
}
intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2) &
emma2rh_in32(EMMA2RH_BHIF_INT_EN_2);
for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) {
if (intStatus & bitmask) {
do_IRQ(EMMA2RH_IRQ_BASE + i);
return;
}
}
}
void __init arch_init_irq(void)
{
u32 reg;
db_run(printk("markeins_irq_setup invoked.\n"));
/* by default, interrupts are disabled. */
emma2rh_out32(EMMA2RH_BHIF_INT_EN_0, 0);
emma2rh_out32(EMMA2RH_BHIF_INT_EN_1, 0);
......@@ -102,9 +303,9 @@ void __init arch_init_irq(void)
emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~GPIO_PCI);
/* init all controllers */
emma2rh_irq_init(EMMA2RH_IRQ_BASE);
emma2rh_sw_irq_init(EMMA2RH_SW_IRQ_BASE);
emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE);
emma2rh_irq_init();
emma2rh_sw_irq_init();
emma2rh_gpio_irq_init();
mips_cpu_irq_init();
/* setup cascade interrupts */
......@@ -128,5 +329,3 @@ asmlinkage void plat_irq_dispatch(void)
else
spurious_interrupt();
}
arch/mips/emma2rh/markeins/led.c → arch/mips/emma/markeins/led.c
View file @ a1744d3b
......@@ -21,7 +21,7 @@
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/string.h>
#include <asm/emma2rh/emma2rh.h>
#include <asm/emma/emma2rh.h>
const unsigned long clear = 0x20202020;
......
arch/mips/emma2rh/markeins/platform.c → arch/mips/emma/markeins/platform.c
View file @ a1744d3b
......@@ -36,7 +36,7 @@
#include <asm/reboot.h>
#include <asm/traps.h>
#include <asm/emma2rh/emma2rh.h>
#include <asm/emma/emma2rh.h>
#define I2C_EMMA2RH "emma2rh-iic" /* must be in sync with IIC driver */
......
arch/mips/emma2rh/markeins/setup.c → arch/mips/emma/markeins/setup.c
View file @ a1744d3b
......@@ -29,7 +29,7 @@
#include <asm/time.h>
#include <asm/reboot.h>
#include <asm/emma2rh/emma2rh.h>
#include <asm/emma/emma2rh.h>
#define USE_CPU_COUNTER_TIMER /* whether we use cpu counter */
......
arch/mips/emma2rh/common/irq.c deleted 100644 → 0
View file @ 275f165f
/*
* arch/mips/emma2rh/common/irq.c
* This file is common irq dispatcher.
*
* Copyright (C) NEC Electronics Corporation 2005-2006
*
* This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c
*
* Copyright 2001 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/types.h>
#include <asm/system.h>
#include <asm/mipsregs.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
#include <asm/emma2rh/emma2rh.h>
/*
* the first level int-handler will jump here if it is a emma2rh irq
*/
void emma2rh_irq_dispatch(void)
{
u32 intStatus;
u32 bitmask;
u32 i;
intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0)
& emma2rh_in32(EMMA2RH_BHIF_INT_EN_0);
#ifdef EMMA2RH_SW_CASCADE
if (intStatus &
(1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
u32 swIntStatus;
swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT)
& emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
if (swIntStatus & bitmask) {
do_IRQ(EMMA2RH_SW_IRQ_BASE + i);
return;
}
}
}
#endif
for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
if (intStatus & bitmask) {
do_IRQ(EMMA2RH_IRQ_BASE + i);
return;
}
}
intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1)
& emma2rh_in32(EMMA2RH_BHIF_INT_EN_1);
#ifdef EMMA2RH_GPIO_CASCADE
if (intStatus &
(1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
u32 gpioIntStatus;
gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST)
& emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
if (gpioIntStatus & bitmask) {
do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i);
return;
}
}
}
#endif
for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) {
if (intStatus & bitmask) {
do_IRQ(EMMA2RH_IRQ_BASE + i);
return;
}
}
intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2)
& emma2rh_in32(EMMA2RH_BHIF_INT_EN_2);
for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) {
if (intStatus & bitmask) {
do_IRQ(EMMA2RH_IRQ_BASE + i);
return;
}
}
}
arch/mips/emma2rh/common/irq_emma2rh.c deleted 100644 → 0
View file @ 275f165f
/*
* arch/mips/emma2rh/common/irq_emma2rh.c
* This file defines the irq handler for EMMA2RH.
*
* Copyright (C) NEC Electronics Corporation 2005-2006
*
* This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c
*
* Copyright 2001 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
* EMMA2RH defines 64 IRQs.
*
* This file exports one function:
* emma2rh_irq_init(u32 irq_base);
*/
#include <linux/interrupt.h>
#include <linux/types.h>
#include <linux/ptrace.h>
#include <asm/debug.h>
#include <asm/emma2rh/emma2rh.h>
/* number of total irqs supported by EMMA2RH */
#define NUM_EMMA2RH_IRQ 96
static int emma2rh_irq_base = -1;
void ll_emma2rh_irq_enable(int);
void ll_emma2rh_irq_disable(int);
static void emma2rh_irq_enable(unsigned int irq)
{
ll_emma2rh_irq_enable(irq - emma2rh_irq_base);
}
static void emma2rh_irq_disable(unsigned int irq)
{
ll_emma2rh_irq_disable(irq - emma2rh_irq_base);
}
struct irq_chip emma2rh_irq_controller = {
.name = "emma2rh_irq",
.ack = emma2rh_irq_disable,
.mask = emma2rh_irq_disable,
.mask_ack = emma2rh_irq_disable,
.unmask = emma2rh_irq_enable,
};
void emma2rh_irq_init(u32 irq_base)
{
u32 i;
for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ; i++)
set_irq_chip_and_handler(i, &emma2rh_irq_controller,
handle_level_irq);
emma2rh_irq_base = irq_base;
}
void ll_emma2rh_irq_enable(int emma2rh_irq)
{
u32 reg_value;
u32 reg_bitmask;
u32 reg_index;
reg_index = EMMA2RH_BHIF_INT_EN_0
+ (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0)
* (emma2rh_irq / 32);
reg_value = emma2rh_in32(reg_index);
reg_bitmask = 0x1 << (emma2rh_irq % 32);
db_assert((reg_value & reg_bitmask) == 0);
emma2rh_out32(reg_index, reg_value | reg_bitmask);
}
void ll_emma2rh_irq_disable(int emma2rh_irq)
{
u32 reg_value;
u32 reg_bitmask;
u32 reg_index;
reg_index = EMMA2RH_BHIF_INT_EN_0
+ (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0)
* (emma2rh_irq / 32);
reg_value = emma2rh_in32(reg_index);
reg_bitmask = 0x1 << (emma2rh_irq % 32);
db_assert((reg_value & reg_bitmask) != 0);
emma2rh_out32(reg_index, reg_value & ~reg_bitmask);
}
arch/mips/emma2rh/markeins/irq_markeins.c deleted 100644 → 0
View file @ 275f165f
/*
* arch/mips/emma2rh/markeins/irq_markeins.c
* This file defines the irq handler for Mark-eins.
*
* Copyright (C) NEC Electronics Corporation 2004-2006
*
* This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c
*
* Copyright 2001 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/types.h>
#include <linux/ptrace.h>
#include <asm/debug.h>
#include <asm/emma2rh/emma2rh.h>
static int emma2rh_sw_irq_base = -1;
static int emma2rh_gpio_irq_base = -1;
void ll_emma2rh_sw_irq_enable(int reg);
void ll_emma2rh_sw_irq_disable(int reg);
void ll_emma2rh_gpio_irq_enable(int reg);
void ll_emma2rh_gpio_irq_disable(int reg);
static void emma2rh_sw_irq_enable(unsigned int irq)
{
ll_emma2rh_sw_irq_enable(irq - emma2rh_sw_irq_base);
}
static void emma2rh_sw_irq_disable(unsigned int irq)
{
ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base);
}
struct irq_chip emma2rh_sw_irq_controller = {
.name = "emma2rh_sw_irq",
.ack = emma2rh_sw_irq_disable,
.mask = emma2rh_sw_irq_disable,
.mask_ack = emma2rh_sw_irq_disable,
.unmask = emma2rh_sw_irq_enable,
};
void emma2rh_sw_irq_init(u32 irq_base)
{
u32 i;
for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_SW; i++)
set_irq_chip_and_handler(i, &emma2rh_sw_irq_controller,
handle_level_irq);
emma2rh_sw_irq_base = irq_base;
}
void ll_emma2rh_sw_irq_enable(int irq)
{
u32 reg;
db_assert(irq >= 0);
db_assert(irq < NUM_EMMA2RH_IRQ_SW);
reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
reg |= 1 << irq;
emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
}
void ll_emma2rh_sw_irq_disable(int irq)
{
u32 reg;
db_assert(irq >= 0);
db_assert(irq < 32);
reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
reg &= ~(1 << irq);
emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
}
static void emma2rh_gpio_irq_enable(unsigned int irq)
{
ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base);
}
static void emma2rh_gpio_irq_disable(unsigned int irq)
{
ll_emma2rh_gpio_irq_disable(irq - emma2rh_gpio_irq_base);
}
static void emma2rh_gpio_irq_ack(unsigned int irq)
{
irq -= emma2rh_gpio_irq_base;
emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
ll_emma2rh_gpio_irq_disable(irq);
}
static void emma2rh_gpio_irq_end(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base);
}
struct irq_chip emma2rh_gpio_irq_controller = {
.name = "emma2rh_gpio_irq",
.ack = emma2rh_gpio_irq_ack,
.mask = emma2rh_gpio_irq_disable,
.mask_ack = emma2rh_gpio_irq_ack,
.unmask = emma2rh_gpio_irq_enable,
.end = emma2rh_gpio_irq_end,
};
void emma2rh_gpio_irq_init(u32 irq_base)
{
u32 i;
for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_GPIO; i++)
set_irq_chip(i, &emma2rh_gpio_irq_controller);
emma2rh_gpio_irq_base = irq_base;
}
void ll_emma2rh_gpio_irq_enable(int irq)
{
u32 reg;
db_assert(irq >= 0);
db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);
reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
reg |= 1 << irq;
emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
}
void ll_emma2rh_gpio_irq_disable(int irq)
{
u32 reg;
db_assert(irq >= 0);
db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);
reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
reg &= ~(1 << irq);
emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
}
arch/mips/include/asm/bitops.h
View file @ a1744d3b
......@@ -558,39 +558,67 @@ static inline void __clear_bit_unlock(unsigned long nr, volatile unsigned long *
__clear_bit(nr, addr);
}
#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
/*
* Return the bit position (0..63) of the most significant 1 bit in a word
* Returns -1 if no 1 bit exists
*/
static inline unsigned long __fls(unsigned long x)
static inline unsigned long __fls(unsigned long word)
{
int lz;
int num;
if (sizeof(x) == 4) {
if (BITS_PER_LONG == 32 &&
__builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r) {
__asm__(
" .set push \n"
" .set mips32 \n"
" clz %0, %1 \n"
" .set pop \n"
: "=r" (lz)
: "r" (x));
: "=r" (num)
: "r" (word));
return 31 - lz;
return 31 - num;
}
BUG_ON(sizeof(x) != 8);
if (BITS_PER_LONG == 64 &&
__builtin_constant_p(cpu_has_mips64) && cpu_has_mips64) {
__asm__(
" .set push \n"
" .set mips64 \n"
" dclz %0, %1 \n"
" .set pop \n"
: "=r" (num)
: "r" (word));
__asm__(
" .set push \n"
" .set mips64 \n"
" dclz %0, %1 \n"
" .set pop \n"
: "=r" (lz)
: "r" (x));
return 63 - num;
}
num = BITS_PER_LONG - 1;
return 63 - lz;
#if BITS_PER_LONG == 64
if (!(word & (~0ul << 32))) {
num -= 32;
word <<= 32;
}
#endif
if (!(word & (~0ul << (BITS_PER_LONG-16)))) {
num -= 16;
word <<= 16;
}
if (!(word & (~0ul << (BITS_PER_LONG-8)))) {
num -= 8;
word <<= 8;
}
if (!(word & (~0ul << (BITS_PER_LONG-4)))) {
num -= 4;
word <<= 4;
}
if (!(word & (~0ul << (BITS_PER_LONG-2)))) {
num -= 2;
word <<= 2;
}
if (!(word & (~0ul << (BITS_PER_LONG-1))))
num -= 1;
return num;
}
/*
......@@ -612,23 +640,43 @@ static inline unsigned long __ffs(unsigned long word)
* This is defined the same way as ffs.
* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
*/
static inline int fls(int word)
static inline int fls(int x)
{
__asm__("clz %0, %1" : "=r" (word) : "r" (word));
int r;
return 32 - word;
}
if (__builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r) {
__asm__("clz %0, %1" : "=r" (x) : "r" (x));
#if defined(CONFIG_64BIT) && defined(CONFIG_CPU_MIPS64)
static inline int fls64(__u64 word)
{
__asm__("dclz %0, %1" : "=r" (word) : "r" (word));
return 32 - x;
}
return 64 - word;
r = 32;
if (!x)
return 0;
if (!(x & 0xffff0000u)) {
x <<= 16;
r -= 16;
}
if (!(x & 0xff000000u)) {
x <<= 8;
r -= 8;
}
if (!(x & 0xf0000000u)) {
x <<= 4;
r -= 4;
}
if (!(x & 0xc0000000u)) {
x <<= 2;
r -= 2;
}
if (!(x & 0x80000000u)) {
x <<= 1;
r -= 1;
}
return r;
}
#else
#include <asm-generic/bitops/fls64.h>
#endif
/*
* ffs - find first bit set.
......@@ -646,16 +694,6 @@ static inline int ffs(int word)
return fls(word & -word);
}
#else
#include <asm-generic/bitops/__ffs.h>
#include <asm-generic/bitops/__fls.h>
#include <asm-generic/bitops/ffs.h>
#include <asm-generic/bitops/fls.h>
#include <asm-generic/bitops/fls64.h>
#endif /*defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) */
#include <asm-generic/bitops/ffz.h>
#include <asm-generic/bitops/find.h>
......
arch/mips/include/asm/break.h
View file @ a1744d3b
......@@ -29,6 +29,7 @@
#define _BRK_THREADBP 11 /* For threads, user bp (used by debuggers) */
#define BRK_BUG 512 /* Used by BUG() */
#define BRK_KDB 513 /* Used in KDB_ENTER() */
#define BRK_MEMU 514 /* Used by FPU emulator */
#define BRK_MULOVF 1023 /* Multiply overflow */
#endif /* __ASM_BREAK_H */
arch/mips/include/asm/byteorder.h
View file @ a1744d3b
......@@ -11,11 +11,19 @@
#include <linux/compiler.h>
#include <asm/types.h>
#ifdef __GNUC__
#if defined(__MIPSEB__)
# define __BIG_ENDIAN
#elif defined(__MIPSEL__)
# define __LITTLE_ENDIAN
#else
# error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
#endif
#define __SWAB_64_THRU_32__
#ifdef CONFIG_CPU_MIPSR2
static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
{
__asm__(
" wsbh %0, %1 \n"
......@@ -24,9 +32,9 @@ static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
return x;
}
#define __arch__swab16(x) ___arch__swab16(x)
#define __arch_swab16 __arch_swab16
static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
{
__asm__(
" wsbh %0, %1 \n"
......@@ -36,11 +44,10 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
return x;
}
#define __arch__swab32(x) ___arch__swab32(x)
#define __arch_swab32 __arch_swab32
#ifdef CONFIG_CPU_MIPS64_R2
static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
{
__asm__(
" dsbh %0, %1 \n"
......@@ -51,26 +58,11 @@ static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
return x;
}
#define __arch__swab64(x) ___arch__swab64(x)
#define __arch_swab64 __arch_swab64
#endif /* CONFIG_CPU_MIPS64_R2 */
#endif /* CONFIG_CPU_MIPSR2 */
#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
# define __BYTEORDER_HAS_U64__
# define __SWAB_64_THRU_32__
#endif
#endif /* __GNUC__ */
#if defined(__MIPSEB__)
# include <linux/byteorder/big_endian.h>
#elif defined(__MIPSEL__)
# include <linux/byteorder/little_endian.h>
#else
# error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
#endif
#include <linux/byteorder.h>
#endif /* _ASM_BYTEORDER_H */
arch/mips/include/asm/cpu-features.h
View file @ a1744d3b
......@@ -141,6 +141,8 @@
#define cpu_has_mips64 (cpu_has_mips64r1 | cpu_has_mips64r2)
#define cpu_has_mips_r1 (cpu_has_mips32r1 | cpu_has_mips64r1)
#define cpu_has_mips_r2 (cpu_has_mips32r2 | cpu_has_mips64r2)
#define cpu_has_mips_r (cpu_has_mips32r1 | cpu_has_mips32r2 | \
cpu_has_mips64r1 | cpu_has_mips64r2)
#ifndef cpu_has_dsp
#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
......
arch/mips/include/asm/ds1286.h deleted 100644 → 0
View file @ 275f165f
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Machine dependent access functions for RTC registers.
*
* Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
*/
#ifndef _ASM_DS1286_H
#define _ASM_DS1286_H
#include <ds1286.h>
#endif /* _ASM_DS1286_H */
arch/mips/include/asm/emma2rh/emma2rh.h → arch/mips/include/asm/emma/emma2rh.h
View file @ a1744d3b
/*
* include/asm-mips/emma2rh/emma2rh.h
* arch/mips/include/asm/emma/emma2rh.h
* This file is EMMA2RH common header.
*
* Copyright (C) NEC Electronics Corporation 2005-2006
......@@ -21,8 +21,8 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_EMMA2RH_EMMA2RH_H
#define __ASM_EMMA2RH_EMMA2RH_H
#ifndef __ASM_EMMA_EMMA2RH_H
#define __ASM_EMMA_EMMA2RH_H
#include <irq.h>
......@@ -206,7 +206,6 @@ static inline void emma2rh_out32(u32 offset, u32 val)
static inline u32 emma2rh_in32(u32 offset)
{
u32 val = *(volatile u32 *)(EMMA2RH_BASE | offset);
emma2rh_sync();
return val;
}
......@@ -219,7 +218,6 @@ static inline void emma2rh_out16(u32 offset, u16 val)
static inline u16 emma2rh_in16(u32 offset)
{
u16 val = *(volatile u16 *)(EMMA2RH_BASE | offset);
emma2rh_sync();
return val;
}
......@@ -232,7 +230,6 @@ static inline void emma2rh_out8(u32 offset, u8 val)
static inline u8 emma2rh_in8(u32 offset)
{
u8 val = *(volatile u8 *)(EMMA2RH_BASE | offset);
emma2rh_sync();
return val;
}
......@@ -324,10 +321,10 @@ static inline u8 emma2rh_in8(u32 offset)
/*
* include the board dependent part
*/
#if defined(CONFIG_MARKEINS)
#include <asm/emma2rh/markeins.h>
#ifdef CONFIG_NEC_MARKEINS
#include <asm/emma/markeins.h>
#else
#error "Unknown EMMA2RH board!"
#endif
#endif /* __ASM_EMMA2RH_EMMA2RH_H */
#endif /* __ASM_EMMA_EMMA2RH_H */
arch/mips/include/asm/fpu_emulator.h
View file @ a1744d3b
......@@ -23,6 +23,9 @@
#ifndef _ASM_FPU_EMULATOR_H
#define _ASM_FPU_EMULATOR_H
#include <asm/break.h>
#include <asm/inst.h>
struct mips_fpu_emulator_stats {
unsigned int emulated;
unsigned int loads;
......@@ -34,4 +37,18 @@ struct mips_fpu_emulator_stats {
extern struct mips_fpu_emulator_stats fpuemustats;
extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir,
unsigned long cpc);
extern int do_dsemulret(struct pt_regs *xcp);
/*
* Instruction inserted following the badinst to further tag the sequence
*/
#define BD_COOKIE 0x0000bd36 /* tne $0, $0 with baggage */
/*
* Break instruction with special math emu break code set
*/
#define BREAK_MATH (0x0000000d | (BRK_MEMU << 16))
#endif /* _ASM_FPU_EMULATOR_H */
arch/mips/include/asm/m48t35.h deleted 100644 → 0
View file @ 275f165f
/*
* Registers for the SGS-Thomson M48T35 Timekeeper RAM chip
*/
#ifndef _ASM_M48T35_H
#define _ASM_M48T35_H
#include <linux/spinlock.h>
extern spinlock_t rtc_lock;
struct m48t35_rtc {
volatile u8 pad[0x7ff8]; /* starts at 0x7ff8 */
volatile u8 control;
volatile u8 sec;
volatile u8 min;
volatile u8 hour;
volatile u8 day;
volatile u8 date;
volatile u8 month;
volatile u8 year;
};
#define M48T35_RTC_SET 0x80
#define M48T35_RTC_STOPPED 0x80
#define M48T35_RTC_READ 0x40
#endif /* _ASM_M48T35_H */
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