Commit a19620ea authored by Sung Lee's avatar Sung Lee Committed by Alex Deucher

drm/amd/display: Program self refresh control register on boot

[WHY]
In headless boot cases, self refresh control registers are not
programmed on boot. In certain hybrid graphics cases this may cause
cstate entering to get blocked causing a hang.

[HOW]
Program self refresh control register on boot.
Signed-off-by: default avatarSung Lee <sung.lee@amd.com>
Reviewed-by: default avatarAnthony Koo <Anthony.Koo@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 201a9446
...@@ -1356,6 +1356,9 @@ void dcn10_init_hw(struct dc *dc) ...@@ -1356,6 +1356,9 @@ void dcn10_init_hw(struct dc *dc)
*/ */
if (dcb->funcs->is_accelerated_mode(dcb) || dc->config.power_down_display_on_boot) { if (dcb->funcs->is_accelerated_mode(dcb) || dc->config.power_down_display_on_boot) {
hws->funcs.init_pipes(dc, dc->current_state); hws->funcs.init_pipes(dc, dc->current_state);
if (dc->res_pool->hubbub->funcs->allow_self_refresh_control)
dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub,
!dc->res_pool->hubbub->ctx->dc->debug.disable_stutter);
} }
for (i = 0; i < res_pool->audio_count; i++) { for (i = 0; i < res_pool->audio_count; i++) {
......
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