Commit a348cd5f authored by Ben Skeggs's avatar Ben Skeggs

drm/nvd0/disp: hopefully fix selection of 6/8bpc mode on DP outputs

I have a very limited number of traces available for DP on NVD9+, but,
these values produce the same as the binary driver on a confirmed 18-bit
eDP panel and a confirmed 24-bit eDP panel (Retina MBP).

It's interesting that the bitfield values also match the MODE_CTRL values
that control the same thing on nv50:nvd9.
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 14f0458a
...@@ -1510,10 +1510,10 @@ nvd0_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode, ...@@ -1510,10 +1510,10 @@ nvd0_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode,
case OUTPUT_DP: case OUTPUT_DP:
if (nv_connector->base.display_info.bpc == 6) { if (nv_connector->base.display_info.bpc == 6) {
nv_encoder->dp.datarate = mode->clock * 18 / 8; nv_encoder->dp.datarate = mode->clock * 18 / 8;
syncs |= 0x00000140; syncs |= 0x00000002 << 6;
} else { } else {
nv_encoder->dp.datarate = mode->clock * 24 / 8; nv_encoder->dp.datarate = mode->clock * 24 / 8;
syncs |= 0x00000180; syncs |= 0x00000005 << 6;
} }
if (nv_encoder->dcb->sorconf.link & 1) if (nv_encoder->dcb->sorconf.link & 1)
......
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