Commit a4165904 authored by Biju Das's avatar Biju Das Committed by Simon Horman

arm64: dts: renesas: r8a774a1: Add RZ/G2M thermal support

Add thermal support for R8A774A1 (RZ/G2M) SoC.

Based on the work done for r8a7796 SoC.
Signed-off-by: default avatarBiju Das <biju.das@bp.renesas.com>
Reviewed-by: default avatarFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent c674e8a7
...@@ -290,6 +290,21 @@ sysc: system-controller@e6180000 { ...@@ -290,6 +290,21 @@ sysc: system-controller@e6180000 {
#power-domain-cells = <1>; #power-domain-cells = <1>;
}; };
tsc: thermal@e6198000 {
compatible = "renesas,r8a774a1-thermal";
reg = <0 0xe6198000 0 0x100>,
<0 0xe61a0000 0 0x100>,
<0 0xe61a8000 0 0x100>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 522>;
power-domains = <&sysc 32>;
resets = <&cpg 522>;
#thermal-sensor-cells = <1>;
status = "okay";
};
intc_ex: interrupt-controller@e61c0000 { intc_ex: interrupt-controller@e61c0000 {
compatible = "renesas,intc-ex-r8a774a1", "renesas,irqc"; compatible = "renesas,intc-ex-r8a774a1", "renesas,irqc";
#interrupt-cells = <2>; #interrupt-cells = <2>;
...@@ -840,6 +855,51 @@ prr: chipid@fff00044 { ...@@ -840,6 +855,51 @@ prr: chipid@fff00044 {
}; };
}; };
thermal-zones {
sensor_thermal1: sensor-thermal1 {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsc 0>;
trips {
sensor1_crit: sensor1-crit {
temperature = <120000>;
hysteresis = <1000>;
type = "critical";
};
};
};
sensor_thermal2: sensor-thermal2 {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsc 1>;
trips {
sensor2_crit: sensor2-crit {
temperature = <120000>;
hysteresis = <1000>;
type = "critical";
};
};
};
sensor_thermal3: sensor-thermal3 {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsc 2>;
trips {
sensor3_crit: sensor3-crit {
temperature = <120000>;
hysteresis = <1000>;
type = "critical";
};
};
};
};
timer { timer {
compatible = "arm,armv8-timer"; compatible = "arm,armv8-timer";
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
......
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