[SPARC]: Platform code changes for irqreturn_t.

arch/sparc/kernel/irq.c

@@ -74,8 +74,8 @@ static void irq_panic(void)
     prom_halt();
 }
 
-void (*sparc_init_timers)(void (*)(int, void *,struct pt_regs *)) =
-    (void (*)(void (*)(int, void *,struct pt_regs *))) irq_panic;
+void (*sparc_init_timers)(irqreturn_t (*)(int, void *,struct pt_regs *)) =
+    (void (*)(irqreturn_t (*)(int, void *,struct pt_regs *))) irq_panic;
 
 /*
  * Dave Redman (djhr@tadpole.co.uk)
@@ -461,7 +461,7 @@ void sparc_floppy_irq(int irq, void *dev_id, struct pt_regs *regs)
  * thus no sharing possible.
  */
 int request_fast_irq(unsigned int irq,
-		     void (*handler)(int, void *, struct pt_regs *),
+		     irqreturn_t (*handler)(int, void *, struct pt_regs *),
 		     unsigned long irqflags, const char *devname)
 {
 	struct irqaction *action;
@@ -549,7 +549,7 @@ int request_fast_irq(unsigned int irq,
 }
 
 int request_irq(unsigned int irq,
-		void (*handler)(int, void *, struct pt_regs *),
+		irqreturn_t (*handler)(int, void *, struct pt_regs *),
 		unsigned long irqflags, const char * devname, void *dev_id)
 {
 	struct irqaction * action, *tmp = NULL;
@@ -558,7 +558,7 @@ int request_irq(unsigned int irq,
 	
 	if (sparc_cpu_model == sun4d) {
 		extern int sun4d_request_irq(unsigned int, 
-					     void (*)(int, void *, struct pt_regs *),
+					     irqreturn_t (*)(int, void *, struct pt_regs *),
 					     unsigned long, const char *, void *);
 		return sun4d_request_irq(irq, handler, irqflags, devname, dev_id);
 	}

arch/sparc/kernel/pcic.c

@@ -736,12 +736,13 @@ static void pcic_clear_clock_irq(void)
 	pcic_timer_dummy = readl(pcic0.pcic_regs+PCI_SYS_LIMIT);
 }
 
-static void pcic_timer_handler (int irq, void *h, struct pt_regs *regs)
+static irqreturn_t pcic_timer_handler (int irq, void *h, struct pt_regs *regs)
 {
 	write_seqlock(&xtime_lock);	/* Dummy, to show that we remember */
 	pcic_clear_clock_irq();
 	do_timer(regs);
 	write_sequnlock(&xtime_lock);
+	return IRQ_HANDLED;
 }
 
 #define USECS_PER_JIFFY  10000  /* We have 100HZ "standard" timer for sparc */

arch/sparc/kernel/sun4c_irq.c

@@ -155,7 +155,7 @@ static void sun4c_load_profile_irq(int cpu, unsigned int limit)
 	/* Errm.. not sure how to do this.. */
 }
 
-static void __init sun4c_init_timers(void (*counter_fn)(int, void *, struct pt_regs *))
+static void __init sun4c_init_timers(irqreturn_t (*counter_fn)(int, void *, struct pt_regs *))
 {
 	int irq;
 

arch/sparc/kernel/sun4d_irq.c

@@ -262,7 +262,7 @@ unsigned int sun4d_sbint_to_irq(struct sbus_dev *sdev, unsigned int sbint)
 }
 
 int sun4d_request_irq(unsigned int irq,
-		void (*handler)(int, void *, struct pt_regs *),
+		irqreturn_t (*handler)(int, void *, struct pt_regs *),
 		unsigned long irqflags, const char * devname, void *dev_id)
 {
 	struct irqaction *action, *tmp = NULL, **actionp;
@@ -445,7 +445,7 @@ static void sun4d_load_profile_irq(int cpu, unsigned int limit)
 	bw_set_prof_limit(cpu, limit);
 }
 
-static void __init sun4d_init_timers(void (*counter_fn)(int, void *, struct pt_regs *))
+static void __init sun4d_init_timers(irqreturn_t (*counter_fn)(int, void *, struct pt_regs *))
 {
 	int irq;
 	extern struct prom_cpuinfo linux_cpus[NR_CPUS];

arch/sparc/kernel/sun4m_irq.c

@@ -235,7 +235,7 @@ char *sun4m_irq_itoa(unsigned int irq)
 	return buff;
 }
 
-static void __init sun4m_init_timers(void (*counter_fn)(int, void *, struct pt_regs *))
+static void __init sun4m_init_timers(irqreturn_t (*counter_fn)(int, void *, struct pt_regs *))
 {
 	int reg_count, irq, cpu;
 	struct linux_prom_registers cnt_regs[PROMREG_MAX];

arch/sparc/kernel/tick14.c

@@ -56,7 +56,7 @@ void install_obp_ticker(void)
 	linux_lvl14[3] =  obp_lvl14[3]; 
 }
 
-void claim_ticker14(void (*handler)(int, void *, struct pt_regs *),
+void claim_ticker14(irqreturn_t (*handler)(int, void *, struct pt_regs *),
 		    int irq_nr, unsigned int timeout )
 {
 	int cpu = smp_processor_id();

arch/sparc/kernel/time.c

@@ -120,7 +120,7 @@ __volatile__ unsigned int *master_l10_limit;
 
 #define TICK_SIZE (tick_nsec / 1000)
 
-void timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
+irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
 {
 	/* last time the cmos clock got updated */
 	static long last_rtc_update;
@@ -156,6 +156,8 @@ void timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
 	    last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
 	}
 	write_sequnlock(&xtime_lock);
+
+	return IRQ_HANDLED;
 }
 
 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */

arch/sparc64/kernel/ebus.c

@@ -73,7 +73,7 @@ static void __ebus_dma_reset(struct ebus_dma_info *p)
 	}
 }
 
-static void ebus_dma_irq(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t ebus_dma_irq(int irq, void *dev_id, struct pt_regs *regs)
 {
 	struct ebus_dma_info *p = dev_id;
 	unsigned long flags;
@@ -87,12 +87,16 @@ static void ebus_dma_irq(int irq, void *dev_id, struct pt_regs *regs)
 	if (csr & EBDMA_CSR_ERR_PEND) {
 		printk(KERN_CRIT "ebus_dma(%s): DMA error!\n", p->name);
 		p->callback(p, EBUS_DMA_EVENT_ERROR, p->client_cookie);
+		return IRQ_HANDLED;
 	} else if (csr & EBDMA_CSR_INT_PEND) {
 		p->callback(p,
 			    (csr & EBDMA_CSR_TC) ?
 			    EBUS_DMA_EVENT_DMA : EBUS_DMA_EVENT_DEVICE,
 			    p->client_cookie);
+		return IRQ_HANDLED;
 	}
+
+	return IRQ_NONE;
 }
 
 int ebus_dma_register(struct ebus_dma_info *p)

arch/sparc64/kernel/irq.c

@@ -294,7 +294,7 @@ static void atomic_bucket_insert(struct ino_bucket *bucket)
 	__asm__ __volatile__("wrpr %0, 0x0, %%pstate" : : "r" (pstate));
 }
 
-int request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *),
+int request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_regs *),
 		unsigned long irqflags, const char *name, void *dev_id)
 {
 	struct irqaction *action, *tmp = NULL;
@@ -831,7 +831,7 @@ void sparc_floppy_irq(int irq, void *dev_cookie, struct pt_regs *regs)
 #define SPARC_NOP (0x01000000)
 
 static void install_fast_irq(unsigned int cpu_irq,
-			     void (*handler)(int, void *, struct pt_regs *))
+			     irqreturn_t (*handler)(int, void *, struct pt_regs *))
 {
 	extern unsigned long sparc64_ttable_tl0;
 	unsigned long ttent = (unsigned long) &sparc64_ttable_tl0;
@@ -847,7 +847,7 @@ static void install_fast_irq(unsigned int cpu_irq,
 }
 
 int request_fast_irq(unsigned int irq,
-		     void (*handler)(int, void *, struct pt_regs *),
+		     irqreturn_t (*handler)(int, void *, struct pt_regs *),
 		     unsigned long irqflags, const char *name, void *dev_id)
 {
 	struct irqaction *action;

arch/sparc64/kernel/pci_psycho.c

@@ -713,7 +713,7 @@ static void psycho_check_iommu_error(struct pci_controller_info *p,
 #define  PSYCHO_UEAFSR_RESV2	0x00000000007fffff /* Reserved                     */
 #define PSYCHO_UE_AFAR	0x0038UL
 
-static void psycho_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t psycho_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
 {
 	struct pci_controller_info *p = dev_id;
 	unsigned long afsr_reg = p->controller_regs + PSYCHO_UE_AFSR;
@@ -730,7 +730,7 @@ static void psycho_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
 		(PSYCHO_UEAFSR_PPIO | PSYCHO_UEAFSR_PDRD | PSYCHO_UEAFSR_PDWR |
 		 PSYCHO_UEAFSR_SPIO | PSYCHO_UEAFSR_SDRD | PSYCHO_UEAFSR_SDWR);
 	if (!error_bits)
-		return;
+		return IRQ_NONE;
 	psycho_write(afsr_reg, error_bits);
 
 	/* Log the error. */
@@ -769,6 +769,8 @@ static void psycho_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
 
 	/* Interrogate IOMMU for error status. */
 	psycho_check_iommu_error(p, afsr, afar, UE_ERR);
+
+	return IRQ_HANDLED;
 }
 
 /* Correctable Errors. */
@@ -788,7 +790,7 @@ static void psycho_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
 #define  PSYCHO_CEAFSR_RESV2	0x00000000007fffff /* Reserved                     */
 #define PSYCHO_CE_AFAR	0x0040UL
 
-static void psycho_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t psycho_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
 {
 	struct pci_controller_info *p = dev_id;
 	unsigned long afsr_reg = p->controller_regs + PSYCHO_CE_AFSR;
@@ -805,7 +807,7 @@ static void psycho_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
 		(PSYCHO_CEAFSR_PPIO | PSYCHO_CEAFSR_PDRD | PSYCHO_CEAFSR_PDWR |
 		 PSYCHO_CEAFSR_SPIO | PSYCHO_CEAFSR_SDRD | PSYCHO_CEAFSR_SDWR);
 	if (!error_bits)
-		return;
+		return IRQ_NONE;
 	psycho_write(afsr_reg, error_bits);
 
 	/* Log the error. */
@@ -847,6 +849,8 @@ static void psycho_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
 	if (!reported)
 		printk("(none)");
 	printk("]\n");
+
+	return IRQ_HANDLED;
 }
 
 /* PCI Errors.  They are signalled by the PCI bus module since they
@@ -871,7 +875,7 @@ static void psycho_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
 #define PSYCHO_PCI_AFAR_A	0x2018UL
 #define PSYCHO_PCI_AFAR_B	0x4018UL
 
-static void psycho_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t psycho_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs)
 {
 	struct pci_pbm_info *pbm = dev_id;
 	struct pci_controller_info *p = pbm->parent;
@@ -899,7 +903,7 @@ static void psycho_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs)
 		 PSYCHO_PCIAFSR_SMA | PSYCHO_PCIAFSR_STA |
 		 PSYCHO_PCIAFSR_SRTRY | PSYCHO_PCIAFSR_SPERR);
 	if (!error_bits)
-		return;
+		return IRQ_NONE;
 	psycho_write(afsr_reg, error_bits);
 
 	/* Log the error. */
@@ -968,6 +972,8 @@ static void psycho_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs)
 
 	if (error_bits & (PSYCHO_PCIAFSR_PPERR | PSYCHO_PCIAFSR_SPERR))
 		pci_scan_for_parity_error(p, pbm, pbm->pci_bus);
+
+	return IRQ_HANDLED;
 }
 
 /* XXX What about PowerFail/PowerManagement??? -DaveM */

arch/sparc64/kernel/pci_sabre.c

@@ -744,7 +744,7 @@ static void sabre_check_iommu_error(struct pci_controller_info *p,
 	spin_unlock_irqrestore(&iommu->lock, flags);
 }
 
-static void sabre_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t sabre_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
 {
 	struct pci_controller_info *p = dev_id;
 	unsigned long afsr_reg = p->controller_regs + SABRE_UE_AFSR;
@@ -762,7 +762,7 @@ static void sabre_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
 		 SABRE_UEAFSR_SDRD | SABRE_UEAFSR_SDWR |
 		 SABRE_UEAFSR_SDTE | SABRE_UEAFSR_PDTE);
 	if (!error_bits)
-		return;
+		return IRQ_NONE;
 	sabre_write(afsr_reg, error_bits);
 
 	/* Log the error. */
@@ -800,9 +800,11 @@ static void sabre_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
 
 	/* Interrogate IOMMU for error status. */
 	sabre_check_iommu_error(p, afsr, afar);
+
+	return IRQ_HANDLED;
 }
 
-static void sabre_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t sabre_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
 {
 	struct pci_controller_info *p = dev_id;
 	unsigned long afsr_reg = p->controller_regs + SABRE_CE_AFSR;
@@ -819,7 +821,7 @@ static void sabre_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
 		(SABRE_CEAFSR_PDRD | SABRE_CEAFSR_PDWR |
 		 SABRE_CEAFSR_SDRD | SABRE_CEAFSR_SDWR);
 	if (!error_bits)
-		return;
+		return IRQ_NONE;
 	sabre_write(afsr_reg, error_bits);
 
 	/* Log the error. */
@@ -854,9 +856,11 @@ static void sabre_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
 	if (!reported)
 		printk("(none)");
 	printk("]\n");
+
+	return IRQ_HANDLED;
 }
 
-static void sabre_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t sabre_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs)
 {
 	struct pci_controller_info *p = dev_id;
 	unsigned long afsr_reg, afar_reg;
@@ -877,7 +881,7 @@ static void sabre_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs)
 		 SABRE_PIOAFSR_SMA | SABRE_PIOAFSR_STA |
 		 SABRE_PIOAFSR_SRTRY | SABRE_PIOAFSR_SPERR);
 	if (!error_bits)
-		return;
+		return IRQ_NONE;
 	sabre_write(afsr_reg, error_bits);
 
 	/* Log the error. */
@@ -947,6 +951,8 @@ static void sabre_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs)
 		pci_scan_for_parity_error(p, &p->pbm_A, p->pbm_A.pci_bus);
 		pci_scan_for_parity_error(p, &p->pbm_B, p->pbm_B.pci_bus);
 	}
+
+	return IRQ_HANDLED;
 }
 
 /* XXX What about PowerFail/PowerManagement??? -DaveM */

arch/sparc64/kernel/pci_schizo.c

@@ -672,7 +672,7 @@ static void schizo_check_iommu_error(struct pci_controller_info *p,
 #define SCHIZO_UEAFSR_MTAG	0x000000000000e000UL
 #define SCHIZO_UEAFSR_ECCSYND	0x00000000000001ffUL
 
-static void schizo_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t schizo_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
 {
 	struct pci_controller_info *p = dev_id;
 	unsigned long afsr_reg = p->controller_regs + SCHIZO_UE_AFSR;
@@ -697,7 +697,7 @@ static void schizo_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
 		(SCHIZO_UEAFSR_PPIO | SCHIZO_UEAFSR_PDRD | SCHIZO_UEAFSR_PDWR |
 		 SCHIZO_UEAFSR_SPIO | SCHIZO_UEAFSR_SDMA);
 	if (!error_bits)
-		return;
+		return IRQ_NONE;
 	schizo_write(afsr_reg, error_bits);
 
 	/* Log the error. */
@@ -740,6 +740,8 @@ static void schizo_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
 	schizo_check_iommu_error(p, UE_ERR);
 
 	schizo_clear_other_err_intr(irq);
+
+	return IRQ_HANDLED;
 }
 
 #define SCHIZO_CE_AFSR	0x10040UL
@@ -760,7 +762,7 @@ static void schizo_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
 #define SCHIZO_CEAFSR_MTAG	0x000000000000e000UL
 #define SCHIZO_CEAFSR_ECCSYND	0x00000000000001ffUL
 
-static void schizo_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t schizo_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
 {
 	struct pci_controller_info *p = dev_id;
 	unsigned long afsr_reg = p->controller_regs + SCHIZO_CE_AFSR;
@@ -785,7 +787,7 @@ static void schizo_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
 		(SCHIZO_CEAFSR_PPIO | SCHIZO_CEAFSR_PDRD | SCHIZO_CEAFSR_PDWR |
 		 SCHIZO_CEAFSR_SPIO | SCHIZO_CEAFSR_SDMA);
 	if (!error_bits)
-		return;
+		return IRQ_NONE;
 	schizo_write(afsr_reg, error_bits);
 
 	/* Log the error. */
@@ -829,6 +831,8 @@ static void schizo_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
 	printk("]\n");
 
 	schizo_clear_other_err_intr(irq);
+
+	return IRQ_HANDLED;
 }
 
 #define SCHIZO_PCI_AFSR	0x2010UL
@@ -852,7 +856,7 @@ static void schizo_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
 #define SCHIZO_PCIAFSR_MEM	0x0000000020000000UL
 #define SCHIZO_PCIAFSR_IO	0x0000000010000000UL
 
-static void schizo_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t schizo_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs)
 {
 	struct pci_pbm_info *pbm = dev_id;
 	struct pci_controller_info *p = pbm->parent;
@@ -886,7 +890,7 @@ static void schizo_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs)
 		 SCHIZO_PCIAFSR_SRTRY | SCHIZO_PCIAFSR_SPERR |
 		 SCHIZO_PCIAFSR_STTO | SCHIZO_PCIAFSR_SUNUS);
 	if (!error_bits)
-		return;
+		return IRQ_NONE;
 	schizo_write(afsr_reg, error_bits);
 
 	/* Log the error. */
@@ -974,6 +978,8 @@ static void schizo_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs)
 		pci_scan_for_parity_error(p, pbm, pbm->pci_bus);
 
 	schizo_clear_other_err_intr(irq);
+
+	return IRQ_HANDLED;
 }
 
 #define SCHIZO_SAFARI_ERRLOG	0x10018UL
@@ -1002,7 +1008,7 @@ static void schizo_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs)
 /* We only expect UNMAP errors here.  The rest of the Safari errors
  * are marked fatal and thus cause a system reset.
  */
-static void schizo_safarierr_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t schizo_safarierr_intr(int irq, void *dev_id, struct pt_regs *regs)
 {
 	struct pci_controller_info *p = dev_id;
 	u64 errlog;
@@ -1016,7 +1022,7 @@ static void schizo_safarierr_intr(int irq, void *dev_id, struct pt_regs *regs)
 		       p->index, errlog);
 
 		schizo_clear_other_err_intr(irq);
-		return;
+		return IRQ_HANDLED;
 	}
 
 	printk("SCHIZO%d: Safari interrupt, UNMAPPED error, interrogating IOMMUs.\n",
@@ -1024,6 +1030,7 @@ static void schizo_safarierr_intr(int irq, void *dev_id, struct pt_regs *regs)
 	schizo_check_iommu_error(p, SAFARI_ERR);
 
 	schizo_clear_other_err_intr(irq);
+	return IRQ_HANDLED;
 }
 
 /* Nearly identical to PSYCHO equivalents... */

arch/sparc64/kernel/power.c

@@ -26,12 +26,15 @@ static unsigned long power_reg = 0UL;
 static DECLARE_WAIT_QUEUE_HEAD(powerd_wait);
 static int button_pressed;
 
-static void power_handler(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t power_handler(int irq, void *dev_id, struct pt_regs *regs)
 {
 	if (button_pressed == 0) {
 		wake_up(&powerd_wait);
 		button_pressed = 1;
 	}
+
+	/* FIXME: Check registers for status... */
+	return IRQ_HANDLED;
 }
 #endif /* CONFIG_PCI */
 

arch/sparc64/kernel/sbus.c

@@ -813,7 +813,7 @@ unsigned int sbus_build_irq(void *buscookie, unsigned int ino)
 #define  SYSIO_UEAFSR_SIZE	0x00001c0000000000 /* Bad transfer size is 2**SIZE */
 #define  SYSIO_UEAFSR_MID	0x000003e000000000 /* UPA MID causing the fault    */
 #define  SYSIO_UEAFSR_RESV2	0x0000001fffffffff /* Reserved                     */
-static void sysio_ue_handler(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t sysio_ue_handler(int irq, void *dev_id, struct pt_regs *regs)
 {
 	struct sbus_bus *sbus = dev_id;
 	struct sbus_iommu *iommu = sbus->iommu;
@@ -867,6 +867,8 @@ static void sysio_ue_handler(int irq, void *dev_id, struct pt_regs *regs)
 	if (!reported)
 		printk("(none)");
 	printk("]\n");
+
+	return IRQ_HANDLED;
 }
 
 #define SYSIO_CE_AFSR	0x0040UL
@@ -883,7 +885,7 @@ static void sysio_ue_handler(int irq, void *dev_id, struct pt_regs *regs)
 #define  SYSIO_CEAFSR_SIZE	0x00001c0000000000 /* Bad transfer size is 2**SIZE */
 #define  SYSIO_CEAFSR_MID	0x000003e000000000 /* UPA MID causing the fault    */
 #define  SYSIO_CEAFSR_RESV2	0x0000001fffffffff /* Reserved                     */
-static void sysio_ce_handler(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t sysio_ce_handler(int irq, void *dev_id, struct pt_regs *regs)
 {
 	struct sbus_bus *sbus = dev_id;
 	struct sbus_iommu *iommu = sbus->iommu;
@@ -942,6 +944,8 @@ static void sysio_ce_handler(int irq, void *dev_id, struct pt_regs *regs)
 	if (!reported)
 		printk("(none)");
 	printk("]\n");
+
+	return IRQ_HANDLED;
 }
 
 #define SYSIO_SBUS_AFSR		0x2010UL
@@ -958,7 +962,7 @@ static void sysio_ce_handler(int irq, void *dev_id, struct pt_regs *regs)
 #define  SYSIO_SBAFSR_SIZE	0x00001c0000000000 /* Size of transfer             */
 #define  SYSIO_SBAFSR_MID	0x000003e000000000 /* MID causing the error        */
 #define  SYSIO_SBAFSR_RESV3	0x0000001fffffffff /* Reserved                     */
-static void sysio_sbus_error_handler(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t sysio_sbus_error_handler(int irq, void *dev_id, struct pt_regs *regs)
 {
 	struct sbus_bus *sbus = dev_id;
 	struct sbus_iommu *iommu = sbus->iommu;
@@ -1013,6 +1017,8 @@ static void sysio_sbus_error_handler(int irq, void *dev_id, struct pt_regs *regs
 	printk("]\n");
 
 	/* XXX check iommu/strbuf for further error status XXX */
+
+	return IRQ_HANDLED;
 }
 
 #define ECC_CONTROL	0x0020UL

arch/sparc64/kernel/time.c

@@ -477,7 +477,7 @@ void sparc64_do_profile(struct pt_regs *regs)
 	}
 }
 
-static void timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
+static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
 {
 	unsigned long ticks, pstate;
 
@@ -509,6 +509,8 @@ static void timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
 	timer_check_rtc();
 
 	write_sequnlock(&xtime_lock);
+
+	return IRQ_HANDLED;
 }
 
 #ifdef CONFIG_SMP
@@ -925,7 +927,7 @@ void __init clock_probe(void)
 }
 
 /* This is gets the master TICK_INT timer going. */
-static unsigned long sparc64_init_timers(void (*cfunc)(int, void *, struct pt_regs *))
+static unsigned long sparc64_init_timers(irqreturn_t (*cfunc)(int, void *, struct pt_regs *))
 {
 	unsigned long pstate, clock;
 	int node, err;

include/asm-sparc/irq.h

@@ -10,6 +10,7 @@
 #include <linux/config.h>
 #include <linux/linkage.h>
 #include <linux/threads.h>     /* For NR_CPUS */
+#include <linux/interrupt.h>
 
 #include <asm/system.h>     /* For SUN4M_NCPUS */
 #include <asm/btfixup.h>
@@ -47,8 +48,8 @@ BTFIXUPDEF_CALL(void, load_profile_irq, int, unsigned int)
 #define clear_profile_irq(cpu) BTFIXUP_CALL(clear_profile_irq)(cpu)
 #define load_profile_irq(cpu,limit) BTFIXUP_CALL(load_profile_irq)(cpu,limit)
 
-extern void (*sparc_init_timers)(void (*lvl10_irq)(int, void *, struct pt_regs *));
-extern void claim_ticker14(void (*irq_handler)(int, void *, struct pt_regs *),
+extern void (*sparc_init_timers)(irqreturn_t (*lvl10_irq)(int, void *, struct pt_regs *));
+extern void claim_ticker14(irqreturn_t (*irq_handler)(int, void *, struct pt_regs *),
 			   int irq,
 			   unsigned int timeout);
 
@@ -62,7 +63,7 @@ BTFIXUPDEF_CALL(void, set_irq_udt, int)
 #define set_irq_udt(cpu) BTFIXUP_CALL(set_irq_udt)(cpu)
 #endif
 
-extern int request_fast_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *), unsigned long flags, __const__ char *devname);
+extern int request_fast_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_regs *), unsigned long flags, __const__ char *devname);
 
 /* On the sun4m, just like the timers, we have both per-cpu and master
  * interrupt registers.

include/asm-sparc64/irq.h

@@ -12,6 +12,7 @@
 #include <linux/linkage.h>
 #include <linux/kernel.h>
 #include <linux/errno.h>
+#include <linux/interrupt.h>
 #include <asm/pil.h>
 #include <asm/ptrace.h>
 
@@ -128,7 +129,7 @@ extern void set_irq_udt(int);
 #endif
 
 extern int request_fast_irq(unsigned int irq,
-			    void (*handler)(int, void *, struct pt_regs *),
+			    irqreturn_t (*handler)(int, void *, struct pt_regs *),
 			    unsigned long flags, __const__ char *devname,
 			    void *dev_id);
 

include/asm-sparc64/timer.h

@@ -7,6 +7,8 @@
 #ifndef _SPARC64_TIMER_H
 #define _SPARC64_TIMER_H
 
+#include <linux/types.h>
+
 /* How timers work:
  *
  * On uniprocessors we just use counter zero for the system wide
@@ -63,6 +65,7 @@ extern struct sparc64_tick_ops *tick_ops;
 
 #ifdef CONFIG_SMP
 extern unsigned long timer_tick_offset;
+struct pt_regs;
 extern void timer_tick_interrupt(struct pt_regs *);
 #endif