Commit a8d3b59c authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Tony Lindgren

ARM: dts: dra72-evm: Audio support

The board uses tlv320aic3106 codec connected to McASP3. The master clock
for the codec and McASP3 is coming from ATL2.
McASP3 is the master on the I2S bus.
Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 6ddd5fce
...@@ -9,6 +9,7 @@ ...@@ -9,6 +9,7 @@
#include "dra72x.dtsi" #include "dra72x.dtsi"
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clk/ti-dra7-atl.h>
/ { / {
model = "TI DRA722"; model = "TI DRA722";
...@@ -102,6 +103,40 @@ tpd12s015_out: endpoint { ...@@ -102,6 +103,40 @@ tpd12s015_out: endpoint {
}; };
}; };
}; };
sound0: sound@0 {
compatible = "simple-audio-card";
simple-audio-card,name = "DRA7xx-EVM";
simple-audio-card,widgets =
"Headphone", "Headphone Jack",
"Line", "Line Out",
"Microphone", "Mic Jack",
"Line", "Line In";
simple-audio-card,routing =
"Headphone Jack", "HPLOUT",
"Headphone Jack", "HPROUT",
"Line Out", "LLOUT",
"Line Out", "RLOUT",
"MIC3L", "Mic Jack",
"MIC3R", "Mic Jack",
"Mic Jack", "Mic Bias",
"LINE1L", "Line In",
"LINE1R", "Line In";
simple-audio-card,format = "dsp_b";
simple-audio-card,bitclock-master = <&sound0_master>;
simple-audio-card,frame-master = <&sound0_master>;
simple-audio-card,bitclock-inversion;
sound0_master: simple-audio-card,cpu {
sound-dai = <&mcasp3>;
system-clock-frequency = <5644800>;
};
simple-audio-card,codec {
sound-dai = <&tlv320aic3106>;
clocks = <&atl_clkin2_ck>;
};
};
}; };
&dra7_pmx_core { &dra7_pmx_core {
...@@ -236,6 +271,31 @@ tpd12s015_pins: pinmux_tpd12s015_pins { ...@@ -236,6 +271,31 @@ tpd12s015_pins: pinmux_tpd12s015_pins {
0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */ 0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
>; >;
}; };
atl_pins: pinmux_atl_pins {
pinctrl-single,pins = <
0x298 (PIN_OUTPUT | MUX_MODE5) /* xref_clk1.atl_clk1 */
0x29c (PIN_OUTPUT | MUX_MODE5) /* xref_clk2.atl_clk2 */
>;
};
mcasp3_pins: pinmux_mcasp3_pins {
pinctrl-single,pins = <
0x324 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx */
0x328 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx */
0x32c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0 */
0x330 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1 */
>;
};
mcasp3_sleep_pins: pinmux_mcasp3_sleep_pins {
pinctrl-single,pins = <
0x324 (PIN_INPUT_PULLDOWN | MUX_MODE15)
0x328 (PIN_INPUT_PULLDOWN | MUX_MODE15)
0x32c (PIN_INPUT_PULLDOWN | MUX_MODE15)
0x330 (PIN_INPUT_PULLDOWN | MUX_MODE15)
>;
};
}; };
&i2c1 { &i2c1 {
...@@ -376,6 +436,21 @@ cpsw_sel_s0 { ...@@ -376,6 +436,21 @@ cpsw_sel_s0 {
output-low; output-low;
}; };
}; };
tlv320aic3106: tlv320aic3106@19 {
#sound-dai-cells = <0>;
compatible = "ti,tlv320aic3106";
reg = <0x19>;
adc-settle-ms = <40>;
ai3x-micbias-vg = <1>; /* 2.0V */
status = "okay";
/* Regulators */
AVDD-supply = <&evm_3v3>;
IOVDD-supply = <&evm_3v3>;
DRVDD-supply = <&evm_3v3>;
DVDD-supply = <&aic_dvdd>;
};
}; };
&i2c5 { &i2c5 {
...@@ -719,3 +794,42 @@ hdmi_out: endpoint { ...@@ -719,3 +794,42 @@ hdmi_out: endpoint {
}; };
}; };
}; };
&atl {
pinctrl-names = "default";
pinctrl-0 = <&atl_pins>;
assigned-clocks = <&abe_dpll_sys_clk_mux>,
<&atl_gfclk_mux>,
<&dpll_abe_ck>,
<&dpll_abe_m2x2_ck>,
<&atl_clkin2_ck>;
assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>;
assigned-clock-rates = <0>, <0>, <180633600>, <361267200>, <5644800>;
status = "okay";
atl2 {
bws = <DRA7_ATL_WS_MCASP2_FSX>;
aws = <DRA7_ATL_WS_MCASP3_FSX>;
};
};
&mcasp3 {
#sound-dai-cells = <0>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mcasp3_pins>;
pinctrl-1 = <&mcasp3_sleep_pins>;
assigned-clocks = <&mcasp3_ahclkx_mux>;
assigned-clock-parents = <&atl_clkin2_ck>;
status = "okay";
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
/* 4 serializer */
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
1 2 0 0
>;
};
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