Commit aa026ede authored by Andi Kleen's avatar Andi Kleen Committed by Andi Kleen

[PATCH] x86-64: Fix C3 timer test

There was a typo in the C3 latency test to decide of the TSC
should be used or not. It used the C2 latency threshold, not the
C3 one. Fix that.

This should fix the time on various dual core laptops.
Signed-off-by: default avatarAndi Kleen <ak@suse.de>
parent cb7fabcf
...@@ -948,7 +948,7 @@ __cpuinit int unsynchronized_tsc(void) ...@@ -948,7 +948,7 @@ __cpuinit int unsynchronized_tsc(void)
if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) { if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
#ifdef CONFIG_ACPI #ifdef CONFIG_ACPI
/* But TSC doesn't tick in C3 so don't use it there */ /* But TSC doesn't tick in C3 so don't use it there */
if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 100) if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 1000)
return 1; return 1;
#endif #endif
return 0; return 0;
......
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