Commit ada09172 authored by Mike Frysinger's avatar Mike Frysinger

Blackfin: add EVT_OVERRIDE/IPRIO core MMR helpers

These were partially defined, so fill out the def/cdef pieces properly.
Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
parent f5074429
......@@ -216,12 +216,16 @@
#define bfin_write_EVT14(val) bfin_write32(EVT14,val)
#define bfin_read_EVT15() bfin_read32(EVT15)
#define bfin_write_EVT15(val) bfin_write32(EVT15,val)
#define bfin_read_EVT_OVERRIDE() bfin_read32(EVT_OVERRIDE)
#define bfin_write_EVT_OVERRIDE(val) bfin_write32(EVT_OVERRIDE,val)
#define bfin_read_IMASK() bfin_read32(IMASK)
#define bfin_write_IMASK(val) bfin_write32(IMASK,val)
#define bfin_read_IPEND() bfin_read32(IPEND)
#define bfin_write_IPEND(val) bfin_write32(IPEND,val)
#define bfin_read_ILAT() bfin_read32(ILAT)
#define bfin_write_ILAT(val) bfin_write32(ILAT,val)
#define bfin_read_IPRIO() bfin_read32(IPRIO)
#define bfin_write_IPRIO(val) bfin_write32(IPRIO,val)
/*Core Timer Registers*/
#define bfin_read_TCNTL() bfin_read32(TCNTL)
......@@ -299,8 +303,4 @@
#define bfin_read_PFCNTR1() bfin_read32(PFCNTR1)
#define bfin_write_PFCNTR1(val) bfin_write32(PFCNTR1,val)
/*
#define IPRIO 0xFFE02110
*/
#endif /* _CDEF_LPBLACKFIN_H */
......@@ -394,6 +394,7 @@
#define EVT13 0xFFE02034 /* Event Vector 13 ESR Address */
#define EVT14 0xFFE02038 /* Event Vector 14 ESR Address */
#define EVT15 0xFFE0203C /* Event Vector 15 ESR Address */
#define EVT_OVERRIDE 0xFFE02100 /* Event Vector Override Register */
#define IMASK 0xFFE02104 /* Interrupt Mask Register */
#define IPEND 0xFFE02108 /* Interrupt Pending Register */
#define ILAT 0xFFE0210C /* Interrupt Latch Register */
......
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