Commit afba7f91 authored by Thomas Abraham's avatar Thomas Abraham Committed by Kukjin Kim

ARM: SAMSUNG: remove struct 's3c24xx_uart_clksrc' and all uses of it

With clkdev based clock lookup added to samsung serial driver, the use
of 'struct s3c24xx_uart_clksrc' to supply clock names in platform
data is removed from all the Samsung platform code.

Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Ramax Lo <ramaxlo@gmail.com>
Cc: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: default avatarThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 5f5a7a55
...@@ -14,15 +14,6 @@ ...@@ -14,15 +14,6 @@
#include <plat/devs.h> #include <plat/devs.h>
#include <plat/regs-serial.h> #include <plat/regs-serial.h>
static struct s3c24xx_uart_clksrc exynos4_serial_clocks[] = {
[0] = {
.name = "uclk1",
.divisor = 1,
.min_baud = 0,
.max_baud = 0,
},
};
/* uart registration process */ /* uart registration process */
void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
{ {
...@@ -30,11 +21,7 @@ void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) ...@@ -30,11 +21,7 @@ void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
u32 ucnt; u32 ucnt;
for (ucnt = 0; ucnt < no; ucnt++, tcfg++) { for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
if (!tcfg->clocks) { tcfg->has_fracval = 1;
tcfg->has_fracval = 1;
tcfg->clocks = exynos4_serial_clocks;
tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks);
}
tcfg->flags |= NO_NEED_CHECK_CLKSRC; tcfg->flags |= NO_NEED_CHECK_CLKSRC;
} }
......
...@@ -164,22 +164,6 @@ static struct map_desc bast_iodesc[] __initdata = { ...@@ -164,22 +164,6 @@ static struct map_desc bast_iodesc[] __initdata = {
#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
static struct s3c24xx_uart_clksrc bast_serial_clocks[] = {
[0] = {
.name = "uclk",
.divisor = 1,
.min_baud = 0,
.max_baud = 0,
},
[1] = {
.name = "pclk",
.divisor = 1,
.min_baud = 0,
.max_baud = 0,
}
};
static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
[0] = { [0] = {
.hwport = 0, .hwport = 0,
...@@ -187,8 +171,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { ...@@ -187,8 +171,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
.ucon = UCON, .ucon = UCON,
.ulcon = ULCON, .ulcon = ULCON,
.ufcon = UFCON, .ufcon = UFCON,
.clocks = bast_serial_clocks,
.clocks_size = ARRAY_SIZE(bast_serial_clocks),
}, },
[1] = { [1] = {
.hwport = 1, .hwport = 1,
...@@ -196,8 +178,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { ...@@ -196,8 +178,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
.ucon = UCON, .ucon = UCON,
.ulcon = ULCON, .ulcon = ULCON,
.ufcon = UFCON, .ufcon = UFCON,
.clocks = bast_serial_clocks,
.clocks_size = ARRAY_SIZE(bast_serial_clocks),
}, },
/* port 2 is not actually used */ /* port 2 is not actually used */
[2] = { [2] = {
...@@ -206,8 +186,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { ...@@ -206,8 +186,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
.ucon = UCON, .ucon = UCON,
.ulcon = ULCON, .ulcon = ULCON,
.ufcon = UFCON, .ufcon = UFCON,
.clocks = bast_serial_clocks,
.clocks_size = ARRAY_SIZE(bast_serial_clocks),
} }
}; };
......
...@@ -109,23 +109,6 @@ static struct map_desc vr1000_iodesc[] __initdata = { ...@@ -109,23 +109,6 @@ static struct map_desc vr1000_iodesc[] __initdata = {
#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
/* uart clock source(s) */
static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
[0] = {
.name = "uclk",
.divisor = 1,
.min_baud = 0,
.max_baud = 0,
},
[1] = {
.name = "pclk",
.divisor = 1,
.min_baud = 0,
.max_baud = 0.
}
};
static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
[0] = { [0] = {
.hwport = 0, .hwport = 0,
...@@ -133,8 +116,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { ...@@ -133,8 +116,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
.ucon = UCON, .ucon = UCON,
.ulcon = ULCON, .ulcon = ULCON,
.ufcon = UFCON, .ufcon = UFCON,
.clocks = vr1000_serial_clocks,
.clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
}, },
[1] = { [1] = {
.hwport = 1, .hwport = 1,
...@@ -142,8 +123,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { ...@@ -142,8 +123,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
.ucon = UCON, .ucon = UCON,
.ulcon = ULCON, .ulcon = ULCON,
.ufcon = UFCON, .ufcon = UFCON,
.clocks = vr1000_serial_clocks,
.clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
}, },
/* port 2 is not actually used */ /* port 2 is not actually used */
[2] = { [2] = {
...@@ -152,9 +131,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { ...@@ -152,9 +131,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
.ucon = UCON, .ucon = UCON,
.ulcon = ULCON, .ulcon = ULCON,
.ufcon = UFCON, .ufcon = UFCON,
.clocks = vr1000_serial_clocks,
.clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
} }
}; };
......
...@@ -96,22 +96,6 @@ static struct map_desc anubis_iodesc[] __initdata = { ...@@ -96,22 +96,6 @@ static struct map_desc anubis_iodesc[] __initdata = {
#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
static struct s3c24xx_uart_clksrc anubis_serial_clocks[] = {
[0] = {
.name = "uclk",
.divisor = 1,
.min_baud = 0,
.max_baud = 0,
},
[1] = {
.name = "pclk",
.divisor = 1,
.min_baud = 0,
.max_baud = 0,
}
};
static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = { static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
[0] = { [0] = {
.hwport = 0, .hwport = 0,
...@@ -119,8 +103,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = { ...@@ -119,8 +103,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
.ucon = UCON, .ucon = UCON,
.ulcon = ULCON, .ulcon = ULCON,
.ufcon = UFCON, .ufcon = UFCON,
.clocks = anubis_serial_clocks, .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
.clocks_size = ARRAY_SIZE(anubis_serial_clocks),
}, },
[1] = { [1] = {
.hwport = 2, .hwport = 2,
...@@ -128,8 +111,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = { ...@@ -128,8 +111,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
.ucon = UCON, .ucon = UCON,
.ulcon = ULCON, .ulcon = ULCON,
.ufcon = UFCON, .ufcon = UFCON,
.clocks = anubis_serial_clocks, .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
.clocks_size = ARRAY_SIZE(anubis_serial_clocks),
}, },
}; };
......
...@@ -57,22 +57,6 @@ static struct map_desc at2440evb_iodesc[] __initdata = { ...@@ -57,22 +57,6 @@ static struct map_desc at2440evb_iodesc[] __initdata = {
#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
static struct s3c24xx_uart_clksrc at2440evb_serial_clocks[] = {
[0] = {
.name = "uclk",
.divisor = 1,
.min_baud = 0,
.max_baud = 0,
},
[1] = {
.name = "pclk",
.divisor = 1,
.min_baud = 0,
.max_baud = 0,
}
};
static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = { static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
[0] = { [0] = {
.hwport = 0, .hwport = 0,
...@@ -80,8 +64,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = { ...@@ -80,8 +64,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
.ucon = UCON, .ucon = UCON,
.ulcon = ULCON, .ulcon = ULCON,
.ufcon = UFCON, .ufcon = UFCON,
.clocks = at2440evb_serial_clocks, .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
.clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
}, },
[1] = { [1] = {
.hwport = 1, .hwport = 1,
...@@ -89,8 +72,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = { ...@@ -89,8 +72,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
.ucon = UCON, .ucon = UCON,
.ulcon = ULCON, .ulcon = ULCON,
.ufcon = UFCON, .ufcon = UFCON,
.clocks = at2440evb_serial_clocks, .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
.clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
}, },
}; };
......
...@@ -100,21 +100,6 @@ static struct map_desc osiris_iodesc[] __initdata = { ...@@ -100,21 +100,6 @@ static struct map_desc osiris_iodesc[] __initdata = {
#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
static struct s3c24xx_uart_clksrc osiris_serial_clocks[] = {
[0] = {
.name = "uclk",
.divisor = 1,
.min_baud = 0,
.max_baud = 0,
},
[1] = {
.name = "pclk",
.divisor = 1,
.min_baud = 0,
.max_baud = 0,
}
};
static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
[0] = { [0] = {
.hwport = 0, .hwport = 0,
...@@ -122,8 +107,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { ...@@ -122,8 +107,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
.ucon = UCON, .ucon = UCON,
.ulcon = ULCON, .ulcon = ULCON,
.ufcon = UFCON, .ufcon = UFCON,
.clocks = osiris_serial_clocks, .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
.clocks_size = ARRAY_SIZE(osiris_serial_clocks),
}, },
[1] = { [1] = {
.hwport = 1, .hwport = 1,
...@@ -131,8 +115,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { ...@@ -131,8 +115,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
.ucon = UCON, .ucon = UCON,
.ulcon = ULCON, .ulcon = ULCON,
.ufcon = UFCON, .ufcon = UFCON,
.clocks = osiris_serial_clocks, .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
.clocks_size = ARRAY_SIZE(osiris_serial_clocks),
}, },
[2] = { [2] = {
.hwport = 2, .hwport = 2,
...@@ -140,8 +123,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { ...@@ -140,8 +123,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
.ucon = UCON, .ucon = UCON,
.ulcon = ULCON, .ulcon = ULCON,
.ufcon = UFCON, .ufcon = UFCON,
.clocks = osiris_serial_clocks, .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
.clocks_size = ARRAY_SIZE(osiris_serial_clocks),
} }
}; };
......
...@@ -68,15 +68,6 @@ ...@@ -68,15 +68,6 @@
static struct map_desc rx1950_iodesc[] __initdata = { static struct map_desc rx1950_iodesc[] __initdata = {
}; };
static struct s3c24xx_uart_clksrc rx1950_serial_clocks[] = {
[0] = {
.name = "fclk_n",
.divisor = 1,
.min_baud = 0,
.max_baud = 0,
},
};
static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = { static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
[0] = { [0] = {
.hwport = 0, .hwport = 0,
...@@ -84,8 +75,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = { ...@@ -84,8 +75,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
.ucon = 0x3c5, .ucon = 0x3c5,
.ulcon = 0x03, .ulcon = 0x03,
.ufcon = 0x51, .ufcon = 0x51,
.clocks = rx1950_serial_clocks, .clk_sel = S3C2410_UCON_CLKSEL3,
.clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
}, },
[1] = { [1] = {
.hwport = 1, .hwport = 1,
...@@ -93,8 +83,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = { ...@@ -93,8 +83,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
.ucon = 0x3c5, .ucon = 0x3c5,
.ulcon = 0x03, .ulcon = 0x03,
.ufcon = 0x51, .ufcon = 0x51,
.clocks = rx1950_serial_clocks, .clk_sel = S3C2410_UCON_CLKSEL3,
.clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
}, },
/* IR port */ /* IR port */
[2] = { [2] = {
...@@ -103,8 +92,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = { ...@@ -103,8 +92,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
.ucon = 0x3c5, .ucon = 0x3c5,
.ulcon = 0x43, .ulcon = 0x43,
.ufcon = 0xf1, .ufcon = 0xf1,
.clocks = rx1950_serial_clocks, .clk_sel = S3C2410_UCON_CLKSEL3,
.clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
}, },
}; };
......
...@@ -67,16 +67,6 @@ static struct map_desc rx3715_iodesc[] __initdata = { ...@@ -67,16 +67,6 @@ static struct map_desc rx3715_iodesc[] __initdata = {
}, },
}; };
static struct s3c24xx_uart_clksrc rx3715_serial_clocks[] = {
[0] = {
.name = "fclk_n",
.divisor = 1,
.min_baud = 0,
.max_baud = 0,
}
};
static struct s3c2410_uartcfg rx3715_uartcfgs[] = { static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
[0] = { [0] = {
.hwport = 0, .hwport = 0,
...@@ -84,8 +74,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = { ...@@ -84,8 +74,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
.ucon = 0x3c5, .ucon = 0x3c5,
.ulcon = 0x03, .ulcon = 0x03,
.ufcon = 0x51, .ufcon = 0x51,
.clocks = rx3715_serial_clocks, .clk_sel = S3C2410_UCON_CLKSEL3,
.clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
}, },
[1] = { [1] = {
.hwport = 1, .hwport = 1,
...@@ -93,8 +82,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = { ...@@ -93,8 +82,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
.ucon = 0x3c5, .ucon = 0x3c5,
.ulcon = 0x03, .ulcon = 0x03,
.ufcon = 0x00, .ufcon = 0x00,
.clocks = rx3715_serial_clocks, .clk_sel = S3C2410_UCON_CLKSEL3,
.clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
}, },
/* IR port */ /* IR port */
[2] = { [2] = {
...@@ -103,8 +91,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = { ...@@ -103,8 +91,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
.ucon = 0x3c5, .ucon = 0x3c5,
.ulcon = 0x43, .ulcon = 0x43,
.ufcon = 0x51, .ufcon = 0x51,
.clocks = rx3715_serial_clocks, .clk_sel = S3C2410_UCON_CLKSEL3,
.clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
} }
}; };
......
...@@ -23,36 +23,7 @@ ...@@ -23,36 +23,7 @@
#include <plat/s5p6450.h> #include <plat/s5p6450.h>
#include <plat/regs-serial.h> #include <plat/regs-serial.h>
static struct s3c24xx_uart_clksrc s5p64x0_serial_clocks[] = {
[0] = {
.name = "pclk_low",
.divisor = 1,
.min_baud = 0,
.max_baud = 0,
},
[1] = {
.name = "uclk1",
.divisor = 1,
.min_baud = 0,
.max_baud = 0,
},
};
/* uart registration process */ /* uart registration process */
void __init s5p64x0_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
{
struct s3c2410_uartcfg *tcfg = cfg;
u32 ucnt;
for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
if (!tcfg->clocks) {
tcfg->clocks = s5p64x0_serial_clocks;
tcfg->clocks_size = ARRAY_SIZE(s5p64x0_serial_clocks);
}
}
}
void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no) void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
{ {
int uart; int uart;
...@@ -62,12 +33,10 @@ void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no) ...@@ -62,12 +33,10 @@ void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART; s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART;
} }
s5p64x0_common_init_uarts(cfg, no);
s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
} }
void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no) void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no)
{ {
s5p64x0_common_init_uarts(cfg, no);
s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
} }
...@@ -18,27 +18,8 @@ ...@@ -18,27 +18,8 @@
#include <plat/s5pv210.h> #include <plat/s5pv210.h>
#include <plat/regs-serial.h> #include <plat/regs-serial.h>
static struct s3c24xx_uart_clksrc s5pv210_serial_clocks[] = {
[0] = {
.name = "pclk",
.divisor = 1,
.min_baud = 0,
.max_baud = 0,
},
};
/* uart registration process */ /* uart registration process */
void __init s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) void __init s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
{ {
struct s3c2410_uartcfg *tcfg = cfg;
u32 ucnt;
for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
if (!tcfg->clocks) {
tcfg->clocks = s5pv210_serial_clocks;
tcfg->clocks_size = ARRAY_SIZE(s5pv210_serial_clocks);
}
}
s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
} }
...@@ -229,26 +229,6 @@ ...@@ -229,26 +229,6 @@
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
/* struct s3c24xx_uart_clksrc
*
* this structure defines a named clock source that can be used for the
* uart, so that the best clock can be selected for the requested baud
* rate.
*
* min_baud and max_baud define the range of baud-rates this clock is
* acceptable for, if they are both zero, it is assumed any baud rate that
* can be generated from this clock will be used.
*
* divisor gives the divisor from the clock to the one seen by the uart
*/
struct s3c24xx_uart_clksrc {
const char *name;
unsigned int divisor;
unsigned int min_baud;
unsigned int max_baud;
};
/* configuration structure for per-machine configurations for the /* configuration structure for per-machine configurations for the
* serial port * serial port
* *
...@@ -268,9 +248,6 @@ struct s3c2410_uartcfg { ...@@ -268,9 +248,6 @@ struct s3c2410_uartcfg {
unsigned long ucon; /* value of ucon for port */ unsigned long ucon; /* value of ucon for port */
unsigned long ulcon; /* value of ulcon for port */ unsigned long ulcon; /* value of ulcon for port */
unsigned long ufcon; /* value of ufcon for port */ unsigned long ufcon; /* value of ufcon for port */
struct s3c24xx_uart_clksrc *clocks;
unsigned int clocks_size;
}; };
/* s3c24xx_uart_devs /* s3c24xx_uart_devs
......
...@@ -47,7 +47,6 @@ struct s3c24xx_uart_port { ...@@ -47,7 +47,6 @@ struct s3c24xx_uart_port {
unsigned int tx_irq; unsigned int tx_irq;
struct s3c24xx_uart_info *info; struct s3c24xx_uart_info *info;
struct s3c24xx_uart_clksrc *clksrc;
struct clk *clk; struct clk *clk;
struct clk *baudclk; struct clk *baudclk;
struct uart_port port; struct uart_port port;
......
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