Commit b399c46e authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media

Pull media updates from Mauro Carvalho Chehab:
 - a new jpeg codec driver for Samsung Exynos (jpeg-hw-exynos4)
 - a new dvb frontend for ds2103 chipset (m88ds2103)
 - a new sensor driver for Samsung S5K5BAF UXGA (s5k5baf)
 - new drivers for R-Car VSP1
 - a new radio driver: radio-raremono
 - a new tuner driver for ts2022 chipset (m88ts2022)
 - the analog part of em28xx is now a separate module that only
   load/runs if the device is not a pure digital TV device
 - added a staging driver for bcm2048 radio devices
 - the omap 2 video driver (omap24xx) was moved to staging.  This driver
   is for an old hardware and uses a deprecated Kernel internal API.  If
   nobody cares enough to fix it, it would be removed on a couple Kernel
   releases
 - the sn9c102 driver was moved to staging.  This driver was replaced by
   gspca, and disabled on some distros, as almost all devices are known
   to work properly with gspca.  It should be removed from kernel on a
   couple Kernel releases
 - lots of driver fixes, improvements and cleanups

* 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (421 commits)
  [media] media: v4l2-dev: fix video device index assignment
  [media] rc-core: reuse device numbers
  [media] em28xx-cards: properly initialize the device bitmap
  [media] Staging: media: Fix line length exceeding 80 characters in as102_drv.c
  [media] Staging: media: Fix line length exceeding 80 characters in as102_fe.c
  [media] Staging: media: Fix quoted string split across line in as102_fe.c
  [media] media: st-rc: Add reset support
  [media] m2m-deinterlace: fix allocated struct type
  [media] radio-usb-si4713: fix sparse non static symbol warnings
  [media] em28xx-audio: remove needless check before usb_free_coherent()
  [media] au0828: Fix sparse non static symbol warning
  Revert "[media] go7007-usb: only use go->dev after allocated"
  [media] em28xx-audio: provide an error code when URB submit fails
  [media] em28xx: fix check for audio only usb interfaces when changing the usb alternate setting
  [media] em28xx: fix usb alternate setting for analog and digital video endpoints > 0
  [media] em28xx: make 'em28xx_ctrl_ops' static
  em28xx-alsa: Fix error patch for init/fini
  [media] em28xx-audio: flush work at .fini
  [media] drxk: remove the option to load firmware asynchronously
  [media] em28xx: adjust period size at runtime
  ...
parents b890eb4e 6c3df5da
......@@ -2523,6 +2523,18 @@ that used it. It was originally scheduled for removal in 2.6.35.
</orderedlist>
</section>
<section>
<title>V4L2 in Linux 3.14</title>
<orderedlist>
<listitem>
<para> In struct <structname>v4l2_rect</structname>, the type
of <structfield>width</structfield> and <structfield>height</structfield>
fields changed from _s32 to _u32.
</para>
</listitem>
</orderedlist>
</section>
<section id="other">
<title>Relation of V4L2 to other Linux multimedia APIs</title>
......
......@@ -3161,6 +3161,47 @@ V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_REF_PERIOD as a golden frame.</entry>
</entrytbl>
</row>
<row><entry></entry></row>
<row>
<entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_VPX_MIN_QP</constant></entry>
<entry>integer</entry>
</row>
<row><entry spanname="descr">Minimum quantization parameter for VP8.</entry>
</row>
<row><entry></entry></row>
<row>
<entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_VPX_MAX_QP</constant></entry>
<entry>integer</entry>
</row>
<row><entry spanname="descr">Maximum quantization parameter for VP8.</entry>
</row>
<row><entry></entry></row>
<row>
<entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_VPX_I_FRAME_QP</constant>&nbsp;</entry>
<entry>integer</entry>
</row>
<row><entry spanname="descr">Quantization parameter for an I frame for VP8.</entry>
</row>
<row><entry></entry></row>
<row>
<entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP</constant>&nbsp;</entry>
<entry>integer</entry>
</row>
<row><entry spanname="descr">Quantization parameter for a P frame for VP8.</entry>
</row>
<row><entry></entry></row>
<row>
<entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_VPX_PROFILE</constant>&nbsp;</entry>
<entry>integer</entry>
</row>
<row><entry spanname="descr">Select the desired profile for VPx encoder.
Acceptable values are 0, 1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.</entry>
</row>
<row><entry></entry></row>
</tbody>
</tgroup>
......
......@@ -346,17 +346,14 @@ rectangle, in pixels.</entry>
rectangle, in pixels. Offsets increase to the right and down.</entry>
</row>
<row>
<entry>__s32</entry>
<entry>__u32</entry>
<entry><structfield>width</structfield></entry>
<entry>Width of the rectangle, in pixels.</entry>
</row>
<row>
<entry>__s32</entry>
<entry>__u32</entry>
<entry><structfield>height</structfield></entry>
<entry>Height of the rectangle, in pixels. Width and
height cannot be negative, the fields are signed for hysterical
reasons. <!-- video4linux-list@redhat.com on 22 Oct 2002 subject
"Re:[V4L][patches!] Re:v4l2/kernel-2.5" --></entry>
<entry>Height of the rectangle, in pixels.</entry>
</row>
</tbody>
</tgroup>
......
......@@ -134,6 +134,15 @@
<entry>Output pad, relative to the entity. Output pads source data
and are origins of links.</entry>
</row>
<row>
<entry><constant>MEDIA_PAD_FL_MUST_CONNECT</constant></entry>
<entry>If this flag is set and the pad is linked to any other
pad, then at least one of those links must be enabled for the
entity to be able to stream. There could be temporary reasons
(e.g. device configuration dependent) for the pad to need
enabled links even when this flag isn't set; the absence of the
flag doesn't imply there is none.</entry>
</row>
</tbody>
</tgroup>
</table>
......
......@@ -89,7 +89,7 @@
<constant>V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE</constant>.
</para>
<para>The following tables list existing packet RGB formats.</para>
<para>The following tables list existing packed RGB formats.</para>
<table pgwide="0" frame="none" id="v4l2-mbus-pixelcode-rgb">
<title>RGB formats</title>
......@@ -615,7 +615,7 @@
</mediaobject>
</figure>
<para>The following table lists existing packet Bayer formats. The data
<para>The following table lists existing packed Bayer formats. The data
organization is given as an example for the first pixel only.</para>
<table pgwide="0" frame="none" id="v4l2-mbus-pixelcode-bayer">
......@@ -1178,7 +1178,7 @@
U, Y, V, Y order will be named <constant>V4L2_MBUS_FMT_UYVY8_2X8</constant>.
</para>
<para><xref linkend="v4l2-mbus-pixelcode-yuv8"/> list existing packet YUV
<para><xref linkend="v4l2-mbus-pixelcode-yuv8"/> lists existing packed YUV
formats and describes the organization of each pixel data in each sample.
When a format pattern is split across multiple samples each of the samples
in the pattern is described.</para>
......@@ -2491,6 +2491,163 @@
</table>
</section>
<section>
<title>HSV/HSL Formats</title>
<para>Those formats transfer pixel data as RGB values in a cylindrical-coordinate
system using Hue-Saturation-Value or Hue-Saturation-Lightness components. The
format code is made of the following information.
<itemizedlist>
<listitem><para>The hue, saturation, value or lightness and optional alpha
components order code, as encoded in a pixel sample. The only currently
supported value is AHSV.
</para></listitem>
<listitem><para>The number of bits per component, for each component. The values
can be different for all components. The only currently supported value is 8888.
</para></listitem>
<listitem><para>The number of bus samples per pixel. Pixels that are wider than
the bus width must be transferred in multiple samples. The only currently
supported value is 1.</para></listitem>
<listitem><para>The bus width.</para></listitem>
<listitem><para>For formats where the total number of bits per pixel is smaller
than the number of bus samples per pixel times the bus width, a padding
value stating if the bytes are padded in their most high order bits
(PADHI) or low order bits (PADLO).</para></listitem>
<listitem><para>For formats where the number of bus samples per pixel is larger
than 1, an endianness value stating if the pixel is transferred MSB first
(BE) or LSB first (LE).</para></listitem>
</itemizedlist>
</para>
<para>The following table lists existing HSV/HSL formats.</para>
<table pgwide="0" frame="none" id="v4l2-mbus-pixelcode-hsv">
<title>HSV/HSL formats</title>
<tgroup cols="27">
<colspec colname="id" align="left" />
<colspec colname="code" align="center"/>
<colspec colname="bit" />
<colspec colnum="4" colname="b31" align="center" />
<colspec colnum="5" colname="b20" align="center" />
<colspec colnum="6" colname="b29" align="center" />
<colspec colnum="7" colname="b28" align="center" />
<colspec colnum="8" colname="b27" align="center" />
<colspec colnum="9" colname="b26" align="center" />
<colspec colnum="10" colname="b25" align="center" />
<colspec colnum="11" colname="b24" align="center" />
<colspec colnum="12" colname="b23" align="center" />
<colspec colnum="13" colname="b22" align="center" />
<colspec colnum="14" colname="b21" align="center" />
<colspec colnum="15" colname="b20" align="center" />
<colspec colnum="16" colname="b19" align="center" />
<colspec colnum="17" colname="b18" align="center" />
<colspec colnum="18" colname="b17" align="center" />
<colspec colnum="19" colname="b16" align="center" />
<colspec colnum="20" colname="b15" align="center" />
<colspec colnum="21" colname="b14" align="center" />
<colspec colnum="22" colname="b13" align="center" />
<colspec colnum="23" colname="b12" align="center" />
<colspec colnum="24" colname="b11" align="center" />
<colspec colnum="25" colname="b10" align="center" />
<colspec colnum="26" colname="b09" align="center" />
<colspec colnum="27" colname="b08" align="center" />
<colspec colnum="28" colname="b07" align="center" />
<colspec colnum="29" colname="b06" align="center" />
<colspec colnum="30" colname="b05" align="center" />
<colspec colnum="31" colname="b04" align="center" />
<colspec colnum="32" colname="b03" align="center" />
<colspec colnum="33" colname="b02" align="center" />
<colspec colnum="34" colname="b01" align="center" />
<colspec colnum="35" colname="b00" align="center" />
<spanspec namest="b31" nameend="b00" spanname="b0" />
<thead>
<row>
<entry>Identifier</entry>
<entry>Code</entry>
<entry></entry>
<entry spanname="b0">Data organization</entry>
</row>
<row>
<entry></entry>
<entry></entry>
<entry>Bit</entry>
<entry>31</entry>
<entry>30</entry>
<entry>29</entry>
<entry>28</entry>
<entry>27</entry>
<entry>26</entry>
<entry>25</entry>
<entry>24</entry>
<entry>23</entry>
<entry>22</entry>
<entry>21</entry>
<entry>20</entry>
<entry>19</entry>
<entry>18</entry>
<entry>17</entry>
<entry>16</entry>
<entry>15</entry>
<entry>14</entry>
<entry>13</entry>
<entry>12</entry>
<entry>11</entry>
<entry>10</entry>
<entry>9</entry>
<entry>8</entry>
<entry>7</entry>
<entry>6</entry>
<entry>5</entry>
<entry>4</entry>
<entry>3</entry>
<entry>2</entry>
<entry>1</entry>
<entry>0</entry>
</row>
</thead>
<tbody valign="top">
<row id="V4L2-MBUS-FMT-AHSV8888-1X32">
<entry>V4L2_MBUS_FMT_AHSV8888_1X32</entry>
<entry>0x6001</entry>
<entry></entry>
<entry>a<subscript>7</subscript></entry>
<entry>a<subscript>6</subscript></entry>
<entry>a<subscript>5</subscript></entry>
<entry>a<subscript>4</subscript></entry>
<entry>a<subscript>3</subscript></entry>
<entry>a<subscript>2</subscript></entry>
<entry>a<subscript>1</subscript></entry>
<entry>a<subscript>0</subscript></entry>
<entry>h<subscript>7</subscript></entry>
<entry>h<subscript>6</subscript></entry>
<entry>h<subscript>5</subscript></entry>
<entry>h<subscript>4</subscript></entry>
<entry>h<subscript>3</subscript></entry>
<entry>h<subscript>2</subscript></entry>
<entry>h<subscript>1</subscript></entry>
<entry>h<subscript>0</subscript></entry>
<entry>s<subscript>7</subscript></entry>
<entry>s<subscript>6</subscript></entry>
<entry>s<subscript>5</subscript></entry>
<entry>s<subscript>4</subscript></entry>
<entry>s<subscript>3</subscript></entry>
<entry>s<subscript>2</subscript></entry>
<entry>s<subscript>1</subscript></entry>
<entry>s<subscript>0</subscript></entry>
<entry>v<subscript>7</subscript></entry>
<entry>v<subscript>6</subscript></entry>
<entry>v<subscript>5</subscript></entry>
<entry>v<subscript>4</subscript></entry>
<entry>v<subscript>3</subscript></entry>
<entry>v<subscript>2</subscript></entry>
<entry>v<subscript>1</subscript></entry>
<entry>v<subscript>0</subscript></entry>
</row>
</tbody>
</tgroup>
</table>
</section>
<section>
<title>JPEG Compressed Formats</title>
......
......@@ -140,6 +140,14 @@ structs, ioctls) must be noted in more detail in the history chapter
(compat.xml), along with the possible impact on existing drivers and
applications. -->
<revision>
<revnumber>3.14</revnumber>
<date>2013-11-25</date>
<authorinitials>rr</authorinitials>
<revremark>Set width and height as unsigned on v4l2_rect.
</revremark>
</revision>
<revision>
<revnumber>3.11</revnumber>
<date>2013-05-26</date>
......@@ -501,7 +509,7 @@ and discussions on the V4L mailing list.</revremark>
</partinfo>
<title>Video for Linux Two API Specification</title>
<subtitle>Revision 3.11</subtitle>
<subtitle>Revision 3.14</subtitle>
<chapter id="common">
&sub-common;
......
......@@ -133,18 +133,14 @@ rectangle, in pixels.</entry>
rectangle, in pixels.</entry>
</row>
<row>
<entry>__s32</entry>
<entry>__u32</entry>
<entry><structfield>width</structfield></entry>
<entry>Width of the rectangle, in pixels.</entry>
</row>
<row>
<entry>__s32</entry>
<entry>__u32</entry>
<entry><structfield>height</structfield></entry>
<entry>Height of the rectangle, in pixels. Width
and height cannot be negative, the fields are signed for
hysterical reasons. <!-- video4linux-list@redhat.com
on 22 Oct 2002 subject "Re:[V4L][patches!] Re:v4l2/kernel-2.5" -->
</entry>
<entry>Height of the rectangle, in pixels.</entry>
</row>
</tbody>
</tgroup>
......
......@@ -59,7 +59,7 @@ buffers are filled (if there are any empty buffers in the incoming
queue) until <constant>VIDIOC_STREAMON</constant> has been called.
Accordingly the output hardware is disabled, no video signal is
produced until <constant>VIDIOC_STREAMON</constant> has been called.
The ioctl will succeed only when at least one output buffer is in the
The ioctl will succeed when at least one output buffer is in the
incoming queue.</para>
<para>The <constant>VIDIOC_STREAMOFF</constant> ioctl, apart of
......
......@@ -95,7 +95,7 @@ to work with it.
f. u64 res_counter_uncharge_until
(struct res_counter *rc, struct res_counter *top,
unsinged long val)
unsigned long val)
Almost same as res_counter_uncharge() but propagation of uncharge
stops when rc == top. This is useful when kill a res_counter in
......
Samsung S5P/EXYNOS SoC series JPEG codec
Required properties:
- compatible : should be one of:
"samsung,s5pv210-jpeg", "samsung,exynos4210-jpeg";
- reg : address and length of the JPEG codec IP register set;
- interrupts : specifies the JPEG codec IP interrupt;
- clocks : should contain the JPEG codec IP gate clock specifier, from the
common clock bindings;
- clock-names : should contain "jpeg" entry.
Samsung S5K5BAF UXGA 1/5" 2M CMOS Image Sensor with embedded SoC ISP
--------------------------------------------------------------------
Required properties:
- compatible : "samsung,s5k5baf";
- reg : I2C slave address of the sensor;
- vdda-supply : analog power supply 2.8V (2.6V to 3.0V);
- vddreg-supply : regulator input power supply 1.8V (1.7V to 1.9V)
or 2.8V (2.6V to 3.0);
- vddio-supply : I/O power supply 1.8V (1.65V to 1.95V)
or 2.8V (2.5V to 3.1V);
- stbyn-gpios : GPIO connected to STDBYN pin;
- rstn-gpios : GPIO connected to RSTN pin;
- clocks : list of phandle and clock specifier pairs
according to common clock bindings for the
clocks described in clock-names;
- clock-names : should include "mclk" for the sensor's master clock;
Optional properties:
- clock-frequency : the frequency at which the "mclk" clock should be
configured to operate, in Hz; if this property is not
specified default 24 MHz value will be used.
The device node should contain one 'port' child node with one child 'endpoint'
node, according to the bindings defined in Documentation/devicetree/bindings/
media/video-interfaces.txt. The following are properties specific to those
nodes.
endpoint node
-------------
- data-lanes : (optional) specifies MIPI CSI-2 data lanes as covered in
video-interfaces.txt. If present it should be <1> - the device
supports only one data lane without re-mapping.
Example:
s5k5bafx@2d {
compatible = "samsung,s5k5baf";
reg = <0x2d>;
vdda-supply = <&cam_io_en_reg>;
vddreg-supply = <&vt_core_15v_reg>;
vddio-supply = <&vtcam_reg>;
stbyn-gpios = <&gpl2 0 1>;
rstn-gpios = <&gpl2 1 1>;
clock-names = "mclk";
clocks = <&clock_cam 0>;
clock-frequency = <24000000>;
port {
s5k5bafx_ep: endpoint {
remote-endpoint = <&csis1_ep>;
data-lanes = <1>;
};
};
};
OMAP4 ISS Driver
================
Introduction
------------
The OMAP44XX family of chips contains the Imaging SubSystem (a.k.a. ISS),
Which contains several components that can be categorized in 3 big groups:
- Interfaces (2 Interfaces: CSI2-A & CSI2-B/CCP2)
- ISP (Image Signal Processor)
- SIMCOP (Still Image Coprocessor)
For more information, please look in [1] for latest version of:
"OMAP4430 Multimedia Device Silicon Revision 2.x"
As of Revision AB, the ISS is described in detail in section 8.
This driver is supporting _only_ the CSI2-A/B interfaces for now.
It makes use of the Media Controller framework [2], and inherited most of the
code from OMAP3 ISP driver (found under drivers/media/platform/omap3isp/*),
except that it doesn't need an IOMMU now for ISS buffers memory mapping.
Supports usage of MMAP buffers only (for now).
Tested platforms
----------------
- OMAP4430SDP, w/ ES2.1 GP & SEVM4430-CAM-V1-0 (Contains IMX060 & OV5640, in
which only the last one is supported, outputting YUV422 frames).
- TI Blaze MDP, w/ OMAP4430 ES2.2 EMU (Contains 1 IMX060 & 2 OV5650 sensors, in
which only the OV5650 are supported, outputting RAW10 frames).
- PandaBoard, Rev. A2, w/ OMAP4430 ES2.1 GP & OV adapter board, tested with
following sensors:
* OV5640
* OV5650
- Tested on mainline kernel:
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=summary
Tag: v3.3 (commit c16fa4f2ad19908a47c63d8fa436a1178438c7e7)
File list
---------
drivers/staging/media/omap4iss/
include/media/omap4iss.h
References
----------
[1] http://focus.ti.com/general/docs/wtbu/wtbudocumentcenter.tsp?navigationId=12037&templateId=6123#62
[2] http://lwn.net/Articles/420485/
[3] http://www.spinics.net/lists/linux-media/msg44370.html
--
Author: Sergio Aguirre <sergio.a.aguirre@gmail.com>
Copyright (C) 2012, Texas Instruments
......@@ -147,7 +147,7 @@ The drivers exposes following files:
--------------------------------------------------------------------
0x12 | readfreq | Current tuned frequency
--------------------------------------------------------------------
0x14 | freqoff | Singed frequency offset in units of
0x14 | freqoff | Signed frequency offset in units of
| | 2ppm
--------------------------------------------------------------------
0x15 | rssi | Signed value of RSSI in dBuV
......
......@@ -5425,6 +5425,16 @@ W: http://www.tazenda.demon.co.uk/phil/linux-hp
S: Maintained
F: arch/m68k/hp300/
M88DS3103 MEDIA DRIVER
M: Antti Palosaari <crope@iki.fi>
L: linux-media@vger.kernel.org
W: http://linuxtv.org/
W: http://palosaari.fi/linux/
Q: http://patchwork.linuxtv.org/project/linux-media/list/
T: git git://linuxtv.org/anttip/media_tree.git
S: Maintained
F: drivers/media/dvb-frontends/m88ds3103*
M88RS2000 MEDIA DRIVER
M: Malcolm Priestley <tvboxspy@gmail.com>
L: linux-media@vger.kernel.org
......@@ -5433,6 +5443,16 @@ Q: http://patchwork.linuxtv.org/project/linux-media/list/
S: Maintained
F: drivers/media/dvb-frontends/m88rs2000*
M88TS2022 MEDIA DRIVER
M: Antti Palosaari <crope@iki.fi>
L: linux-media@vger.kernel.org
W: http://linuxtv.org/
W: http://palosaari.fi/linux/
Q: http://patchwork.linuxtv.org/project/linux-media/list/
T: git git://linuxtv.org/anttip/media_tree.git
S: Maintained
F: drivers/media/tuners/m88ts2022*
MA901 MASTERKIT USB FM RADIO DRIVER
M: Alexey Klimov <klimov.linux@gmail.com>
L: linux-media@vger.kernel.org
......@@ -7471,6 +7491,13 @@ L: linux-media@vger.kernel.org
S: Supported
F: drivers/media/i2c/s5c73m3/*
SAMSUNG S5K5BAF CAMERA DRIVER
M: Kyungmin Park <kyungmin.park@samsung.com>
M: Andrzej Hajda <a.hajda@samsung.com>
L: linux-media@vger.kernel.org
S: Supported
F: drivers/media/i2c/s5k5baf.c
SAMSUNG SOC CLOCK DRIVERS
M: Tomasz Figa <t.figa@samsung.com>
S: Supported
......@@ -7774,7 +7801,7 @@ L: linux-media@vger.kernel.org
T: git git://linuxtv.org/media_tree.git
W: http://linuxtv.org
S: Odd Fixes
F: drivers/media/radio/si4713-i2c.?
F: drivers/media/radio/si4713/si4713.?
SI4713 FM RADIO TRANSMITTER PLATFORM DRIVER
M: Eduardo Valentin <edubezval@gmail.com>
......@@ -7782,7 +7809,15 @@ L: linux-media@vger.kernel.org
T: git git://linuxtv.org/media_tree.git
W: http://linuxtv.org
S: Odd Fixes
F: drivers/media/radio/radio-si4713.c
F: drivers/media/radio/si4713/radio-platform-si4713.c
SI4713 FM RADIO TRANSMITTER USB DRIVER
M: Hans Verkuil <hverkuil@xs4all.nl>
L: linux-media@vger.kernel.org
T: git git://linuxtv.org/media_tree.git
W: http://linuxtv.org
S: Maintained
F: drivers/media/radio/si4713/radio-usb-si4713.c
SIANO DVB DRIVER
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
......@@ -8634,6 +8669,14 @@ L: linux-xtensa@linux-xtensa.org
S: Maintained
F: arch/xtensa/
THANKO'S RAREMONO AM/FM/SW RADIO RECEIVER USB DRIVER
M: Hans Verkuil <hverkuil@xs4all.nl>
L: linux-media@vger.kernel.org
T: git git://linuxtv.org/media_tree.git
W: http://linuxtv.org
S: Maintained
F: drivers/media/radio/radio-raremono.c
THERMAL
M: Zhang Rui <rui.zhang@intel.com>
M: Eduardo Valentin <eduardo.valentin@ti.com>
......@@ -9166,8 +9209,7 @@ L: linux-media@vger.kernel.org
T: git git://linuxtv.org/media_tree.git
W: http://www.linux-projects.org
S: Maintained
F: Documentation/video4linux/sn9c102.txt
F: drivers/media/usb/sn9c102/
F: drivers/staging/media/sn9c102/
USB SUBSYSTEM
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
......
......@@ -760,7 +760,14 @@ static struct regulator_init_data rx51_vintdig = {
},
};
static const char * const si4713_supply_names[] = {
"vio",
"vdd",
};
static struct si4713_platform_data rx51_si4713_i2c_data __initdata_or_module = {
.supplies = ARRAY_SIZE(si4713_supply_names),
.supply_names = si4713_supply_names,
.gpio_reset = RX51_FMTX_RESET_GPIO,
};
......
......@@ -1025,7 +1025,9 @@ static struct adv7842_platform_data adv7842_data = {
.ain_sel = ADV7842_AIN10_11_12_NC_SYNC_4_1,
.prim_mode = ADV7842_PRIM_MODE_SDP,
.vid_std_select = ADV7842_SDP_VID_STD_CVBS_SD_4x1,
.inp_color_space = ADV7842_INP_COLOR_SPACE_AUTO,
.hdmi_free_run_enable = 1,
.sdp_free_run_auto = 1,
.llc_dll_phase = 0x10,
.i2c_sdp_io = 0x40,
.i2c_sdp = 0x41,
.i2c_cp = 0x42,
......
......@@ -137,7 +137,7 @@ ENTRY(csum_partial)
ldi r25, 0
mv r10, r5
cmpi.c r5, 0x8
blt small_csumcpy /* < 8(singed) bytes to copy */
blt small_csumcpy /* < 8(signed) bytes to copy */
cmpi.c r5, 0x0
beq out
andri.c r25, src, 0x1 /* odd buffer? */
......
......@@ -2118,6 +2118,7 @@ static const struct hid_device_id hid_ignore_list[] = {
{ HID_USB_DEVICE(USB_VENDOR_ID_BERKSHIRE, USB_DEVICE_ID_BERKSHIRE_PCWD) },
{ HID_USB_DEVICE(USB_VENDOR_ID_CIDC, 0x0103) },
{ HID_USB_DEVICE(USB_VENDOR_ID_CYGNAL, USB_DEVICE_ID_CYGNAL_RADIO_SI470X) },
{ HID_USB_DEVICE(USB_VENDOR_ID_CYGNAL, USB_DEVICE_ID_CYGNAL_RADIO_SI4713) },
{ HID_USB_DEVICE(USB_VENDOR_ID_CMEDIA, USB_DEVICE_ID_CM109) },
{ HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_HIDCOM) },
{ HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_ULTRAMOUSE) },
......
......@@ -241,6 +241,8 @@
#define USB_VENDOR_ID_CYGNAL 0x10c4
#define USB_DEVICE_ID_CYGNAL_RADIO_SI470X 0x818a
#define USB_DEVICE_ID_CYGNAL_RADIO_SI4713 0x8244
#define USB_VENDOR_ID_CYPRESS 0x04b4
#define USB_DEVICE_ID_CYPRESS_MOUSE 0x0001
#define USB_DEVICE_ID_CYPRESS_HIDCOM 0x5500
......
......@@ -172,6 +172,9 @@ comment "Media ancillary drivers (tuners, sensors, i2c, frontends)"
config MEDIA_SUBDRV_AUTOSELECT
bool "Autoselect ancillary drivers (tuners, sensors, i2c, frontends)"
depends on MEDIA_ANALOG_TV_SUPPORT || MEDIA_DIGITAL_TV_SUPPORT || MEDIA_CAMERA_SUPPORT
depends on HAS_IOMEM
select I2C
select I2C_MUX
default y
help
By default, a media driver auto-selects all possible ancillary
......
......@@ -239,6 +239,7 @@
#define USB_PID_AVERMEDIA_A835B_4835 0x4835
#define USB_PID_AVERMEDIA_1867 0x1867
#define USB_PID_AVERMEDIA_A867 0xa867
#define USB_PID_AVERMEDIA_H335 0x0335
#define USB_PID_AVERMEDIA_TWINSTAR 0x0825
#define USB_PID_TECHNOTREND_CONNECT_S2400 0x3006
#define USB_PID_TECHNOTREND_CONNECT_S2400_8KEEPROM 0x3009
......@@ -317,6 +318,7 @@
#define USB_PID_WINFAST_DTV_DONGLE_H 0x60f6
#define USB_PID_WINFAST_DTV_DONGLE_STK7700P_2 0x6f01
#define USB_PID_WINFAST_DTV_DONGLE_GOLD 0x6029
#define USB_PID_WINFAST_DTV_DONGLE_MINID 0x6f0f
#define USB_PID_GENPIX_8PSK_REV_1_COLD 0x0200
#define USB_PID_GENPIX_8PSK_REV_1_WARM 0x0201
#define USB_PID_GENPIX_8PSK_REV_2 0x0202
......@@ -365,6 +367,7 @@
#define USB_PID_TERRATEC_DVBS2CI_V2 0x10ac
#define USB_PID_TECHNISAT_USB2_HDCI_V1 0x0001
#define USB_PID_TECHNISAT_USB2_HDCI_V2 0x0002
#define USB_PID_TECHNISAT_USB2_CABLESTAR_HDCI 0x0003
#define USB_PID_TECHNISAT_AIRSTAR_TELESTICK_2 0x0004
#define USB_PID_TECHNISAT_USB2_DVB_S2 0x0500
#define USB_PID_CPYTO_REDI_PC50A 0xa803
......
......@@ -35,6 +35,13 @@ config DVB_STV6110x
help
A Silicon tuner that supports DVB-S and DVB-S2 modes
config DVB_M88DS3103
tristate "Montage M88DS3103"
depends on DVB_CORE && I2C && I2C_MUX
default m if !MEDIA_SUBDRV_AUTOSELECT
help
Say Y when you want to support this frontend.
comment "Multistandard (cable + terrestrial) frontends"
depends on DVB_CORE
......
......@@ -85,6 +85,7 @@ obj-$(CONFIG_DVB_STV6110) += stv6110.o
obj-$(CONFIG_DVB_STV0900) += stv0900.o
obj-$(CONFIG_DVB_STV090x) += stv090x.o
obj-$(CONFIG_DVB_STV6110x) += stv6110x.o
obj-$(CONFIG_DVB_M88DS3103) += m88ds3103.o
obj-$(CONFIG_DVB_ISL6423) += isl6423.o
obj-$(CONFIG_DVB_EC100) += ec100.o
obj-$(CONFIG_DVB_HD29L2) += hd29l2.o
......
......@@ -96,6 +96,8 @@ static int a8293_set_voltage(struct dvb_frontend *fe,
if (ret)
goto err;
usleep_range(1500, 50000);
return ret;
err:
dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
......
......@@ -135,15 +135,33 @@
enum cmds {
CMD_SET_VCO = 0x10,
CMD_TUNEREQUEST = 0x11,
CMD_MPEGCONFIG = 0x13,
CMD_TUNERINIT = 0x14,
CMD_LNBSEND = 0x21, /* Formerly CMD_SEND_DISEQC */
CMD_LNBDCLEVEL = 0x22,
CMD_SET_TONE = 0x23,
CMD_UPDFWVERS = 0x35,
CMD_TUNERSLEEP = 0x36,
CMD_SET_VCOFREQ = 0x10,
CMD_TUNEREQUEST = 0x11,
CMD_GLOBAL_MPEGCFG = 0x13,
CMD_MPEGCFG = 0x14,
CMD_TUNERINIT = 0x15,
CMD_GET_SRATE = 0x18,
CMD_SET_GOLDCODE = 0x19,
CMD_GET_AGCACC = 0x1a,
CMD_DEMODINIT = 0x1b,
CMD_GETCTLACC = 0x1c,
CMD_LNBCONFIG = 0x20,
CMD_LNBSEND = 0x21,
CMD_LNBDCLEVEL = 0x22,
CMD_LNBPCBCONFIG = 0x23,
CMD_LNBSENDTONEBST = 0x24,
CMD_LNBUPDREPLY = 0x25,
CMD_SET_GPIOMODE = 0x30,
CMD_SET_GPIOEN = 0x31,
CMD_SET_GPIODIR = 0x32,
CMD_SET_GPIOOUT = 0x33,
CMD_ENABLERSCORR = 0x34,
CMD_FWVERSION = 0x35,
CMD_SET_SLEEPMODE = 0x36,
CMD_BERCTRL = 0x3c,
CMD_EVENTCTRL = 0x3d,
};
static LIST_HEAD(hybrid_tuner_instance_list);
......@@ -619,8 +637,8 @@ static int cx24117_load_firmware(struct dvb_frontend *fe,
cx24117_writereg(state, 0xf7, 0x0c);
cx24117_writereg(state, 0xe0, 0x00);
/* CMD 1B */
cmd.args[0] = 0x1b;
/* Init demodulator */
cmd.args[0] = CMD_DEMODINIT;
cmd.args[1] = 0x00;
cmd.args[2] = 0x01;
cmd.args[3] = 0x00;
......@@ -629,8 +647,8 @@ static int cx24117_load_firmware(struct dvb_frontend *fe,
if (ret != 0)
goto error;
/* CMD 10 */
cmd.args[0] = CMD_SET_VCO;
/* Set VCO frequency */
cmd.args[0] = CMD_SET_VCOFREQ;
cmd.args[1] = 0x06;
cmd.args[2] = 0x2b;
cmd.args[3] = 0xd8;
......@@ -648,8 +666,8 @@ static int cx24117_load_firmware(struct dvb_frontend *fe,
if (ret != 0)
goto error;
/* CMD 15 */
cmd.args[0] = 0x15;
/* Tuner init */
cmd.args[0] = CMD_TUNERINIT;
cmd.args[1] = 0x00;
cmd.args[2] = 0x01;
cmd.args[3] = 0x00;
......@@ -667,8 +685,8 @@ static int cx24117_load_firmware(struct dvb_frontend *fe,
if (ret != 0)
goto error;
/* CMD 13 */
cmd.args[0] = CMD_MPEGCONFIG;
/* Global MPEG config */
cmd.args[0] = CMD_GLOBAL_MPEGCFG;
cmd.args[1] = 0x00;
cmd.args[2] = 0x00;
cmd.args[3] = 0x00;
......@@ -679,9 +697,9 @@ static int cx24117_load_firmware(struct dvb_frontend *fe,
if (ret != 0)
goto error;
/* CMD 14 */
/* MPEG config for each demod */
for (i = 0; i < 2; i++) {
cmd.args[0] = CMD_TUNERINIT;
cmd.args[0] = CMD_MPEGCFG;
cmd.args[1] = (u8) i;
cmd.args[2] = 0x00;
cmd.args[3] = 0x05;
......@@ -699,8 +717,8 @@ static int cx24117_load_firmware(struct dvb_frontend *fe,
cx24117_writereg(state, 0xcf, 0x00);
cx24117_writereg(state, 0xe5, 0x04);
/* Firmware CMD 35: Get firmware version */
cmd.args[0] = CMD_UPDFWVERS;
/* Get firmware version */
cmd.args[0] = CMD_FWVERSION;
cmd.len = 2;
for (i = 0; i < 4; i++) {
cmd.args[1] = i;
......@@ -779,8 +797,8 @@ static int cx24117_read_signal_strength(struct dvb_frontend *fe,
u8 reg = (state->demod == 0) ?
CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1;
/* Firmware CMD 1A */
cmd.args[0] = 0x1a;
/* Read AGC accumulator register */
cmd.args[0] = CMD_GET_AGCACC;
cmd.args[1] = (u8) state->demod;
cmd.len = 2;
ret = cx24117_cmd_execute(fe, &cmd);
......@@ -899,22 +917,15 @@ static int cx24117_set_voltage(struct dvb_frontend *fe,
voltage == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" :
"SEC_VOLTAGE_OFF");
/* CMD 32 */
cmd.args[0] = 0x32;
cmd.args[1] = reg;
cmd.args[2] = reg;
/* Prepare a set GPIO logic level CMD */
cmd.args[0] = CMD_SET_GPIOOUT;
cmd.args[2] = reg; /* mask */
cmd.len = 3;
ret = cx24117_cmd_execute(fe, &cmd);
if (ret)
return ret;
if ((voltage == SEC_VOLTAGE_13) ||
(voltage == SEC_VOLTAGE_18)) {
/* CMD 33 */
cmd.args[0] = 0x33;
/* power on LNB */
cmd.args[1] = reg;
cmd.args[2] = reg;
cmd.len = 3;
ret = cx24117_cmd_execute(fe, &cmd);
if (ret != 0)
return ret;
......@@ -926,22 +937,22 @@ static int cx24117_set_voltage(struct dvb_frontend *fe,
/* Wait for voltage/min repeat delay */
msleep(100);
/* CMD 22 - CMD_LNBDCLEVEL */
/* Set 13V/18V select pin */
cmd.args[0] = CMD_LNBDCLEVEL;
cmd.args[1] = state->demod ? 0 : 1;
cmd.args[2] = (voltage == SEC_VOLTAGE_18 ? 0x01 : 0x00);
cmd.len = 3;
ret = cx24117_cmd_execute(fe, &cmd);
/* Min delay time before DiSEqC send */
msleep(20);
} else {
cmd.args[0] = 0x33;
/* power off LNB */
cmd.args[1] = 0x00;
cmd.args[2] = reg;
cmd.len = 3;
ret = cx24117_cmd_execute(fe, &cmd);
}
return cx24117_cmd_execute(fe, &cmd);
return ret;
}
static int cx24117_set_tone(struct dvb_frontend *fe,
......@@ -968,8 +979,7 @@ static int cx24117_set_tone(struct dvb_frontend *fe,
msleep(20);
/* Set the tone */
/* CMD 23 - CMD_SET_TONE */
cmd.args[0] = CMD_SET_TONE;
cmd.args[0] = CMD_LNBPCBCONFIG;
cmd.args[1] = (state->demod ? 0 : 1);
cmd.args[2] = 0x00;
cmd.args[3] = 0x00;
......@@ -1231,8 +1241,8 @@ static int cx24117_initfe(struct dvb_frontend *fe)
mutex_lock(&state->priv->fe_lock);
/* Firmware CMD 36: Power config */
cmd.args[0] = CMD_TUNERSLEEP;
/* Set sleep mode off */
cmd.args[0] = CMD_SET_SLEEPMODE;
cmd.args[1] = (state->demod ? 1 : 0);
cmd.args[2] = 0;
cmd.len = 3;
......@@ -1244,8 +1254,8 @@ static int cx24117_initfe(struct dvb_frontend *fe)
if (ret != 0)
goto exit;
/* CMD 3C */
cmd.args[0] = 0x3c;
/* Set BER control */
cmd.args[0] = CMD_BERCTRL;
cmd.args[1] = (state->demod ? 1 : 0);
cmd.args[2] = 0x10;
cmd.args[3] = 0x10;
......@@ -1254,12 +1264,22 @@ static int cx24117_initfe(struct dvb_frontend *fe)
if (ret != 0)
goto exit;
/* CMD 34 */
cmd.args[0] = 0x34;
/* Set RS correction (enable/disable) */
cmd.args[0] = CMD_ENABLERSCORR;
cmd.args[1] = (state->demod ? 1 : 0);
cmd.args[2] = CX24117_OCC;
cmd.len = 3;
ret = cx24117_cmd_execute_nolock(fe, &cmd);
if (ret != 0)
goto exit;
/* Set GPIO direction */
/* Set as output - controls LNB power on/off */
cmd.args[0] = CMD_SET_GPIODIR;
cmd.args[1] = 0x30;
cmd.args[2] = 0x30;
cmd.len = 3;
ret = cx24117_cmd_execute_nolock(fe, &cmd);
exit:
mutex_unlock(&state->priv->fe_lock);
......@@ -1278,8 +1298,8 @@ static int cx24117_sleep(struct dvb_frontend *fe)
dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n",
__func__, state->demod);
/* Firmware CMD 36: Power config */
cmd.args[0] = CMD_TUNERSLEEP;
/* Set sleep mode on */
cmd.args[0] = CMD_SET_SLEEPMODE;
cmd.args[1] = (state->demod ? 1 : 0);
cmd.args[2] = 1;
cmd.len = 3;
......@@ -1558,7 +1578,8 @@ static int cx24117_get_frontend(struct dvb_frontend *fe)
u8 buf[0x1f-4];
cmd.args[0] = 0x1c;
/* Read current tune parameters */
cmd.args[0] = CMD_GETCTLACC;
cmd.args[1] = (u8) state->demod;
cmd.len = 2;
ret = cx24117_cmd_execute(fe, &cmd);
......
This diff is collapsed.
......@@ -29,7 +29,6 @@
* A value of 0 (default) or lower indicates that
* the correct number of parameters will be
* automatically detected.
* @load_firmware_sync: Force the firmware load to be synchronous.
*
* On the *_gpio vars, bit 0 is UIO-1, bit 1 is UIO-2 and bit 2 is
* UIO-3.
......@@ -41,7 +40,6 @@ struct drxk_config {
bool parallel_ts;
bool dynamic_clk;
bool enable_merr_cfg;
bool load_firmware_sync;
bool antenna_dvbt;
u16 antenna_gpio;
......
......@@ -6830,25 +6830,13 @@ struct dvb_frontend *drxk_attach(const struct drxk_config *config,
/* Load firmware and initialize DRX-K */
if (state->microcode_name) {
if (config->load_firmware_sync) {
const struct firmware *fw = NULL;
const struct firmware *fw = NULL;
status = request_firmware(&fw, state->microcode_name,
state->i2c->dev.parent);
if (status < 0)
fw = NULL;
load_firmware_cb(fw, state);
} else {
status = request_firmware_nowait(THIS_MODULE, 1,
state->microcode_name,
state->i2c->dev.parent,
GFP_KERNEL,
state, load_firmware_cb);
if (status < 0) {
pr_err("failed to request a firmware\n");
return NULL;
}
}
status = request_firmware(&fw, state->microcode_name,
state->i2c->dev.parent);
if (status < 0)
fw = NULL;
load_firmware_cb(fw, state);
} else if (init_drxk(state) < 0)
goto error;
......
This diff is collapsed.
/*
* Montage M88DS3103 demodulator driver
*
* Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef M88DS3103_H
#define M88DS3103_H
#include <linux/dvb/frontend.h>
struct m88ds3103_config {
/*
* I2C address
* Default: none, must set
* 0x68, ...
*/
u8 i2c_addr;
/*
* clock
* Default: none, must set
* 27000000
*/
u32 clock;
/*
* max bytes I2C provider is asked to write at once
* Default: none, must set
* 33, 65, ...
*/
u16 i2c_wr_max;
/*
* TS output mode
* Default: M88DS3103_TS_SERIAL
*/
#define M88DS3103_TS_SERIAL 0 /* TS output pin D0, normal */
#define M88DS3103_TS_SERIAL_D7 1 /* TS output pin D7 */
#define M88DS3103_TS_PARALLEL 2 /* 24 MHz, normal */
#define M88DS3103_TS_PARALLEL_12 3 /* 12 MHz */
#define M88DS3103_TS_PARALLEL_16 4 /* 16 MHz */
#define M88DS3103_TS_PARALLEL_19_2 5 /* 19.2 MHz */
#define M88DS3103_TS_CI 6 /* 6 MHz */
u8 ts_mode;
/*
* spectrum inversion
* Default: 0
*/
u8 spec_inv:1;
/*
* AGC polarity
* Default: 0
*/
u8 agc_inv:1;
/*
* clock output
* Default: M88DS3103_CLOCK_OUT_DISABLED
*/
#define M88DS3103_CLOCK_OUT_DISABLED 0
#define M88DS3103_CLOCK_OUT_ENABLED 1
#define M88DS3103_CLOCK_OUT_ENABLED_DIV2 2
u8 clock_out;
/*
* DiSEqC envelope mode
* Default: 0
*/
u8 envelope_mode:1;
/*
* AGC configuration
* Default: none, must set
*/
u8 agc;
};
/*
* Driver implements own I2C-adapter for tuner I2C access. That's since chip
* has I2C-gate control which closes gate automatically after I2C transfer.
* Using own I2C adapter we can workaround that.
*/
#if defined(CONFIG_DVB_M88DS3103) || \
(defined(CONFIG_DVB_M88DS3103_MODULE) && defined(MODULE))
extern struct dvb_frontend *m88ds3103_attach(
const struct m88ds3103_config *config,
struct i2c_adapter *i2c,
struct i2c_adapter **tuner_i2c);
#else
static inline struct dvb_frontend *m88ds3103_attach(
const struct m88ds3103_config *config,
struct i2c_adapter *i2c,
struct i2c_adapter **tuner_i2c)
{
pr_warn("%s: driver disabled by Kconfig\n", __func__);
return NULL;
}
#endif
#endif
/*
* Montage M88DS3103 demodulator driver
*
* Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef M88DS3103_PRIV_H
#define M88DS3103_PRIV_H
#include "dvb_frontend.h"
#include "m88ds3103.h"
#include "dvb_math.h"
#include <linux/firmware.h>
#include <linux/i2c-mux.h>
#define M88DS3103_FIRMWARE "dvb-demod-m88ds3103.fw"
#define M88DS3103_MCLK_KHZ 96000
struct m88ds3103_priv {
struct i2c_adapter *i2c;
/* mutex needed due to own tuner I2C adapter */
struct mutex i2c_mutex;
const struct m88ds3103_config *cfg;
struct dvb_frontend fe;
fe_delivery_system_t delivery_system;
fe_status_t fe_status;
bool warm; /* FW running */
struct i2c_adapter *i2c_adapter;
};
struct m88ds3103_reg_val {
u8 reg;
u8 val;
};
static const struct m88ds3103_reg_val m88ds3103_dvbs_init_reg_vals[] = {
{0x23, 0x07},
{0x08, 0x03},
{0x0c, 0x02},
{0x21, 0x54},
{0x25, 0x8a},
{0x27, 0x31},
{0x30, 0x08},
{0x31, 0x40},
{0x32, 0x32},
{0x35, 0xff},
{0x3a, 0x00},
{0x37, 0x10},
{0x38, 0x10},
{0x39, 0x02},
{0x42, 0x60},
{0x4a, 0x80},
{0x4b, 0x04},
{0x4d, 0x91},
{0x5d, 0xc8},
{0x50, 0x36},
{0x51, 0x36},
{0x52, 0x36},
{0x53, 0x36},
{0x56, 0x01},
{0x63, 0x0f},
{0x64, 0x30},
{0x65, 0x40},
{0x68, 0x26},
{0x69, 0x4c},
{0x70, 0x20},
{0x71, 0x70},
{0x72, 0x04},
{0x73, 0x00},
{0x70, 0x40},
{0x71, 0x70},
{0x72, 0x04},
{0x73, 0x00},
{0x70, 0x60},
{0x71, 0x70},
{0x72, 0x04},
{0x73, 0x00},
{0x70, 0x80},
{0x71, 0x70},
{0x72, 0x04},
{0x73, 0x00},
{0x70, 0xa0},
{0x71, 0x70},
{0x72, 0x04},
{0x73, 0x00},
{0x70, 0x1f},
{0x76, 0x38},
{0x77, 0xa6},
{0x78, 0x0c},
{0x79, 0x80},
{0x7f, 0x14},
{0x7c, 0x00},
{0xae, 0x82},
{0x80, 0x64},
{0x81, 0x66},
{0x82, 0x44},
{0x85, 0x04},
{0xcd, 0xf4},
{0x90, 0x33},
{0xa0, 0x44},
{0xc0, 0x08},
{0xc3, 0x10},
{0xc4, 0x08},
{0xc5, 0xf0},
{0xc6, 0xff},
{0xc7, 0x00},
{0xc8, 0x1a},
{0xc9, 0x80},
{0xe0, 0xf8},
{0xe6, 0x8b},
{0xd0, 0x40},
{0xf8, 0x20},
{0xfa, 0x0f},
{0x00, 0x00},
{0xbd, 0x01},
{0xb8, 0x00},
};
static const struct m88ds3103_reg_val m88ds3103_dvbs2_init_reg_vals[] = {
{0x23, 0x07},
{0x08, 0x07},
{0x0c, 0x02},
{0x21, 0x54},
{0x25, 0x8a},
{0x27, 0x31},
{0x30, 0x08},
{0x32, 0x32},
{0x35, 0xff},
{0x3a, 0x00},
{0x37, 0x10},
{0x38, 0x10},
{0x39, 0x02},
{0x42, 0x60},
{0x4a, 0x80},
{0x4b, 0x04},
{0x4d, 0x91},
{0x5d, 0xc8},
{0x50, 0x36},
{0x51, 0x36},
{0x52, 0x36},
{0x53, 0x36},
{0x56, 0x01},
{0x63, 0x0f},
{0x64, 0x10},
{0x65, 0x20},
{0x68, 0x46},
{0x69, 0xcd},
{0x70, 0x20},
{0x71, 0x70},
{0x72, 0x04},
{0x73, 0x00},
{0x70, 0x40},
{0x71, 0x70},
{0x72, 0x04},
{0x73, 0x00},
{0x70, 0x60},
{0x71, 0x70},
{0x72, 0x04},
{0x73, 0x00},
{0x70, 0x80},
{0x71, 0x70},
{0x72, 0x04},
{0x73, 0x00},
{0x70, 0xa0},
{0x71, 0x70},
{0x72, 0x04},
{0x73, 0x00},
{0x70, 0x1f},
{0x76, 0x38},
{0x77, 0xa6},
{0x78, 0x0c},
{0x79, 0x80},
{0x7f, 0x14},
{0x85, 0x08},
{0xcd, 0xf4},
{0x90, 0x33},
{0x86, 0x00},
{0x87, 0x0f},
{0x89, 0x00},
{0x8b, 0x44},
{0x8c, 0x66},
{0x9d, 0xc1},
{0x8a, 0x10},
{0xad, 0x40},
{0xa0, 0x44},
{0xc0, 0x08},
{0xc1, 0x10},
{0xc2, 0x08},
{0xc3, 0x10},
{0xc4, 0x08},
{0xc5, 0xf0},
{0xc6, 0xff},
{0xc7, 0x00},
{0xc8, 0x1a},
{0xc9, 0x80},
{0xca, 0x23},
{0xcb, 0x24},
{0xcc, 0xf4},
{0xce, 0x74},
{0x00, 0x00},
{0xbd, 0x01},
{0xb8, 0x00},
};
#endif
......@@ -110,28 +110,94 @@ static u8 m88rs2000_readreg(struct m88rs2000_state *state, u8 reg)
return b1[0];
}
static u32 m88rs2000_get_mclk(struct dvb_frontend *fe)
{
struct m88rs2000_state *state = fe->demodulator_priv;
u32 mclk;
u8 reg;
/* Must not be 0x00 or 0xff */
reg = m88rs2000_readreg(state, 0x86);
if (!reg || reg == 0xff)
return 0;
reg /= 2;
reg += 1;
mclk = (u32)(reg * RS2000_FE_CRYSTAL_KHZ + 28 / 2) / 28;
return mclk;
}
static int m88rs2000_set_carrieroffset(struct dvb_frontend *fe, s16 offset)
{
struct m88rs2000_state *state = fe->demodulator_priv;
u32 mclk;
s32 tmp;
u8 reg;
int ret;
mclk = m88rs2000_get_mclk(fe);
if (!mclk)
return -EINVAL;
tmp = (offset * 4096 + (s32)mclk / 2) / (s32)mclk;
if (tmp < 0)
tmp += 4096;
/* Carrier Offset */
ret = m88rs2000_writereg(state, 0x9c, (u8)(tmp >> 4));
reg = m88rs2000_readreg(state, 0x9d);
reg &= 0xf;
reg |= (u8)(tmp & 0xf) << 4;
ret |= m88rs2000_writereg(state, 0x9d, reg);
return ret;
}
static int m88rs2000_set_symbolrate(struct dvb_frontend *fe, u32 srate)
{
struct m88rs2000_state *state = fe->demodulator_priv;
int ret;
u32 temp;
u64 temp;
u32 mclk;
u8 b[3];
if ((srate < 1000000) || (srate > 45000000))
return -EINVAL;
mclk = m88rs2000_get_mclk(fe);
if (!mclk)
return -EINVAL;
temp = srate / 1000;
temp *= 11831;
temp /= 68;
temp -= 3;
temp *= 1 << 24;
do_div(temp, mclk);
b[0] = (u8) (temp >> 16) & 0xff;
b[1] = (u8) (temp >> 8) & 0xff;
b[2] = (u8) temp & 0xff;
ret = m88rs2000_writereg(state, 0x93, b[2]);
ret |= m88rs2000_writereg(state, 0x94, b[1]);
ret |= m88rs2000_writereg(state, 0x95, b[0]);
if (srate > 10000000)
ret |= m88rs2000_writereg(state, 0xa0, 0x20);
else
ret |= m88rs2000_writereg(state, 0xa0, 0x60);
ret |= m88rs2000_writereg(state, 0xa1, 0xe0);
if (srate > 12000000)
ret |= m88rs2000_writereg(state, 0xa3, 0x20);
else if (srate > 2800000)
ret |= m88rs2000_writereg(state, 0xa3, 0x98);
else
ret |= m88rs2000_writereg(state, 0xa3, 0x90);
deb_info("m88rs2000: m88rs2000_set_symbolrate\n");
return ret;
}
......@@ -260,8 +326,6 @@ struct inittab m88rs2000_shutdown[] = {
};
struct inittab fe_reset[] = {
{DEMOD_WRITE, 0x00, 0x01},
{DEMOD_WRITE, 0xf1, 0xbf},
{DEMOD_WRITE, 0x00, 0x01},
{DEMOD_WRITE, 0x20, 0x81},
{DEMOD_WRITE, 0x21, 0x80},
......@@ -305,9 +369,6 @@ struct inittab fe_trigger[] = {
{DEMOD_WRITE, 0x9b, 0x64},
{DEMOD_WRITE, 0x9e, 0x00},
{DEMOD_WRITE, 0x9f, 0xf8},
{DEMOD_WRITE, 0xa0, 0x20},
{DEMOD_WRITE, 0xa1, 0xe0},
{DEMOD_WRITE, 0xa3, 0x38},
{DEMOD_WRITE, 0x98, 0xff},
{DEMOD_WRITE, 0xc0, 0x0f},
{DEMOD_WRITE, 0x89, 0x01},
......@@ -408,7 +469,7 @@ static int m88rs2000_read_status(struct dvb_frontend *fe, fe_status_t *status)
*status = 0;
if ((reg & 0x7) == 0x7) {
if ((reg & 0xee) == 0xee) {
*status = FE_HAS_CARRIER | FE_HAS_SIGNAL | FE_HAS_VITERBI
| FE_HAS_SYNC | FE_HAS_LOCK;
if (state->config->set_ts_params)
......@@ -480,33 +541,38 @@ static int m88rs2000_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
static int m88rs2000_set_fec(struct m88rs2000_state *state,
fe_code_rate_t fec)
{
u16 fec_set;
u8 fec_set, reg;
int ret;
switch (fec) {
/* This is not confirmed kept for reference */
/* case FEC_1_2:
fec_set = 0x88;
case FEC_1_2:
fec_set = 0x8;
break;
case FEC_2_3:
fec_set = 0x68;
fec_set = 0x10;
break;
case FEC_3_4:
fec_set = 0x48;
fec_set = 0x20;
break;
case FEC_5_6:
fec_set = 0x28;
fec_set = 0x40;
break;
case FEC_7_8:
fec_set = 0x18;
break; */
fec_set = 0x80;
break;
case FEC_AUTO:
default:
fec_set = 0x08;
fec_set = 0x0;
}
m88rs2000_writereg(state, 0x76, fec_set);
return 0;
}
reg = m88rs2000_readreg(state, 0x70);
reg &= 0x7;
ret = m88rs2000_writereg(state, 0x70, reg | fec_set);
ret |= m88rs2000_writereg(state, 0x76, 0x8);
return ret;
}
static fe_code_rate_t m88rs2000_get_fec(struct m88rs2000_state *state)
{
......@@ -515,18 +581,20 @@ static fe_code_rate_t m88rs2000_get_fec(struct m88rs2000_state *state)
reg = m88rs2000_readreg(state, 0x76);
m88rs2000_writereg(state, 0x9a, 0xb0);
reg &= 0xf0;
reg >>= 5;
switch (reg) {
case 0x88:
case 0x4:
return FEC_1_2;
case 0x68:
case 0x3:
return FEC_2_3;
case 0x48:
case 0x2:
return FEC_3_4;
case 0x28:
case 0x1:
return FEC_5_6;
case 0x18:
case 0x0:
return FEC_7_8;
case 0x08:
default:
break;
}
......@@ -540,9 +608,8 @@ static int m88rs2000_set_frontend(struct dvb_frontend *fe)
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
fe_status_t status;
int i, ret = 0;
s32 tmp;
u32 tuner_freq;
u16 offset = 0;
s16 offset = 0;
u8 reg;
state->no_lock_count = 0;
......@@ -567,38 +634,31 @@ static int m88rs2000_set_frontend(struct dvb_frontend *fe)
if (ret < 0)
return -ENODEV;
offset = tuner_freq - c->frequency;
/* calculate offset assuming 96000kHz*/
tmp = offset;
tmp *= 65536;
tmp = (2 * tmp + 96000) / (2 * 96000);
if (tmp < 0)
tmp += 65536;
offset = (s16)((s32)tuner_freq - c->frequency);
offset = tmp & 0xffff;
/* default mclk value 96.4285 * 2 * 1000 = 192857 */
if (((c->frequency % 192857) >= (192857 - 3000)) ||
(c->frequency % 192857) <= 3000)
ret = m88rs2000_writereg(state, 0x86, 0xc2);
else
ret = m88rs2000_writereg(state, 0x86, 0xc6);
ret = m88rs2000_writereg(state, 0x9a, 0x30);
/* Unknown usually 0xc6 sometimes 0xc1 */
reg = m88rs2000_readreg(state, 0x86);
ret |= m88rs2000_writereg(state, 0x86, reg);
/* Offset lower nibble always 0 */
ret |= m88rs2000_writereg(state, 0x9c, (offset >> 8));
ret |= m88rs2000_writereg(state, 0x9d, offset & 0xf0);
ret |= m88rs2000_set_carrieroffset(fe, offset);
if (ret < 0)
return -ENODEV;
/* Reset demod by symbol rate */
if (c->symbol_rate > 27500000)
ret = m88rs2000_writereg(state, 0xf1, 0xa4);
else
ret = m88rs2000_writereg(state, 0xf1, 0xbf);
/* Reset Demod */
ret = m88rs2000_tab_set(state, fe_reset);
ret |= m88rs2000_tab_set(state, fe_reset);
if (ret < 0)
return -ENODEV;
/* Unknown */
reg = m88rs2000_readreg(state, 0x70);
ret = m88rs2000_writereg(state, 0x70, reg);
/* Set FEC */
ret |= m88rs2000_set_fec(state, c->fec_inner);
ret = m88rs2000_set_fec(state, c->fec_inner);
ret |= m88rs2000_writereg(state, 0x85, 0x1);
ret |= m88rs2000_writereg(state, 0x8a, 0xbf);
ret |= m88rs2000_writereg(state, 0x8d, 0x1e);
......@@ -620,7 +680,7 @@ static int m88rs2000_set_frontend(struct dvb_frontend *fe)
for (i = 0; i < 25; i++) {
reg = m88rs2000_readreg(state, 0x8c);
if ((reg & 0x7) == 0x7) {
if ((reg & 0xee) == 0xee) {
status = FE_HAS_LOCK;
break;
}
......
......@@ -53,6 +53,8 @@ static inline struct dvb_frontend *m88rs2000_attach(
}
#endif /* CONFIG_DVB_M88RS2000 */
#define RS2000_FE_CRYSTAL_KHZ 27000
enum {
DEMOD_WRITE = 0x1,
WRITE_DELAY = 0x10,
......
......@@ -40,7 +40,7 @@
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
/* Max transfer size done by I2C transfer functions */
#define MAX_XFER_SIZE 64
#define MAX_XFER_SIZE 256
#define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
#define NXT2004_DEFAULT_FIRMWARE "dvb-fe-nxt2004.fw"
......
......@@ -555,14 +555,6 @@ config VIDEO_MT9V032
This is a Video4Linux2 sensor-level driver for the Micron
MT9V032 752x480 CMOS sensor.
config VIDEO_TCM825X
tristate "TCM825x camera sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_INT_DEVICE
depends on MEDIA_CAMERA_SUPPORT
---help---
This is a driver for the Toshiba TCM825x VGA camera sensor.
It is used for example in Nokia N800.
config VIDEO_SR030PC30
tristate "Siliconfile SR030PC30 sensor support"
depends on I2C && VIDEO_V4L2
......@@ -594,6 +586,13 @@ config VIDEO_S5K4ECGX
This is a V4L2 sensor-level driver for Samsung S5K4ECGX 5M
camera sensor with an embedded SoC image signal processor.
config VIDEO_S5K5BAF
tristate "Samsung S5K5BAF sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
---help---
This is a V4L2 sensor-level driver for Samsung S5K5BAF 2M
camera sensor with an embedded SoC image signal processor.
source "drivers/media/i2c/smiapp/Kconfig"
config VIDEO_S5C73M3
......@@ -655,6 +654,18 @@ config VIDEO_UPD64083
To compile this driver as a module, choose M here: the
module will be called upd64083.
comment "Audio/Video compression chips"
config VIDEO_SAA6752HS
tristate "Philips SAA6752HS MPEG-2 Audio/Video Encoder"
depends on VIDEO_V4L2 && I2C
---help---
Support for the Philips SAA6752HS MPEG-2 video and MPEG-audio/AC-3
audio encoder with multiplexer.
To compile this driver as a module, choose M here: the
module will be called saa6752hs.
comment "Miscellaneous helper chips"
config VIDEO_THS7303
......
......@@ -19,6 +19,7 @@ obj-$(CONFIG_VIDEO_SAA717X) += saa717x.o
obj-$(CONFIG_VIDEO_SAA7127) += saa7127.o
obj-$(CONFIG_VIDEO_SAA7185) += saa7185.o
obj-$(CONFIG_VIDEO_SAA7191) += saa7191.o
obj-$(CONFIG_VIDEO_SAA6752HS) += saa6752hs.o
obj-$(CONFIG_VIDEO_ADV7170) += adv7170.o
obj-$(CONFIG_VIDEO_ADV7175) += adv7175.o
obj-$(CONFIG_VIDEO_ADV7180) += adv7180.o
......@@ -57,7 +58,6 @@ obj-$(CONFIG_VIDEO_UPD64083) += upd64083.o
obj-$(CONFIG_VIDEO_OV7640) += ov7640.o
obj-$(CONFIG_VIDEO_OV7670) += ov7670.o
obj-$(CONFIG_VIDEO_OV9650) += ov9650.o
obj-$(CONFIG_VIDEO_TCM825X) += tcm825x.o
obj-$(CONFIG_VIDEO_MT9M032) += mt9m032.o
obj-$(CONFIG_VIDEO_MT9P031) += mt9p031.o
obj-$(CONFIG_VIDEO_MT9T001) += mt9t001.o
......@@ -67,6 +67,7 @@ obj-$(CONFIG_VIDEO_SR030PC30) += sr030pc30.o
obj-$(CONFIG_VIDEO_NOON010PC30) += noon010pc30.o
obj-$(CONFIG_VIDEO_S5K6AA) += s5k6aa.o
obj-$(CONFIG_VIDEO_S5K4ECGX) += s5k4ecgx.o
obj-$(CONFIG_VIDEO_S5K5BAF) += s5k5baf.o
obj-$(CONFIG_VIDEO_S5C73M3) += s5c73m3/
obj-$(CONFIG_VIDEO_ADP1653) += adp1653.o
obj-$(CONFIG_VIDEO_AS3645A) += as3645a.o
......
This diff is collapsed.
......@@ -452,6 +452,29 @@ static int adv7511_log_status(struct v4l2_subdev *sd)
errors[adv7511_rd(sd, 0xc8) >> 4], state->edid_detect_counter,
adv7511_rd(sd, 0x94), adv7511_rd(sd, 0x96));
v4l2_info(sd, "RGB quantization: %s range\n", adv7511_rd(sd, 0x18) & 0x80 ? "limited" : "full");
if (adv7511_rd(sd, 0xaf) & 0x02) {
/* HDMI only */
u8 manual_cts = adv7511_rd(sd, 0x0a) & 0x80;
u32 N = (adv7511_rd(sd, 0x01) & 0xf) << 16 |
adv7511_rd(sd, 0x02) << 8 |
adv7511_rd(sd, 0x03);
u8 vic_detect = adv7511_rd(sd, 0x3e) >> 2;
u8 vic_sent = adv7511_rd(sd, 0x3d) & 0x3f;
u32 CTS;
if (manual_cts)
CTS = (adv7511_rd(sd, 0x07) & 0xf) << 16 |
adv7511_rd(sd, 0x08) << 8 |
adv7511_rd(sd, 0x09);
else
CTS = (adv7511_rd(sd, 0x04) & 0xf) << 16 |
adv7511_rd(sd, 0x05) << 8 |
adv7511_rd(sd, 0x06);
v4l2_info(sd, "CTS %s mode: N %d, CTS %d\n",
manual_cts ? "manual" : "automatic", N, CTS);
v4l2_info(sd, "VIC: detected %d, sent %d\n",
vic_detect, vic_sent);
}
if (state->dv_timings.type == V4L2_DV_BT_656_1120)
v4l2_print_dv_timings(sd->name, "timings: ",
&state->dv_timings, false);
......@@ -942,26 +965,38 @@ static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd)
static bool edid_block_verify_crc(uint8_t *edid_block)
{
int i;
uint8_t sum = 0;
int i;
for (i = 0; i < 128; i++)
sum += *(edid_block + i);
return (sum == 0);
sum += edid_block[i];
return sum == 0;
}
static bool edid_segment_verify_crc(struct v4l2_subdev *sd, u32 segment)
static bool edid_verify_crc(struct v4l2_subdev *sd, u32 segment)
{
struct adv7511_state *state = get_adv7511_state(sd);
u32 blocks = state->edid.blocks;
uint8_t *data = state->edid.data;
if (edid_block_verify_crc(&data[segment * 256])) {
if ((segment + 1) * 2 <= blocks)
return edid_block_verify_crc(&data[segment * 256 + 128]);
if (!edid_block_verify_crc(&data[segment * 256]))
return false;
if ((segment + 1) * 2 <= blocks)
return edid_block_verify_crc(&data[segment * 256 + 128]);
return true;
}
static bool edid_verify_header(struct v4l2_subdev *sd, u32 segment)
{
static const u8 hdmi_header[] = {
0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
};
struct adv7511_state *state = get_adv7511_state(sd);
u8 *data = state->edid.data;
if (segment != 0)
return true;
}
return false;
return !memcmp(data, hdmi_header, sizeof(hdmi_header));
}
static bool adv7511_check_edid_status(struct v4l2_subdev *sd)
......@@ -990,9 +1025,10 @@ static bool adv7511_check_edid_status(struct v4l2_subdev *sd)
state->edid.blocks = state->edid.data[0x7e] + 1;
v4l2_dbg(1, debug, sd, "%s: %d blocks in total\n", __func__, state->edid.blocks);
}
if (!edid_segment_verify_crc(sd, segment)) {
if (!edid_verify_crc(sd, segment) ||
!edid_verify_header(sd, segment)) {
/* edid crc error, force reread of edid segment */
v4l2_dbg(1, debug, sd, "%s: edid crc error\n", __func__);
v4l2_err(sd, "%s: edid crc or header error\n", __func__);
state->have_monitor = false;
adv7511_s_power(sd, false);
adv7511_s_power(sd, true);
......@@ -1038,6 +1074,12 @@ static void adv7511_init_setup(struct v4l2_subdev *sd)
/* clear all interrupts */
adv7511_wr(sd, 0x96, 0xff);
/*
* Stop HPD from resetting a lot of registers.
* It might leave the chip in a partly un-initialized state,
* in particular with regards to hotplug bounces.
*/
adv7511_wr_and_or(sd, 0xd6, 0x3f, 0xc0);
memset(edid, 0, sizeof(struct adv7511_state_edid));
state->have_monitor = false;
adv7511_set_isr(sd, false);
......
This diff is collapsed.
This diff is collapsed.
......@@ -172,28 +172,28 @@ static int lm3560_flash_brt_ctrl(struct lm3560_flash *flash,
static int lm3560_get_ctrl(struct v4l2_ctrl *ctrl, enum lm3560_led_id led_no)
{
struct lm3560_flash *flash = to_lm3560_flash(ctrl, led_no);
int rval = -EINVAL;
mutex_lock(&flash->lock);
if (ctrl->id == V4L2_CID_FLASH_FAULT) {
int rval;
s32 fault = 0;
unsigned int reg_val;
rval = regmap_read(flash->regmap, REG_FLAG, &reg_val);
if (rval < 0)
return rval;
if (rval & FAULT_SHORT_CIRCUIT)
goto out;
if (reg_val & FAULT_SHORT_CIRCUIT)
fault |= V4L2_FLASH_FAULT_SHORT_CIRCUIT;
if (rval & FAULT_OVERTEMP)
if (reg_val & FAULT_OVERTEMP)
fault |= V4L2_FLASH_FAULT_OVER_TEMPERATURE;
if (rval & FAULT_TIMEOUT)
if (reg_val & FAULT_TIMEOUT)
fault |= V4L2_FLASH_FAULT_TIMEOUT;
ctrl->cur.val = fault;
return 0;
}
out:
mutex_unlock(&flash->lock);
return -EINVAL;
return rval;
}
static int lm3560_set_ctrl(struct v4l2_ctrl *ctrl, enum lm3560_led_id led_no)
......@@ -219,15 +219,19 @@ static int lm3560_set_ctrl(struct v4l2_ctrl *ctrl, enum lm3560_led_id led_no)
break;
case V4L2_CID_FLASH_STROBE:
if (flash->led_mode != V4L2_FLASH_LED_MODE_FLASH)
return -EBUSY;
if (flash->led_mode != V4L2_FLASH_LED_MODE_FLASH) {
rval = -EBUSY;
goto err_out;
}
flash->led_mode = V4L2_FLASH_LED_MODE_FLASH;
rval = lm3560_mode_ctrl(flash);
break;
case V4L2_CID_FLASH_STROBE_STOP:
if (flash->led_mode != V4L2_FLASH_LED_MODE_FLASH)
return -EBUSY;
if (flash->led_mode != V4L2_FLASH_LED_MODE_FLASH) {
rval = -EBUSY;
goto err_out;
}
flash->led_mode = V4L2_FLASH_LED_MODE_NONE;
rval = lm3560_mode_ctrl(flash);
break;
......@@ -247,8 +251,8 @@ static int lm3560_set_ctrl(struct v4l2_ctrl *ctrl, enum lm3560_led_id led_no)
break;
}
mutex_unlock(&flash->lock);
err_out:
mutex_unlock(&flash->lock);
return rval;
}
......@@ -444,14 +448,14 @@ static int lm3560_probe(struct i2c_client *client,
if (rval < 0)
return rval;
i2c_set_clientdata(client, flash);
return 0;
}
static int lm3560_remove(struct i2c_client *client)
{
struct v4l2_subdev *subdev = i2c_get_clientdata(client);
struct lm3560_flash *flash = container_of(subdev, struct lm3560_flash,
subdev_led[LM3560_LED_MAX]);
struct lm3560_flash *flash = i2c_get_clientdata(client);
unsigned int i;
for (i = LM3560_LED0; i < LM3560_LED_MAX; i++) {
......
......@@ -459,13 +459,15 @@ static int mt9m032_set_pad_crop(struct v4l2_subdev *subdev,
MT9M032_COLUMN_START_MAX);
rect.top = clamp(ALIGN(crop->rect.top, 2), MT9M032_ROW_START_MIN,
MT9M032_ROW_START_MAX);
rect.width = clamp(ALIGN(crop->rect.width, 2), MT9M032_COLUMN_SIZE_MIN,
MT9M032_COLUMN_SIZE_MAX);
rect.height = clamp(ALIGN(crop->rect.height, 2), MT9M032_ROW_SIZE_MIN,
MT9M032_ROW_SIZE_MAX);
rect.width = min(rect.width, MT9M032_PIXEL_ARRAY_WIDTH - rect.left);
rect.height = min(rect.height, MT9M032_PIXEL_ARRAY_HEIGHT - rect.top);
rect.width = clamp_t(unsigned int, ALIGN(crop->rect.width, 2),
MT9M032_COLUMN_SIZE_MIN, MT9M032_COLUMN_SIZE_MAX);
rect.height = clamp_t(unsigned int, ALIGN(crop->rect.height, 2),
MT9M032_ROW_SIZE_MIN, MT9M032_ROW_SIZE_MAX);
rect.width = min_t(unsigned int, rect.width,
MT9M032_PIXEL_ARRAY_WIDTH - rect.left);
rect.height = min_t(unsigned int, rect.height,
MT9M032_PIXEL_ARRAY_HEIGHT - rect.top);
__crop = __mt9m032_get_pad_crop(sensor, fh, crop->which);
......
......@@ -519,11 +519,13 @@ static int mt9p031_set_format(struct v4l2_subdev *subdev,
/* Clamp the width and height to avoid dividing by zero. */
width = clamp_t(unsigned int, ALIGN(format->format.width, 2),
max(__crop->width / 7, MT9P031_WINDOW_WIDTH_MIN),
max_t(unsigned int, __crop->width / 7,
MT9P031_WINDOW_WIDTH_MIN),
__crop->width);
height = clamp_t(unsigned int, ALIGN(format->format.height, 2),
max(__crop->height / 8, MT9P031_WINDOW_HEIGHT_MIN),
__crop->height);
max_t(unsigned int, __crop->height / 8,
MT9P031_WINDOW_HEIGHT_MIN),
__crop->height);
hratio = DIV_ROUND_CLOSEST(__crop->width, width);
vratio = DIV_ROUND_CLOSEST(__crop->height, height);
......@@ -565,15 +567,17 @@ static int mt9p031_set_crop(struct v4l2_subdev *subdev,
MT9P031_COLUMN_START_MAX);
rect.top = clamp(ALIGN(crop->rect.top, 2), MT9P031_ROW_START_MIN,
MT9P031_ROW_START_MAX);
rect.width = clamp(ALIGN(crop->rect.width, 2),
MT9P031_WINDOW_WIDTH_MIN,
MT9P031_WINDOW_WIDTH_MAX);
rect.height = clamp(ALIGN(crop->rect.height, 2),
MT9P031_WINDOW_HEIGHT_MIN,
MT9P031_WINDOW_HEIGHT_MAX);
rect.width = min(rect.width, MT9P031_PIXEL_ARRAY_WIDTH - rect.left);
rect.height = min(rect.height, MT9P031_PIXEL_ARRAY_HEIGHT - rect.top);
rect.width = clamp_t(unsigned int, ALIGN(crop->rect.width, 2),
MT9P031_WINDOW_WIDTH_MIN,
MT9P031_WINDOW_WIDTH_MAX);
rect.height = clamp_t(unsigned int, ALIGN(crop->rect.height, 2),
MT9P031_WINDOW_HEIGHT_MIN,
MT9P031_WINDOW_HEIGHT_MAX);
rect.width = min_t(unsigned int, rect.width,
MT9P031_PIXEL_ARRAY_WIDTH - rect.left);
rect.height = min_t(unsigned int, rect.height,
MT9P031_PIXEL_ARRAY_HEIGHT - rect.top);
__crop = __mt9p031_get_pad_crop(mt9p031, fh, crop->pad, crop->which);
......
......@@ -291,10 +291,12 @@ static int mt9t001_set_format(struct v4l2_subdev *subdev,
/* Clamp the width and height to avoid dividing by zero. */
width = clamp_t(unsigned int, ALIGN(format->format.width, 2),
max(__crop->width / 8, MT9T001_WINDOW_HEIGHT_MIN + 1),
max_t(unsigned int, __crop->width / 8,
MT9T001_WINDOW_HEIGHT_MIN + 1),
__crop->width);
height = clamp_t(unsigned int, ALIGN(format->format.height, 2),
max(__crop->height / 8, MT9T001_WINDOW_HEIGHT_MIN + 1),
max_t(unsigned int, __crop->height / 8,
MT9T001_WINDOW_HEIGHT_MIN + 1),
__crop->height);
hratio = DIV_ROUND_CLOSEST(__crop->width, width);
......@@ -339,15 +341,17 @@ static int mt9t001_set_crop(struct v4l2_subdev *subdev,
rect.top = clamp(ALIGN(crop->rect.top, 2),
MT9T001_ROW_START_MIN,
MT9T001_ROW_START_MAX);
rect.width = clamp(ALIGN(crop->rect.width, 2),
MT9T001_WINDOW_WIDTH_MIN + 1,
MT9T001_WINDOW_WIDTH_MAX + 1);
rect.height = clamp(ALIGN(crop->rect.height, 2),
MT9T001_WINDOW_HEIGHT_MIN + 1,
MT9T001_WINDOW_HEIGHT_MAX + 1);
rect.width = min(rect.width, MT9T001_PIXEL_ARRAY_WIDTH - rect.left);
rect.height = min(rect.height, MT9T001_PIXEL_ARRAY_HEIGHT - rect.top);
rect.width = clamp_t(unsigned int, ALIGN(crop->rect.width, 2),
MT9T001_WINDOW_WIDTH_MIN + 1,
MT9T001_WINDOW_WIDTH_MAX + 1);
rect.height = clamp_t(unsigned int, ALIGN(crop->rect.height, 2),
MT9T001_WINDOW_HEIGHT_MIN + 1,
MT9T001_WINDOW_HEIGHT_MAX + 1);
rect.width = min_t(unsigned int, rect.width,
MT9T001_PIXEL_ARRAY_WIDTH - rect.left);
rect.height = min_t(unsigned int, rect.height,
MT9T001_PIXEL_ARRAY_HEIGHT - rect.top);
__crop = __mt9t001_get_pad_crop(mt9t001, fh, crop->pad, crop->which);
......
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......@@ -33,11 +33,11 @@
#include <linux/i2c.h>
#include <linux/types.h>
#include <linux/videodev2.h>
#include <linux/init.h>
#include <linux/crc32.h>
#include <media/v4l2-device.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-common.h>
#include <linux/init.h>
#include <linux/crc32.h>
#define MPEG_VIDEO_TARGET_BITRATE_MAX 27000
#define MPEG_VIDEO_MAX_BITRATE_MAX 27000
......@@ -124,7 +124,7 @@ static inline struct saa6752hs_state *to_state(struct v4l2_subdev *sd)
/* ---------------------------------------------------------------------- */
static u8 PAT[] = {
static const u8 PAT[] = {
0xc2, /* i2c register */
0x00, /* table number for encoder */
......@@ -150,7 +150,7 @@ static u8 PAT[] = {
0x00, 0x00, 0x00, 0x00 /* CRC32 */
};
static u8 PMT[] = {
static const u8 PMT[] = {
0xc2, /* i2c register */
0x01, /* table number for encoder */
......@@ -179,7 +179,7 @@ static u8 PMT[] = {
0x00, 0x00, 0x00, 0x00 /* CRC32 */
};
static u8 PMT_AC3[] = {
static const u8 PMT_AC3[] = {
0xc2, /* i2c register */
0x01, /* table number for encoder(1) */
0x47, /* sync */
......@@ -212,7 +212,7 @@ static u8 PMT_AC3[] = {
0xED, 0xDE, 0x2D, 0xF3 /* CRC32 BE */
};
static struct saa6752hs_mpeg_params param_defaults =
static const struct saa6752hs_mpeg_params param_defaults =
{
.ts_pid_pmt = 16,
.ts_pid_video = 260,
......@@ -643,13 +643,6 @@ static const struct v4l2_ctrl_ops saa6752hs_ctrl_ops = {
static const struct v4l2_subdev_core_ops saa6752hs_core_ops = {
.init = saa6752hs_init,
.g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
.try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
.s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
.g_ctrl = v4l2_subdev_g_ctrl,
.s_ctrl = v4l2_subdev_s_ctrl,
.queryctrl = v4l2_subdev_queryctrl,
.querymenu = v4l2_subdev_querymenu,
.s_std = saa6752hs_s_std,
};
......
......@@ -399,7 +399,6 @@ static void smiapp_update_mbus_formats(struct smiapp_sensor *sensor)
BUG_ON(max(internal_csi_format_idx, csi_format_idx) + pixel_order
>= ARRAY_SIZE(smiapp_csi_data_formats));
BUG_ON(min(internal_csi_format_idx, csi_format_idx) < 0);
dev_dbg(&client->dev, "new pixel order %s\n",
pixel_order_str[pixel_order]);
......@@ -2028,8 +2027,8 @@ static int smiapp_set_crop(struct v4l2_subdev *subdev,
sel->r.width = min(sel->r.width, src_size->width);
sel->r.height = min(sel->r.height, src_size->height);
sel->r.left = min(sel->r.left, src_size->width - sel->r.width);
sel->r.top = min(sel->r.top, src_size->height - sel->r.height);
sel->r.left = min_t(int, sel->r.left, src_size->width - sel->r.width);
sel->r.top = min_t(int, sel->r.top, src_size->height - sel->r.height);
*crops[sel->pad] = sel->r;
......@@ -2121,8 +2120,8 @@ static int smiapp_set_selection(struct v4l2_subdev *subdev,
sel->r.left = max(0, sel->r.left & ~1);
sel->r.top = max(0, sel->r.top & ~1);
sel->r.width = max(0, SMIAPP_ALIGN_DIM(sel->r.width, sel->flags));
sel->r.height = max(0, SMIAPP_ALIGN_DIM(sel->r.height, sel->flags));
sel->r.width = SMIAPP_ALIGN_DIM(sel->r.width, sel->flags);
sel->r.height = SMIAPP_ALIGN_DIM(sel->r.height, sel->flags);
sel->r.width = max_t(unsigned int,
sensor->limits[SMIAPP_LIMIT_MIN_X_OUTPUT_SIZE],
......
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