Commit b406f38d authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Simon Horman

ARM: dts: r8a7779: Rename the serial port clock to fck

The clock is really the device functional clock, not the interface
clock. Rename it.
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 258b3c31
...@@ -216,7 +216,7 @@ scif0: serial@ffe40000 { ...@@ -216,7 +216,7 @@ scif0: serial@ffe40000 {
reg = <0xffe40000 0x100>; reg = <0xffe40000 0x100>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7779_CLK_SCIF0>; clocks = <&mstp0_clks R8A7779_CLK_SCIF0>;
clock-names = "sci_ick"; clock-names = "fck";
power-domains = <&cpg_clocks>; power-domains = <&cpg_clocks>;
status = "disabled"; status = "disabled";
}; };
...@@ -227,7 +227,7 @@ scif1: serial@ffe41000 { ...@@ -227,7 +227,7 @@ scif1: serial@ffe41000 {
reg = <0xffe41000 0x100>; reg = <0xffe41000 0x100>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7779_CLK_SCIF1>; clocks = <&mstp0_clks R8A7779_CLK_SCIF1>;
clock-names = "sci_ick"; clock-names = "fck";
power-domains = <&cpg_clocks>; power-domains = <&cpg_clocks>;
status = "disabled"; status = "disabled";
}; };
...@@ -238,7 +238,7 @@ scif2: serial@ffe42000 { ...@@ -238,7 +238,7 @@ scif2: serial@ffe42000 {
reg = <0xffe42000 0x100>; reg = <0xffe42000 0x100>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7779_CLK_SCIF2>; clocks = <&mstp0_clks R8A7779_CLK_SCIF2>;
clock-names = "sci_ick"; clock-names = "fck";
power-domains = <&cpg_clocks>; power-domains = <&cpg_clocks>;
status = "disabled"; status = "disabled";
}; };
...@@ -249,7 +249,7 @@ scif3: serial@ffe43000 { ...@@ -249,7 +249,7 @@ scif3: serial@ffe43000 {
reg = <0xffe43000 0x100>; reg = <0xffe43000 0x100>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7779_CLK_SCIF3>; clocks = <&mstp0_clks R8A7779_CLK_SCIF3>;
clock-names = "sci_ick"; clock-names = "fck";
power-domains = <&cpg_clocks>; power-domains = <&cpg_clocks>;
status = "disabled"; status = "disabled";
}; };
...@@ -260,7 +260,7 @@ scif4: serial@ffe44000 { ...@@ -260,7 +260,7 @@ scif4: serial@ffe44000 {
reg = <0xffe44000 0x100>; reg = <0xffe44000 0x100>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7779_CLK_SCIF4>; clocks = <&mstp0_clks R8A7779_CLK_SCIF4>;
clock-names = "sci_ick"; clock-names = "fck";
power-domains = <&cpg_clocks>; power-domains = <&cpg_clocks>;
status = "disabled"; status = "disabled";
}; };
...@@ -271,7 +271,7 @@ scif5: serial@ffe45000 { ...@@ -271,7 +271,7 @@ scif5: serial@ffe45000 {
reg = <0xffe45000 0x100>; reg = <0xffe45000 0x100>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7779_CLK_SCIF5>; clocks = <&mstp0_clks R8A7779_CLK_SCIF5>;
clock-names = "sci_ick"; clock-names = "fck";
power-domains = <&cpg_clocks>; power-domains = <&cpg_clocks>;
status = "disabled"; status = "disabled";
}; };
......
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