Commit b55f84e2 authored by Youquan Song's avatar Youquan Song Committed by Jeff Garzik

ata_piix: Fix DVD not dectected at some Haswell platforms

There is a quirk patch 5e5a4f5d
"ata_piix: make DVD Drive recognisable on systems with Intel Sandybridge
 chipsets(v2)" fixing the 4 ports IDE controller 32bit PIO mode.

We've hit a problem with DVD not recognized on Haswell Desktop platform which
includes Lynx Point 2-port SATA controller.

This quirk patch disables 32bit PIO on this controller in IDE mode.

v2: Change spelling error in statememnt pointed by Sergei Shtylyov.
v3: Change comment statememnt and spliting line over 80 characters pointed by
    Libor Pechacek and also rebase the patch against 3.8-rc7 kernel.
Tested-by: default avatarLee, Chun-Yi <jlee@suse.com>
Signed-off-by: default avatarYouquan Song <youquan.song@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: default avatarJeff Garzik <jgarzik@redhat.com>
parent a32450e1
...@@ -150,6 +150,7 @@ enum piix_controller_ids { ...@@ -150,6 +150,7 @@ enum piix_controller_ids {
tolapai_sata, tolapai_sata,
piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */ piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */
ich8_sata_snb, ich8_sata_snb,
ich8_2port_sata_snb,
}; };
struct piix_map_db { struct piix_map_db {
...@@ -304,7 +305,7 @@ static const struct pci_device_id piix_pci_tbl[] = { ...@@ -304,7 +305,7 @@ static const struct pci_device_id piix_pci_tbl[] = {
/* SATA Controller IDE (Lynx Point) */ /* SATA Controller IDE (Lynx Point) */
{ 0x8086, 0x8c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb }, { 0x8086, 0x8c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
/* SATA Controller IDE (Lynx Point) */ /* SATA Controller IDE (Lynx Point) */
{ 0x8086, 0x8c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, { 0x8086, 0x8c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_snb },
/* SATA Controller IDE (Lynx Point) */ /* SATA Controller IDE (Lynx Point) */
{ 0x8086, 0x8c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, { 0x8086, 0x8c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
/* SATA Controller IDE (Lynx Point-LP) */ /* SATA Controller IDE (Lynx Point-LP) */
...@@ -439,6 +440,7 @@ static const struct piix_map_db *piix_map_db_table[] = { ...@@ -439,6 +440,7 @@ static const struct piix_map_db *piix_map_db_table[] = {
[ich8m_apple_sata] = &ich8m_apple_map_db, [ich8m_apple_sata] = &ich8m_apple_map_db,
[tolapai_sata] = &tolapai_map_db, [tolapai_sata] = &tolapai_map_db,
[ich8_sata_snb] = &ich8_map_db, [ich8_sata_snb] = &ich8_map_db,
[ich8_2port_sata_snb] = &ich8_2port_map_db,
}; };
static struct pci_bits piix_enable_bits[] = { static struct pci_bits piix_enable_bits[] = {
...@@ -1242,6 +1244,16 @@ static struct ata_port_info piix_port_info[] = { ...@@ -1242,6 +1244,16 @@ static struct ata_port_info piix_port_info[] = {
.udma_mask = ATA_UDMA6, .udma_mask = ATA_UDMA6,
.port_ops = &piix_sata_ops, .port_ops = &piix_sata_ops,
}, },
[ich8_2port_sata_snb] =
{
.flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR
| PIIX_FLAG_PIO16,
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2,
.udma_mask = ATA_UDMA6,
.port_ops = &piix_sata_ops,
},
}; };
#define AHCI_PCI_BAR 5 #define AHCI_PCI_BAR 5
......
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