Commit b7929fb3 authored by Vivien Didelot's avatar Vivien Didelot Committed by David S. Miller

net: dsa: mv88e6xxx: prefix Port Default VLAN macros

For implicit namespacing and clarity, prefix the common Port Default
VLAN Register macros with MV88E6XXX_PORT_DEFAULT_VLAN.

Document the register and prefer ordered hex masks values for all
Marvell 16-bit registers.
Signed-off-by: default avatarVivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 7e5cc5f1
......@@ -1950,7 +1950,7 @@ static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port)
/* Default VLAN ID and priority: don't set a default VLAN
* ID, and set the default packet priority to zero.
*/
return mv88e6xxx_port_write(chip, port, PORT_DEFAULT_VLAN, 0x0000);
return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_DEFAULT_VLAN, 0);
}
static int mv88e6xxx_port_enable(struct dsa_switch *ds, int port,
......
......@@ -706,11 +706,12 @@ int mv88e6xxx_port_get_pvid(struct mv88e6xxx_chip *chip, int port, u16 *pvid)
u16 reg;
int err;
err = mv88e6xxx_port_read(chip, port, PORT_DEFAULT_VLAN, &reg);
err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_DEFAULT_VLAN,
&reg);
if (err)
return err;
*pvid = reg & PORT_DEFAULT_VLAN_MASK;
*pvid = reg & MV88E6XXX_PORT_DEFAULT_VLAN_MASK;
return 0;
}
......@@ -720,14 +721,16 @@ int mv88e6xxx_port_set_pvid(struct mv88e6xxx_chip *chip, int port, u16 pvid)
u16 reg;
int err;
err = mv88e6xxx_port_read(chip, port, PORT_DEFAULT_VLAN, &reg);
err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_DEFAULT_VLAN,
&reg);
if (err)
return err;
reg &= ~PORT_DEFAULT_VLAN_MASK;
reg |= pvid & PORT_DEFAULT_VLAN_MASK;
reg &= ~MV88E6XXX_PORT_DEFAULT_VLAN_MASK;
reg |= pvid & MV88E6XXX_PORT_DEFAULT_VLAN_MASK;
err = mv88e6xxx_port_write(chip, port, PORT_DEFAULT_VLAN, reg);
err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_DEFAULT_VLAN,
reg);
if (err)
return err;
......
......@@ -150,8 +150,10 @@
#define MV88E6XXX_PORT_BASE_VLAN 0x06
#define MV88E6XXX_PORT_BASE_VLAN_FID_3_0_MASK 0xf000
#define PORT_DEFAULT_VLAN 0x07
#define PORT_DEFAULT_VLAN_MASK 0xfff
/* Offset 0x07: Default Port VLAN ID & Priority */
#define MV88E6XXX_PORT_DEFAULT_VLAN 0x07
#define MV88E6XXX_PORT_DEFAULT_VLAN_MASK 0x0fff
#define PORT_CONTROL_2 0x08
#define PORT_CONTROL_2_IGNORE_FCS BIT(15)
#define PORT_CONTROL_2_VTU_PRI_OVERRIDE BIT(14)
......
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