Commit b8d8772e authored by Russell King's avatar Russell King

ARM: arm925: ensure assembly sets up writethrough mapping

Commit ca8f0b0a ("ARM: ensure C page table setup code follows
assembly code") did what it said on the tin, but some of the older
CPU code omitted the default cache policy from their files.  This
results in the kernel running with the caches disabled.  Fix this
for ARM925.
Reported-by: default avatarAaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 6a78371a
...@@ -502,6 +502,7 @@ __\name\()_proc_info: ...@@ -502,6 +502,7 @@ __\name\()_proc_info:
.long \cpu_val .long \cpu_val
.long \cpu_mask .long \cpu_mask
.long PMD_TYPE_SECT | \ .long PMD_TYPE_SECT | \
PMD_SECT_CACHEABLE | \
PMD_BIT4 | \ PMD_BIT4 | \
PMD_SECT_AP_WRITE | \ PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ PMD_SECT_AP_READ
......
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